AOT482L/AOB482L
80V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AOT482L/AOB482L is fabricated with SDMOSTM
trench technology that combines excellent RDS(ON) with low
gate charge and low Qrr.The result is outstanding
efficiency with controlled switching behavior. This
universal technology is well suited for PWM, load
switching and general purpose applications.
VDS
80V
105A
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
< 7.2mΩ
RDS(ON) (at VGS = 7V)
< 9mΩ
100% UIS Tested
100% Rg Tested
TO-263
TO220
Top View
Bottom View
Top View
D
D2PAK
D
Bottom View
D
D
D
G
G
D
S
S
D
G
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
TC=25°C
Continuous Drain
Current G
Pulsed Drain Current
Continuous Drain
Current
C
Units
V
V
82
A
330
11
IDSM
TA=70°C
S
S
105
IDM
TA=25°C
G
Maximum
80
±25
ID
TC=100°C
S
A
9
Avalanche Current C
IAS, IAR
82
A
Avalanche energy L=0.1mH C
EAS, EAR
336
mJ
TC=25°C
Power Dissipation B
TC=100°C
TA=25°C
Power Dissipation A
Junction and Storage Temperature Range
Pev 0: May 2010
2.1
Steady-State
Steady-State
RθJA
RθJC
W
1.3
TJ, TSTG
Symbol
t ≤ 10s
W
167
PDSM
TA=70°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
333
PD
-55 to 175
Typ
11
47
0.36
www.aosmd.com
°C
Max
15
60
0.45
Units
°C/W
°C/W
°C/W
Page 1 of 7
AOT482L/AOB482L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Min
Conditions
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
ID=250µA, VGS=0V
VDS=80V, VGS=0V
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±25V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=250µA
2.5
ID(ON)
On state drain current
VGS=10V, VDS=5V
330
100
TJ=125°C
VGS=7V, ID=20A
TO220
VGS=10V, ID=20A
TO263
VGS=7V, ID=20A
TO263
VDS=5V, ID=20A
gFS
Forward Transconductance
VSD
Diode Forward Voltage
IS=1A,VGS=0V
Maximum Body-Diode Continuous CurrentG
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=40V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qgs
Gate Source Charge
µA
50
VGS=10V, ID=20A
IS
V
TJ=55°C
Static Drain-Source On-Resistance
Units
10
Zero Gate Voltage Drain Current
TO220
Max
80
IDSS
RDS(ON)
Typ
VGS=10V, VDS=40V, ID=20A
3.1
nA
3.7
V
A
5.9
7.2
11
13
6.8
9
mΩ
5.6
6.9
mΩ
6.5
50
8.7
mΩ
S
0.64
mΩ
1
V
105
A
3240
4054
4870
pF
320
458
600
pF
95
160
225
pF
0.2
0.45
0.7
Ω
53
66.8
81
nC
16
20.8
25
nC
12
20.2
30
nC
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
18
26
34
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
75
108
140
VGS=10V, VDS=40V, RL=2Ω,
RGEN=3Ω
26
ns
18
ns
48
ns
21
ns
ns
nC
A. The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using
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