AOTF409

AOTF409 P-Channel Enhancement Mode Field Effect Transistor General Description Features The AOTF409/L uses advanced trench technology to provide excellent RDS(ON), low gate charge and low gate resistance. With the excellent thermal resistance of the TO220FL package, this device is well suited for high current load applications.AOTF409 and AOTF409L are electrically identical. ID = -24A (VGS = -10V) RDS(ON) < 40mΩ (VGS = -10V) RDS(ON) < 54mΩ (VGS = -4.5V) VDS (V) =-60V - RoHS Compliant - AOTF409L Halogen Free 100% UIS Tested! TO-220FL D G S G D S Absolute Maximum Ratings TA=25°C unless otherwise noted Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage TC=25°C Continuous Drain Current G Pulsed Drain Current IDM TA=25°C Continuous Drain Current Avalanche Current ID TC=100°C C C Repetitive avalanche energy L=0.1mH C TC=25°C Power Dissipation B TC=100°C Power Dissipation A TA=70°C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case Alpha & Omega Semiconductor, Ltd. V -17 A A -4.3 IAR -37 A EAR 68 mJ 43 2.16 W 1.38 TJ, TSTG -55 to 175 Symbol t ≤ 10s Steady-State Steady-State W 21 PDSM Junction and Storage Temperature Range ±20 -24 -60 PD TA=25°C Units V -5.4 IDSM TA=70°C Maximum -60 RθJA RθJC Typ 10 48.5 2.9 °C Max 12 58 3.5 Units °C/W °C/W °C/W www.aosmd.com AOTF409 Electrical Characteristics (TJ=25°C unless otherwise noted) Parameter Symbol STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current Conditions Min ID=-250µA, VGS=0V -60 -1 TJ=55°C -5 Gate-Body leakage current VDS=0V, VGS=±20V VGS(th) Gate Threshold Voltage VDS=VGS ID=-250µA -1.2 ID(ON) On state drain current VGS=-10V, VDS=-5V -60 VGS=-10V, ID=-20A TJ=125°C Static Drain-Source On-Resistance VGS=-4.5V, ID=-20A gFS Forward Transconductance VSD IS=-1A,VGS=0V Diode Forward Voltage Maximum Body-Diode Continuous Current IS VDS=-5V, ID=-20A DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance SWITCHING PARAMETERS Qg(10V) Total Gate Charge (10V) Qg(4.5V) Total Gate Charge (4.5V) Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time VGS=0V, VDS=-30V, f=1MHz VGS=0V, VDS=0V, f=1MHz VGS=-10V, VDS=-30V, ID=-20A Qrr Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge IF=-20A, dI/dt=500A/µs Units µA ±100 nA -2.1 -2.4 V 33 40 52.4 63 43 54 A 33 -0.73 mΩ mΩ S -1 V -30 A 1969 2461 2953 pF 125 178 231 pF 72 120 168 pF 1 2 4.0 Ω 34 43 52 nC 16 19.7 24 nC 8 10.2 12 nC 5 8.9 12.5 nC VGS=-10V, VDS=-30V, RL=1.5Ω, RGEN=3Ω IF=-20A, dI/dt=500A/µs trr Max V VDS=-60V, VGS=0V IGSS RDS(ON) Typ 12 ns 14.5 ns 38 ns 15 ns 18 25.68 33 117 167.12 217 ns nC A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power dissipation P DSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. B. The power dissipation P D is based on T J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial T J =25°C. D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using