AOZ1017DIL#A

AOZ1017D EZBuck™ 3A Simple Regulator General Description Features The AOZ1017D is a high efficiency, simple to use, 3A buck regulator. The AOZ1017D works from a 4.5V to 16V input voltage range, and provides up to 3A of continuous output current with an output voltage adjustable down to 0.8V. 4.5V to 16V operating input voltage range The AOZ1017D comes in a 5x4 DFN-8 package and is rated over a -40°C to +85°C ambient temperature range. 3A continuous output current 50m internal PFET switch for high efficiency: up to 95% Internal soft start Output voltage adjustable to 0.8V Fixed 500kHz PWM operation Cycle-by-cycle current limit Short-circuit protection Output over voltage protection Thermal shutdown Small size 5x4 DFN-8 package Applications Point of load DC/DC conversion PCIe graphics cards Set top boxes DVD drives and HDD LCD panels Cable modems Telecom/Networking/Datacom equipment Typical Application :-2 ' ™*'IVEQMG :-2 *VSQ™4' 0 ™, 9 )2 :398 : 0< 6 '314 6' '' '' ™*'IVEQMG *& ' ( %+2( +2( 6 Figure 1. 3.3V/3A Buck Regulator Rev. 1.1 April 2009 www.aosmd.com Page 1 of 16 AOZ1017D Ordering Information Part Number Ambient Temperature Range Package -40°C to +85°C 5x4 DFN-8 AOZ1017DI AOZ1017DIL Environmental RoHS Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. Pin Configuration :-2  4+2(  %+2(  *&  0< %+2(  0<  0<  )2  '314 \(*2 8ST:MI[ Pin Description Pin Number Pin Name Pin Function 1 VIN 2 PGND Power ground. Electrically needs to be connected to AGND. 3 AGND Reference connection for controller section. Also used as thermal connection for controller section. Electrically needs to be connected to PGND. 4 FB 5 COMP 6 EN The enable pin is active HIGH. Connect EN pin to V IN if not used. Do not leave the EN pin floating. 7, 8 LX PWM output connection to inductor. Thermal connection for output stage. Rev. 1.1 April 2009 Supply voltage input. When VIN rises above the UVLO threshold the device starts up. The FB pin is used to determine the output voltage via a resistor divider between the output and GND. External loop compensation pin. www.aosmd.com Page 2 of 16 AOZ1017D Block Diagram :-2 9:03 436 )2 -RXIVREP : :0(3 6IKYPEXSV 384  -7IR 6IJIVIRGI &MEW z 7SJXWXEVX 5 -0MQMX   : )%QT *& z z 4;1 'SQT 4;1 'SRXVSP 0SKMG  '314  : : *VIUYIRG] *SPHFEGO 'SQTEVEXSV 0IZIP 7LMJXIV  *)8 (VMZIV 0< O,^O,^ 3WGMPPEXSV z  *VIUYIRG] *SPHFEGO 'SQTEVEXSV z %+2( Rev. 1.1 April 2009 www.aosmd.com 4+2( Page 3 of 16 AOZ1017D Absolute Maximum Ratings Recommend Operating Ratings Exceeding the Absolute Maximum ratings may damage the device. The device is not guaranteed to operate beyond the Maximum Operating Ratings. Parameter Parameter Rating Supply Voltage (VIN) 18V LX to AGND -0.7V to VIN+0.3V EN to AGND -0.3V to VIN+0.3V FB to AGND -0.3V to 6V COMP to AGND -0.3V to 6V PGND to AGND -0.3V to +0.3V Junction Temperature (TJ) +150°C Storage Temperature (TS) -65°C to +150°C Rating Supply Voltage (VIN) 4.5V to 16V Output Voltage Range 0.8V to VIN Ambient Temperature (TA) -40°C to +85°C Package Thermal Resistance ( JA)(2) 5x4 DFN-8 50°C/W Package Thermal Resistance ( JC) 5x4 DFN-8 30°C/W Package Power Dissipation (PD) @ 25°C Ambient 5x4 DFN-8 1.15W Note: 1. The value of JA is measured with the device mounted on 1-in2 FR-4 board with 2oz. Copper, in a still air environment with T A = 25°C. The value in any given application depends on the user's specific board design. Electrical Characteristics TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(2) Symbol VIN VUVLO Parameter Conditions Supply Voltage Min. Typ. 4.5 Input Under-Voltage Lockout Threshold VIN Rising VIN Falling Max. Units 16 V 4.00 3.70 V Supply Current (Quiescent) IOUT = 0, VFB = 1.2V, VEN >1.2V 2 3 mA IOFF Shutdown Supply Current VEN = 0V 1 10 µA VFB Feedback Voltage 0.8 0.818 IIN 0.782 Load Regulation 0.5 Line Regulation 0.5 IFB Feedback Voltage Input Current VEN EN Input threshold VHYS EN Input Hysteresis % 200 Off Threshold On Threshold V % 0.6 2.0 100 nA V mV MODULATOR Frequency 400 DMAX Maximum Duty Cycle 100 DMIN Minimum Duty Cycle fO 500 600 kHz % 6 % Error Amplifier Voltage Gain 500 V/ V Error Amplifier Transconductance 200 µA / V PROTECTION ILIM Current Limit 4 VPR Over-Voltage Protection Threshold TJ Over-Temperature Shutdown Limit 150 °C tSS Soft Start Interval 2.2 ms Off Threshold On Threshold 5 960 840 A mV OUTPUT STAGE High-Side Switch On-Resistance VIN = 12V VIN = 5V 40 65 50 85 m Note: 2. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design. Rev. 1.1 April 2009 www.aosmd.com Page 4 of 16 AOZ1017D Typical Performance Characteristics Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified. 0MKLX0SEH('1 3TIVEXMSR *YPP0SEH''1 3TIVEXMSR Vin ripple 50mV/div Vin ripple 0.1V/div Vo ripple 50mV/div Vo ripple 50mV/div IL 2A/div IL 2A/div IL 10V/div IL 10V/div ™WHMZ ™WHMZ 7XEVXYTXS*YPP0SEH *YPP0SEHXS8YVRSJJ Vin 5V/div Vin 5V/div Vo 2V/div Vo 1V/div lin 1A/div lin 1A/div ™WHMZ QWHMZ  XS 0SEH8VERWMIRX 2S0SEHXS8YVRSJJ Vin 5V/div Vo Ripple 0.1V/div Vo 1V/div lo 2A/div ™WHMZ Rev. 1.1 April 2009 lin 1A/div WHMZ www.aosmd.com Page 5 of 16 AOZ1017D Typical Performance Characteristics (Continued) Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified. 7LSVX'MVGYMX4VSXIGXMSR 7LSVX'MVGYMX6IGSZIV] :S :HMZ :S :HMZ -0 %HMZ -0 %HMZ ™WHMZ QWHMZ )JJMGMIRG]:-2!: ZW0SEH'YVVIRX  :398498  :398498  :398498           0SEH'YVVIRX% 8LIVQEPHIVEXMRKGYVZIWJSV73TEGOEKITEVXYRHIVX]TMGEPMRTYXERHSYXTYXGSRHMXMSRFEWIHSRXLIIZEPYEXMSRFSEVH 'MVGYMXSJ*MKYVI”'EQFMIRXXIQTIVEXYVIERHREXYVEPGSRZIGXMSREMVWTIIH 0*1 YRPIWWSXLIV[MWIWTIGMJMIH (IVEXMRK'YVZIEX:-RTYX (IVEXMRK'YVZIEX:-RTYX   :::398498                    %QFMIRX8IQTIVEXYVI8% Rev. 1.1 April 2009 :::398498  :398498       %QFMIRX8IQTIVEXYVI8% www.aosmd.com Page 6 of 16 AOZ1017D Detailed Description The AOZ1017D is a current-mode step down regulator with integrated high side PMOS switch. It operates from a 4.5V to 16V input voltage range and supplies up to 3A of load current. The duty cycle can be adjusted from 6% to 100% allowing a wide range of output voltage. Features include Enable Control, Power-On Reset, Input Under Voltage Lockout, Fixed Internal Soft-Start and Thermal Shut Down. The AOZ1017D is available in 5x4 DFN-8 package. The AOZ1017D uses a P-Channel MOSFET as the high side switch. It saves the bootstrap capacitor normally seen in a circuit which is using an NMOS switch. It allows 100% turn-on of the upper switch to achieve linear regulation mode of operation. The minimum voltage drop from VIN to VO is the load current x DC resistance of MOSFET + DC resistance of buck inductor. It can be calculated by equation below: V O_MAX = V IN – IO R DS ON + R inductor Enable and Soft Start where; The AOZ1017D has internal soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. A soft start process begins when the input voltage rises to 4.0V and voltage on EN pin is HIGH. In the soft start process, the output voltage is typically ramped to regulation voltage in 2.2ms. The 2.2ms soft start time is set internally. VO_MAX is the maximum output voltage, The EN pin of the AOZ1017D is active HIGH. Connect the EN pin to VIN if enable function is not used. Pulling EN to ground will disable the AOZ1017D. Do not leave it open. The voltage on EN pin must be above 2.0 V to enable the AOZ1017D. When voltage on EN pin falls below 0.6V, the AOZ1017D is disabled. If an application circuit requires the AOZ1017D to be disabled, an open drain or open collector circuit should be used to interface to the EN pin. Steady-State Operation Under steady-state conditions, the converter operates in fixed frequency and Continuous-Conduction Mode (CCM). The AOZ1017D integrates an internal P-MOSFET as the high-side switch. Inductor current is sensed by amplifying the voltage drop across the drain to source of the high side power MOSFET. Output voltage is divided down by the external voltage divider at the FB pin. The difference of the FB pin voltage and reference is amplified by the internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against the current signal, which is the sum of inductor current signal and ramp compensation signal, at PWM comparator input. If the current signal is less than the error voltage, the internal high-side switch is on. The inductor current flows from the input through the inductor to the output. When the current signal exceeds the error voltage, the high-side switch is off. The inductor current is freewheeling through the external Schottky diode to output. Rev. 1.1 April 2009 VIN is the input voltage from 4.5V to 16V, IO is the output current from 0A to 3A, RDS(ON) is the on resistance of internal MOSFET, the value is between 40m and 70m depending on input voltage and junction temperature, and Rinductor is the inductor DC resistance. Switching Frequency The AOZ1017D switching frequency is fixed and set by an internal oscillator. The practical switching frequency could range from 400kHz to 600kHz due to device variation. Output Voltage Programming Output voltage can be set by feeding back the output to the FB pin with a resistor divider network. In the application circuit shown in Figure 1. The resistor divider network includes R1 and R2. Usually, a design is started by picking a fixed R2 value and calculating the required R 1 with equation below. V O = 0.8 R1 1 + ------R2 Some standard values of R1 and R2 for most commonly used output voltage values are listed in Table 1. Table 1. VO (V) www.aosmd.com R1 (k ) R2 (k ) 0.8 1.0 open 1.2 4.99 10 1.5 10 11.5 1.8 12.7 10.2 2.5 21.5 10 3.3 31.6 10 5.0 52.3 10 Page 7 of 16 AOZ1017D The combination of R1 and R2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. Since the switch duty cycle can be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop on upper PMOS and inductor. The AOZ1017D monitors the feedback voltage: when the feedback voltage is higher than 960mV, it immediately turns off the PMOS to protect the output voltage overshoot at fault condition. When feedback voltage is lower than 840mV, the PMOS is allowed to turn on in the next cycle. Thermal Protection Protection Features The AOZ1017D has multiple protection features to prevent system circuit damage under abnormal conditions. Over Current Protection (OCP) The sensed inductor current signal is also used for over current protection. Since the AOZ1017D employs peak current mode control, the COMP pin voltage is proportional to the peak inductor current. The COMP pin voltage is limited to be between 0.4V and 2.5V internally. The peak inductor current is automatically limited cycle by cycle. The cycle by cycle current limit threshold is set between 4A and 5A. When the load current reaches the current limit threshold, the cycle by cycle current limit circuit turns off the high side switch immediately to terminate the current duty cycle. The inductor current stop rising. The cycle by cycle current limit protection directly limits inductor peak current. The average inductor current is also limited due to the limitation on peak inductor current. When cycle by cycle current limit circuit is triggered, the output voltage drops as the duty cycle is decreasing. The AOZ1017D has internal short circuit protection to protect itself from catastrophic failure under output short circuit conditions. The FB pin voltage is proportional to the output voltage. Whenever FB pin voltage is below 0.2V, the short circuit protection circuit is triggered. As a result, the converter is shut down and hiccups at a frequency equals to 1/8 of normal switching frequency. The converter will start up via a soft start once the short circuit condition is resolved. In short circuit protection mode, the inductor average current is greatly reduced because of the low hiccup frequency. Power-On Reset (POR) A power-on reset circuit monitors the input voltage. When the input voltage exceeds 4V, the converter starts operation. When input voltage falls below 3.7V, the converter will be shut down. Rev. 1.1 April 2009 Output Over Voltage Protection (OVP) An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and high side PMOS if the junction temperature exceeds 150°C. Application Information The basic AOZ1017D application circuit is shown in Figure 1. Component selection is explained below. Input Capacitor The input capacitor must be connected to the VIN pin and PGND pin of the AOZ1017D to maintain steady input voltage and filter out the pulsing input current. The voltage rating of the input capacitor must be greater than the maximum input voltage plus the ripple voltage. The input ripple voltage can be approximated by the following equation: IO V IN = ----------------f C IN VO 1 – --------V IN VO -------V IN Since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. For a buck circuit, the RMS value of input capacitor current can be calculated by: I CIN_RMS = IO VO VO -------- 1 – -------V IN V IN if let m equal the conversion ratio: VO -------- = m V IN The relation between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 2 on the next page. It can be seen that when VO is half of VIN, CIN is under the worst current stress. The worst current stress on CIN is 0.5 x IO . www.aosmd.com Page 8 of 16 AOZ1017D Surface mount inductors in different shape and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise. But they cost more than unshielded inductors. The choice depends on EMI requirement, price and size.   -'-2C617Q  -3  Table 2 lists some inductors for typical output voltage design.   VOUT   Q  5.0V Figure 2. ICIN vs. Voltage Conversion Ratio For reliable operation and best performance, the input capacitors must have current rating higher than I CIN_RMS at the worst operating conditions. Ceramic capacitors are preferred for the input capacitors because of their low ESR and high ripple current rating. Depending on the application circuits, other low ESR tantalum capacitors or aluminum electrolytic capacitors may be used. When selecting ceramic capacitors, X5R or X7R type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. Note that the ripple current rating from capacitor manufactures are based on certain usage lifetime. Further de-rating may be necessary for practical design requirement. Inductor The inductor is used to supply constant current to output when it is driven by a switching voltage. For given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is, VO I L = ----------f L 3.3V 1.8 V L1 Manufacturer Shielded, 6.8µH, MSS1278-682MLD Coilcraft Shielded, 6.8µH MSS1260-682MLD Coilcraft Un-shielded, 4.7µH, DO3316P-472MLD Coilcraft Shielded, 4.7µH, DO1260-472NXD Coilcraft Shielded, 3.3µH, ET553-3R3 ELYTONE Shielded, 2.2µH, ET553-2R2 ELYTONE Unshielded, 3.3µH, DO3316P-222MLD Coilcraft Shielded, 2.2µH, MSS1260-222NXD Coilcraft Output Capacitor The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating. The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be considered for long term reliability. VO 1 – --------V IN The peak inductor current is: IL ILpeak = IO + -------2 High inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also reduces RMS current through inductor and switches, which results in less conduction loss. When selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. Output ripple voltage specification is another important factor for selecting the output capacitor. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. It can be calculated by the equation below: VO = IL 1 ESR CO + ------------------------8 f CO where; CO is output capacitor value, and ESRCO is the Equivalent Series Resistor of output capacitor. The inductor takes the highest current in a buck circuit. The conduction loss on inductor needs to be checked for thermal and efficiency requirements. Rev. 1.1 April 2009 www.aosmd.com Page 9 of 16 AOZ1017D When low ESR ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. Output ripple is mainly caused by capacitor value and inductor ripple current. The output ripple voltage calculation can be simplified to: VO = IL 1 ------------------------8 f CO If the impedance of ESR at switching frequency dominates, the output ripple voltage is mainly decided by capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified to: VO = IL ESR CO With peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in frequency domain. The pole is dominant pole and can be calculated by: 1 f p1 = ----------------------------------2 CO R L The zero is a ESR zero due to output capacitor and its ESR. It is can be calculated by: 1 f Z1 = -----------------------------------------------2 C O ESR CO where; For lower output ripple voltage across the entire operating temperature range, an X5R or X7R dielectric type of ceramic, or other low ESR tantalum capacitor or aluminum electrolytic capacitor may also be used as output capacitors. In a buck converter, output capacitor current is continuous. The RMS current of output capacitor is defined by the peak to peak inductor ripple current. It can be calculated by: IL I CO_RMS = ---------12 Usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. When the buck inductor is selected to be very small and inductor ripple current is high, the output capacitor could be overstressed. CO is the output filter capacitor, RL is load resistor value, and ESRCO is the equivalent series resistance of output capacitor. The compensation design is actually to shape the converter close loop transfer function to get the desired gain and phase. Several different types of compensation network can be used for the AOZ1017D. For most cases, a series capacitor and resistor network connected to the COMP pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. In the AOZ1017D, FB pin and COMP pin are the inverting input and the output of internal transconductance error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is: G EA f p2 = ------------------------------------------2 C C G VEA Schottky Diode Selection where; The external freewheeling diode supplies the current to the inductor when the high side PMOS switch is off. To reduce the losses due to the forward voltage drop and recovery of diode, a Schottky diode is recommended. The maximum reverse voltage rating of the chosen Schottky diode should be greater than the maximum input voltage, and the current rating should be greater than the maximum load current. GEA is the error amplifier transconductance, which is 200 x 10 -6 A/V, Loop Compensation The AOZ1017D employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It greatly simplifies the compensation loop design. Rev. 1.1 April 2009 GVEA is the error amplifier voltage gain, which is 500 V/V, and CC is compensation capacitor. The zero given by the external compensation network, capacitor CC and resistor RC, is located at: 1 f Z2 = ----------------------------------2 CC RC To design the compensation circuit, a target crossover frequency fC for close loop must be selected. The system crossover frequency is where control loop has unity gain. The crossover frequency is also called the converter bandwidth. Generally, a higher bandwidth means faster response to load transient. However, the bandwidth should not be too high because of system stability www.aosmd.com Page 10 of 16 AOZ1017D concern. When designing the compensation loop, converter stability under all line and load condition must be considered. Usually, it is recommended to set the bandwidth to be less than 1/10 of the switching frequency. The AOZ1017D operates at a fixed switching frequency range from 400kHz to 600kHz. It is recommended to choose a crossover frequency less than 50kHz. f C = 50kHz The strategy for choosing RC and CC is to set the cross over frequency with R C and set the compensator zero with CC . Using selected crossover frequency, fC , to calculate RC: RC = fC VO ---------V FB 2 CO ----------------------------G EA G CS where; fC is desired crossover frequency, VFB is 0.8V, GEA is the error amplifier transconductance, which is 200x10-6 A/V, and GCS is the current sense circuit transconductance, which is 6.68 A/V. The compensation capacitor CC and resistor RC together make a zero. This zero is put somewhere close to the dominate pole fp1 but lower than 1/5 of selected crossover frequency. CC can is selected by: 1.5 C C = ----------------------------------2 R C f p1 In the AOZ1017D buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the VIN pin, to the LX pins, to the filter inductor, to the output capacitor and load, and then returns to the input capacitor through ground. Current flows in the first loop when the high side switch is on. The second loop starts from inductor, to the output capacitors and load, to the anode of Schottky diode, to the cathode of Schottky diode. Current flows in the second loop when the low side diode is on. In the PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. A ground plane is strongly recommended to connect the input capacitor, output capacitor, and PGND pin of the AOZ1017D. In the AOZ1017D buck regulator circuit, the major power dissipating components are the AOZ1017D, the Schottky diode and output inductor. The total power dissipation of converter circuit can be measured by input power minus output power. P total_loss = V IN I IN – V O IO The power dissipation in Schottky can be approximated as: P diode_loss = I O 1–D V FW_Schottky where; VFW_Schottky is the Schottky diode forward voltage drop. The power dissipation of inductor can be approximately calculated by output current and DCR of inductor. P inductor_loss = I O2 R inductor The equation above can also be simplified to: C O RL C C = --------------------RC An easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com. Rev. 1.1 April 2009 Thermal Management and Layout Consideration 1.1 The actual junction temperature can be calculated with power dissipation in the AOZ1017D and thermal impedance from junction to ambient. T junction = P total_loss – P diode_loss – P inductor_loss www.aosmd.com JA + Page 11 of 16 T amb AOZ1017D The maximum junction temperature of AOZ1017D is 150°C, which limits the maximum load current capability. Please see the thermal de-rating curves for maximum load current of the AOZ1017D under different ambient temperatures. The thermal performance of the AOZ1017D is strongly affected by the PCB layout. Extra care should be taken by users during design process to ensure that the IC will operate under the recommended environmental conditions. Several layout tips are listed below for the best electric and thermal performance. Figure 3 illustrates a PCB layout example as reference. 1. Do not use thermal relief connection to the V IN and the PGND pin. Pour a maximized copper area to the PGND pin and the VIN pin to help thermal dissipation. 3. A ground plane is preferred. If a ground plane is not used, separate PGND from AGND and connect them only at one point to avoid the PGND pin noise coupling to the AGND pin. 4. Make the current trace from LX pins to L to CO to the PGND as short as possible. 5. Pour copper plane on all unused board area and connect it to stable DC nodes, like VIN, GND or VOUT. 6. The two LX pins are connected to the internal PFET drain. They are low resistance thermal conduction path and most noisy switching node. Connecting a copper plane to the LX pins will help thermal dissipation. This copper plane should not be too larger otherwise switching noise may be coupled to other part of circuit. 7. Keep sensitive signal trace away from the LX pins. 2. Input capacitor should be connected as close as possible to the VIN pin and the PGND pin. Figure 3. AOZ1017D (DFN-8) PCB Layout Rev. 1.1 April 2009 www.aosmd.com Page 12 of 16 AOZ1017D Package Dimensions, 5x4 DFN-8 ( % 4MR-(% ( & I  0 ) 6 ) ) ) -RHI\%VIE ( \ ) ( EEE ' GGG ' % ( 0 7IEXMRK ' 4PERI % HHH ' % F FFF '%& (MQIRWMSRWMRQMPPMQIXIVW 7]QFSPW % % % F 6IGSQQIRHIH0ERH4EXXIVR      ( ( ( ) ) ) I 0 0 6 EEE FFF GGG    9RMXQQ HHH 2SQ   6)*   1MR   z z z &7'   &7'   &7'   6)*    z        1E\    (MQIRWMSRWMRMRGLIW 7]QFSPW % % % F z z z ( ( ( ) ) ) I 0 0 6 EEE FFF GGG z HHH       2SQ 1E\     6)*    1MR   &7'     &7'       &7'       6)* z  z z  z z  z   z  z 2SXIW (MQIRWMSRWERHXSPIVERGMRKGSRJSVQXS%71)=1 %PPHMQIRWMSRWEVIMRQMPPMQIXIVW 8LIPSGEXMSRSJXLIXIVQMREPMHIRXMJMIVERHXIVQMREPRYQFIVMRKGSRZIRXMSRGSRJSVQWXS.)()'TYFPMGEXMSR74 (MQIRWMSRFETTPMIWXSQIXEPPM^IHXIVQMREPERHMWQIEWYVIHFIX[IIRQQERHQQJVSQXLIXIVQMREPXMT-JXLIXIVQMREPLEWXLI STXMSREPVEHMYWSRXLISXLIVIRHSJXLIXIVQMREPXLIHMQIRWMSRFWLSYPHRSXFIQIEWYVIHMRXLEXVEHMYWEVIE 'STPEREVMX]ETTPMIWXSXLIXIVQMREPWERHEPPSXLIVFSXXSQWYVJEGIQIXEPPM^EXMSR (VE[MRKWLS[REVIJSVMPPYWXVEXMSRSRP] Rev. 1.1 April 2009 www.aosmd.com Page 13 of 16 AOZ1017D Tape Dimensions, 5x4 DFN-8 8ETI 8 ( ) ) ( ) & *IIHMRK (MVIGXMSR / 4 % 9RMXQQ 4EGOEKI % & / ( ( ) ) ) 4 4 4 8 (*2\ QQ  •  •  •  1MR 8]T  z  •  •  •  •  •  •  • 0IEHIV8VEMPIVERH3VMIRXEXMSR 8VEMPIV8ETI QQ1MR Rev. 1.1 April 2009 'SQTSRIRXW8ETI 3VMIRXEXMSRMR4SGOIX www.aosmd.com 0IEHIV8ETI QQ1MR Page 14 of 16 AOZ1017D Reel Dimensions, 5x4 DFN-8 “ 1 >SSQ-R 6 4 & ; >SSQ-R   >SSQ-R % % % 2!™“   “     6   “ 6)*  '  6)*  “ “ 6)*  “     …  :-);' % “          … Rev. 1.1 April 2009 www.aosmd.com Page 15 of 16 AOZ1017D AOZ1017D Package Marking >(- 4EVX2YQFIV'SHI 9RHIVWGSVI(IRSXIW+VIIR4VSHYGX *%=;08 %WWIQFP]0SX'SHI *EF %WWIQFP]0SGEXMSR =IEV ;IIO'SHI LIFE SUPPORT POLICY ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.1 April 2009 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 16 of 16