AOZ1327DI-02

AOZ1327DI ECPower™ 20V 20mΩ Protection Switch with True Reverse Current Blocking General Description Features The AOZ1327DI power switch is intended for applications that require circuit protections. The input operating voltage ranges between 3.4V and 22V, making it ideal for USB Type-C power delivery applications. The VIN terminal is rated as 28V Absolute Maximum. The AOZ1327DI provides under-voltage lockout, over-voltage and over-temperature protection function. The over-voltage protection threshold is selectable through the POVP pin. The internal soft-start circuitry controls inrush current due to highly capacitive loads. The slew rate can be adjusted using an external capacitor. The AOZ1327DI has True Reverse-Current Blocking (TRCB) protection to avoid undesired reverse-current from VOUT to VIN at all time. The AOZ1327DI is available in a thermally enhanced 3mm x 3mm DFN-12 package which can operate over -40°C to +85°C temperature range.  20m typical ON resistance  8A continuous current  20A peak current for 10ms @ 2% duty cycle  3.4V to 22V operating input voltage  VIN, VOUT are rated 28V Abs max.  True reverse current blocking  Selectable over-voltage protection  Programmable soft-start  VIN Under-voltage lockout  VIN and VOUT over-voltage lockout  Thermal shutdown protection  ±4kV HBM ESD rating  IEC 61000-4-2: ±8kV on VIN  IEC 61000-4-5: 40V on VOUT, No Capacitor  3mm x 3mm DFN-12L package Applications  Thunderbolt/USB Type-C PD power switch  Portable devices  Notebook/desktop computers  Monitors  Docking station/dongles Typical Application Isolated Thermal Pad EXP VIN VBUS VOUT CIN TVS Diode USB  Connector  Charger COUT SS For 24V OVP CSS POVP AOZ1327DI 5V RFLTB PD  Controller FLTB ENB GND GND Rev. 1.2 April 2020 www.aosmd.com Page 1 of 16 AOZ1327DI Ordering Information Part Number Fault Recovery Temperature Range Package Environmental AOZ1327DI-01 Auto-Restart -40°C to +85°C DFN3x3-12L RoHS AOZ1327DI-02 Latch-Off -40°C to +85°C DFN3x3-12L RoHS All AOS products are offered in packages with Pb-free plating and compliant to RoHS standards. Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information. Pin Configuration VOUT ` VOUT POVP FLTB VIN VIN NC Exposed Pad NC ENB NC GND SS DFN3x3-12L (Top Transparent View) Pin Description Pin Number Pin Name 1, 2 VOUT Output pins. Connect to internal load. 3 POVP Over voltage protection pin. Connect POVP to GND for 24V or leave open for 5.8V OVP. 4 FLTB Fault Indicator, Open-drain output. Active Low when fault condition occurs. 5 ENB Enable logic input. Active-low. 6 GND Ground. 7 SS Soft-start pin. Connect a capacitor CSS from SS to GND to set the soft-start time. 8, 9, 10 NC No connect. Leave these pins float. 11, 12 VIN Connect to adapter or power input. EXP Exposed Thermal Pad. It is the common drain node of the internal back-back sink switches and it must be electrically isolated. Solder to a metal surface directly underneath EXP and connect to floating Cu thermal pads on multiple PCB layers through VIAs. For best thermal performance make the floating Cu pads as large as possible and connect to EXP with multiple VIAs EXP Rev. 1.2 April 2020 Pin Function www.aosmd.com Page 2 of 16 AOZ1327DI Absolute Maximum Ratings Recommend Operating Ratings Exceeding the Absolute Maximum ratings may damage the device. The device is not guaranteed to operate beyond the Maximum Operating Ratings. Parameter Parameter Rating VIN, VOUT to GND Rating -0.3V to +28V VIN, VOUT to GND 3.4V to 22V -0.3V to +6V ENB, FLTB to GND 0 to 5.5V ENB, SS, FLTB, POVP to GND Junction Temperature (TJ) +150°C Storage Temperature (TS) -65°C to +150°C ESD Rating HBM All Pins ±4kV IEC 61000-4-2: VIN ±8kV POVP, SS to GND 0 to 3V Switch Current (ISW) 0A to 8A Peak Switch Current (ISW_PK) 10ms @ 2% Duty Cycle 20A Ambient Temperature (TA) -40°C to +85°C Package Thermal Resistance 3x3 DFN-12 (JA) 36°C/W Electrical Characteristics TA = 25°C, VIN = 20V, ENB = 0V, POVP = 0V, unless otherwise specified. Symbol VVIN Parameter Conditions Input Supply Voltage VUVLO Under-voltage Lockout Threshold VUVLO_HYS Under-voltage Lockout Hysteresis VIN rising Max. Units 3.4 22 V 3.0 3.35 V mV POVP = GND, VIN rising 23.0 24.0 25.0 POVP OpenVIN rising 5.5 5.8 6 Over-voltage Lockout Threshold VOVLO_HYS Over-voltage Lockout Hysteresis tDELAY_OVP Switch Turn-off Delay upon Overvoltage VVIN-VOVLO = 500mV IVIN_ON Input Quiescent Current IVIN_OFF IVOUT_OFF RON_5V Typ. 300 VOVLO RON_20V Min. V 350 mV 1 µs IVOUT = 0 550 µA Input Shutdown Current IVOUT = 0, ENB = 5V 18 35 µA Output Leakage Current VOUT = 20V, VIN = 0V, ENB = 5V 18 35 µA IVOUT = 1A 20 mΩ VIN = 5V, IVOUT = 1A 21 mΩ Switch ON-Resistance VENB_H ENB Pin Input High Threshold ENB rising VENB_L ENB Pin Input Low Threshold ENB falling IENB_BIAS ENB Pin Input Pull-down Current ENB = 1.8 V 10 µA VFLTB_LO FLTB Pin Pull-down Voltage FLTB sinking 3mA 0.3 V VTRCB TRCB Threshold VOUT-VIN 26 mV tTRCB TRCB Delay Time VOUT-VIN = VTRCB +500mV 500 ns tD_ON Turn-On Delay Time ENB to VOUT (10%) From ENB falling edge to VOUT reaching 10% of VIN. COUT = 68µF, CSS = 5.6nF 20 ms tON Turn-On Rise Time VOUT from 10% to 90% COUT = 68uF, CSS = 5.6nF 1.9 ms tREC Auto restart interval AOZ1327DI-01 64 ms TSD Thermal Shutdown Threshold 140 C TSD_HYS Thermal Shutdown Hysteresis 30 C Rev. 1.2 April 2020 www.aosmd.com 1.4 0.6 V V Page 3 of 16 AOZ1327DI Functional Block Diagram EXP VOUT VIN Gate Drive & Charge Pump Soft Start POVP OVP Select SS FLTB Control Logic UVLO OVLO TRCB ENB VIN VOUT GND Rev. 1.2 April 2020 www.aosmd.com Page 4 of 16 AOZ1327DI Timing Diagrams ENB tON tD_ON 90% VOUT 10% Figure 1. Turn-on Delay and Turn-on Time VOVLO_HYS VOVLO VIN VOUT 400μs tDELAY_OVP 10% FLTB tREC Figure 2. OVP Delay and Recovery Time (AOZ1327DI-01) Rev. 1.2 April 2020 www.aosmd.com Page 5 of 16 AOZ1327DI Typical Characteristics CIN = 10µF, COUT = 120µF, RLOAD = 100Ω, CSS = 5.6nF, POVP = GND, TA = 25°C unless otherwise specified. VIN (2V/div) VIN (2V/div) VOUT (2V/div) VOUT (2V/div) I_IN (1A/div) I_IN (1A/div) ENB (10V/div) ENB (10V/div) 5ms/div 5ms/div Figure 3. Soft Start Delay Times (VIN = 5V) Figure 4. Soft Start Delay Times (VIN = 20V) VIN (2V/div) VIN (5V/div) VOUT (2V/div) VOUT (5V/div) I_IN (1A/div) I_IN (1A/div) 500µs/div 1ms/div Figure 5. Soft Start Ramp (VIN = 5V) Figure 6. Soft Start Ramp (VIN = 20V) VIN (5V/div) VOUT (200mV/div) VOUT (5V/div) I_IN (100mA/div) I_IN (1A/div) ENB (10V/div) FLTB (10V/div) 2µs/div 10ms/div Figure 8. True Reverse Current Blocking (VIN = 5V) Figure 7. Shutdown (VIN = 5V) Rev. 1.2 April 2020 VIN (200mV/div) www.aosmd.com Page 6 of 16 AOZ1327DI Typical Characteristics (Continued) CIN = 10µF, COUT = 120µF, RLOAD = 100Ω, CSS = 5.6nF, OVP = GND, TA = 25°C unless otherwise specified. VIN (10V/div) VIN (10V/div) VOUT (10V/div) VOUT (10V/div) I_IN (2A/div) I_IN (2A/div) FLTB (10V/div) FLTB (10V/div) 2s/div 2s/div Figure 10. Over Voltage Protection (Option -02) Figure 9. Over Voltage Protection (Option -01) VOUT (20V/div) VOUT (20V/div) I_IN (20A/div) I_IN (20A/div) VIN (10V/div) VIN (10V/div) FLTB (10V/div) FLTB (10V/div) 20ms/div 20ms/div Figure 12. Short Circuit Response (CSS = 1nF, No Load, Option -02) Figure 11. Short Circuit Response (CSS = 1nF, No Load, Option -01) VOUT (10V/div) VOUT (10V/div) IVOUT (2A/div) IVOUT (200mA/ div) 25ms/div Figure 13. IEC 61000-4-5: 40V Surge Voltage without Device Rev. 1.2 April 2020 10ms/div Figure 14. IEC 61000-4-5: 40V Surge Voltage with Device (No Capacitor on VIN) www.aosmd.com Page 7 of 16 AOZ1327DI Typical Characteristics (Continued) TA = 25°C, unless otherwise specified. 20 18 25°C 600 500 Shutdown Current (µA) Input Quiscent Current (µA) 700 85°C -40°C 400 300 200 100 0 16 14 12 85°C 10 -40°C 8 6 4 2 2 4 6 8 10 12 14 16 18 0 20 2 4 6 8 10 12 14 16 18 20 Input Voltage (V) Input Voltage (V) Figure 15. Quiescent Current vs. Input Voltage Figure 16. Shutdown Current vs. Input Voltage 30 1000 25 800 VIN OVP Threshold (V) Reverse Leakage Current (nA) 25°C 600 400 200 0 -40 POVP=GND 20 15 10 5 -20 0 20 40 60 80 POVP=Open 0 -40 100 -20 20 0 Temperature (°C) 40 60 80 100 Temperature (°C) Figure 17. Reverse Leakage Current vs. Temperature Figure 18. VIN OVP vs. Temperature 28 30 27 26 ON Resistance (m) ON Resistance (m) 25 20 15 10 24 23 22 21 20 5 0 -40 25 19 -20 0 20 40 60 80 100 Temperature (°C) 2 4 6 8 10 12 14 16 18 20 Input Voltage (V) Figure 19. On Resistance vs. Temperature Rev. 1.2 April 2020 18 0 Figure 20. On Resistance vs. Input Voltage www.aosmd.com Page 8 of 16 AOZ1327DI Detailed Description The AOZ1327DI is a high-side protection switch with adjustable soft-start, over-voltage and over-temperature protections. It is capable of operating from 3.4V to 22V and rated up to 8A. The internal power switch consists of 2 back-to-back connected N-channel MOSFETs. When the switch is enabled, the overall resistance between VIN and VOUT is only 20mΩ typical, minimizing power loss and heat generation. The back-to-back configuration of MOSFETs completely isolates VIN and VOUT when the switch is turned off, preventing leakage between the two pins. To calculate the average power dissipation during the soft-start period: ½ of the input voltage should be used as the output voltage will ramp towards the input voltage, as shown in Figure 21. For example, if the output capacitance COUT is 10µF, the input voltage VIN is 20V, the soft-start time is 2ms, and there is an additional 1A of system current (I_SYS), then the average power being dissipated by the part is: Power Delivery Capability During start-up, the voltage at VOUT linearly ramps up to the VIN voltage over a period of time set by the soft-start time. This ramp time is referred to as the soft-start time and is typically in milliseconds. Figure 21 illustrates the soft-start condition and power dissipation. VIN Fully Enhanced 2 Power =(I_SW)  x RON Power = (VIN – VOUT) x I_SW Referring to the SOA curve in Figure 22, the maximum power allowed for 2ms (DC) is 50W (2.5A x 20V or 5A x 10V). The AOZ1327DI power switch is robust enough to drive a large output capacitance with load in reasonable soft-start time. 1000.0   Fast transient load  increase Drain Current, ID (A) Charging COUT and  Supplying system load  I_SW System load only Time Figure 21. Soft start power dissipation During this soft-start time, there will be a large voltage across the power switch. Also, there will be current I_SW through the switch to charge the output capacitance. In addition, there may be load current to the downstream system as well. This total current is calculated as: In the soft-start condition, the switch is operating in the linear mode, and power dissipation is high. The ability to handle this power is largely a function of the power MOSFET linear mode SOA and good package thermal performance (Rthj-c) as the soft-start ramp time is in milliseconds. Rthj-ambient, which is more a function of PCB thermal performance, doesn't play a role. With a high-reliability MOSFET as the power switch and superior packaging technology, the AOZ1327DI is capable of dissipating this power. The power dissipated is: Rev. 1.2 April 2020 100.0 I DM limited 10us 100us 10.0 160us RDS(ON) 300us 500us 1ms 1.0 10m s DC 1s 0.1 0.0 0.01 TC = 25°C 0.1 1 10 100 Drain - Source Voltage, VDS (V) Figure 22: Safe Operating Area (SOA) curves for Sink power switch After soft-start is completed, the power switch is fully on, and it is at its lowest resistance. The power switch acts as a resistor. Under this condition, the power dissipation is much lower than the soft-start period. However, as this is a continuous current, a low on-resistance is required to minimize power dissipation. Attention must be paid to board layout so that losses dissipated in the sinking switch are dissipated to the PCB and hence the ambient. With a low on-resistance of 20mΩ, the AOZ1327DI provides the most efficient power delivery without much resistive power dissipation. While Type C power delivery is limited to 20V @ 5A or a 100W, many high-end laptops require peak currents far www.aosmd.com Page 9 of 16 AOZ1327DI in excess of the 5A. While the thermal design current (TDC) for a CPU may be low, peak current (ICCmax in the case of Intel and EDP in the case of AMD) of many systemsis often 2 x thermal design current. These events are typical of short duration (