AOZ2263NQI-12
28V/12A Synchronous EZBuckTM Regulator
General Description
Features
The AOZ2263NQI-12 is a high-efficiency, easy-to-use
DC/DC synchronous buck regulator that operates up to
28V. The device is capable of supplying 12A of
continuous output current with an output voltage
adjustable down to 0.6V ±1%.
Wide input voltage range
A proprietary constant on-time PWM control with input
feed-forward results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input voltage range. The on time can be
externally programmed up to 2.6µs.
– 2V to 28V
12A continuous output current
Output voltage adjustable down to 0.6V (±1.0%)
Low RDS(ON) internal NFETs
– 11m high-side
– 8m low-side
Constant On-Time with input feed-forward
Programmable on-time up to 2.6µs
The device features multiple protection functions such as
VCC under-voltage lockout, cycle-by-cycle current limit,
output over-voltage protection, short-circuit protection,
and thermal shutdown.
Selectable PFM light-load operation
The AOZ2263NQI-12 is available in a 4mm×4mm QFN23L package and is rated over a -40°C to +85°C ambient
temperature range.
Discharge Function
Ceramic capacitor stable
Adjustable soft start
Ripple reduction
Power Good output
Integrated bootstrap diode
Adjustable cycle-by-cycle current limit
Short-circuit protection
Over-voltage protection
Thermal shutdown
Thermally enhanced 4mm x 4mm QFN-23L package
Applications
Portable computers
Compact desktop PCs
Servers
Graphics cards
Set-top boxes
LCD TVs
Cable modems
Point-of-load DC/DC converters
Telecom/Networking/Datacom equipment
Rev. 1.1 August 2022
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Page 1 of 17
AOZ2263NQI-12
Typical Application
RTON
INPUT
2V to 28V
IN
TON
C2
22µF
OCS
ROCS
VCC
5V
R3
100k
C4
4.7µF
POWER GOOD
AOZ2263NQI-12
C5
0.1µF
BST
PGOOD
LX
OFF
ON
EN/DISCHG
L1
1µH
OUTPUT
1.05V, 12A
R2
FB
MODE
C3
132µF
R1
SS
AGND
CSS
PGND
POWER GROUND
ANALOG GROUND
Rev. 1.1 August 2022
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Page 2 of 17
AOZ2263NQI-12
Ordering Information
Part Number
Ambient Temperature Range
Package
Environmental
AOZ2263NQI-12
-40°C to +85°C
23-Pin 4mm x 4mm QFN
Green Product
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
SS
IN
VCC
BST
OCS
LX
23
22
21
20
19
18
PGOOD
1
17
LX
EN/DISCHG
2
16
LX
MODE
3
15
PGND
14
PGND
LX
IN
11
PGND
LX
12
10
6
LX
TON
9
PGND
IN
13
8
5
IN
FB
7
4
IN
AGND
23-Pin 4mm x 4mm QFN
Top View
Rev. 1.1 August 2022
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Page 3 of 17
AOZ2263NQI-12
Pin Description
Pin Number
Pin Name
Pin Function
PGOOD
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 15% lower than
the nominal regulation voltage or 50% higher than the nominal regulation voltage.
PGOOD is pulled low during soft-start and shut down.
2
EN/DISCHG
Enable Input. The AOZ2263NQI-12 is enabled when EN is pulled high. The device shuts
down when EN is pulled low. Assert EN to high for power-up after IN and VCC are well
supplied. Power-off the device by EN off is suggested.
Set voltage level higher/lower than discharge threshold when PGOOD pull high to
enable/disable output discharge function.
3
MODE
PFM Selection Input. Connect MODE pin to VCC for forced PWM operation. Connect
MODE pin to ground for PFM operation to improve light load efficiency.
4
AGND
Analog Ground.
5
FB
6
TON
7, 8, 9, 22
IN
12, 13, 14, 15
PGND
Power Ground.
10, 11, 16, 17, 18
LX
Switching Node.
19
OCS
Current limitation level setting pin. Connect a resistor between OCS and GND to set over
current protection level. No capacitor is allowed between OCS and AGND.
20
BST
Bootstrap Capacitor Connection. The AOZ2263NQI-12 includes an internal bootstrap
diode. Connect an external capacitor between BST and LX as shown in the Typical
Application diagram.
21
VCC
Supply Input for analog functions. Bypass VCC to AGND with a 4.7µF~10µF ceramic
capacitor. Place the capacitor close to VCC pin.
23
SS
1
Rev. 1.1 August 2022
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
regulator’s output and AGND.
On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
Supply Input. IN is the regulator input. All IN pins must be connected together.
Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
soft-start time.
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Page 4 of 17
AOZ2263NQI-12
Absolute Maximum Ratings
Maximum Operating Ratings
Exceeding the Absolute Maximum Ratings may damage the
device.
The device is not guaranteed to operate beyond the
Maximum Operating Ratings.
Parameter
Rating
IN, TON to AGND
Parameter
-0.3V to 30V
Supply Voltage (VIN)
LX to AGND
-1.0V to 30V
Output Voltage Range
BST to AGND
-0.3V to 36V
Ambient Temperature (TA)
(1)
SS, OCS, PGOOD, FB to AGND
-0.3V to 6V
EN/DISCH, VCC, MODE to AGND
-0.3V to 6V
PGND to AGND
Rating
2V to 28V
0.6V to 0.85*VIN
-40°C to +85°C
Package Thermal Resistance
(θJA)
32°C/W
-0.3V to +0.3V
Junction Temperature (TJ)
+150°C
Storage Temperature (TS)
-65°C to +150°C
ESD Rating(2)
2kV
Notes:
1. LX to PGND Transient (t 2V, PFM mode
IOFF
Shutdown Supply Current
VEN = 0V
VFB
Feedback Voltage
TA = 25°C
IFB
Min.
Typ.
2
3.2
4.2
3.9
Max
Units
28
V
4.5
V
V
350
0.594
µA
1
20
µA
0.600
0.606
V
Load Regulation
0.5
%
Line Regulation
1
%
FB Input Bias Current
200
nA
0.5
V
V
Enable/Discharge
VEN
EN Input Threshold
VEN_HYS
EN Input Hysteresis
VDIS
Discharge Threshold
Off threshold
On threshold
1.2
100
When PGOOD from 0 to 1
250
mV
1.5
V
MODE Control
VMODE
MODE Input Threshold
VMODEHYS
MODE Input Hysteresis
PFM Mode threshold
Force PWM threshold
0.5
1.2
100
V
V
mV
Modulator
TON
On Time
200
ns
TON_MIN
Minimum On Time
100
ns
TON_MAX
Maximum On Time
2.6
µs
TOFF_MIN
Minimum Off Time
300
ns
Rev. 1.1 August 2022
RTON = 100k, VIN = 12V
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Page 5 of 17
AOZ2263NQI-12
Electrical Characteristics
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.
Symbol
Parameter
Conditions
Min.
Typ.
Max
Units
7
11
15
µA
0.5
V
±1
µA
Soft-Start
ISS_OUT
SS Source Current
VSS = 0V
CSS = 0.001µF to 0.1µF
Power Good Signal
VPG_LOW
PGOOD Low Voltage
IOL = 1mA
PGOOD Leakage Current
VPGH
PGOOD Threshold
(Low Level to High Level)
FB rising
90
%
VPGL
PGOOD Threshold
(High Level to Low Level)
FB rising
FB falling
150
85
%
%
5
%
PGOOD Threshold Hysteresis
Under Voltage and Over Voltage Protection
VPL
Under Voltage Threshold
TPL
Under Voltage Delay Time
VPH
Over Voltage Threshold
FB falling
FB rising
50
%
32
µs
150
%
Power Stage Output
RDS(ON)
RDS(ON)
High-Side NFET On-Resistance
VIN = 12V, VCC = 5V
High-Side NFET Leakage
VEN = 0V, VLX = 0V
Low-Side NFET On-Resistance
VLX = 12V, VCC = 5V
Low-Side NFET Leakage
VEN = 0V
11
m
10
8
µA
m
10
µA
Thermal Protection
Thermal Shutdown Threshold
Rev. 1.1 August 2022
TJ rising
TJ falling
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150
100
°C
°C
Page 6 of 17
AOZ2263NQI-12
Functional Block Diagram
BST
IN
PGood
VCC
DISCHARGE
UVLO
EN/DIS
Reference
& Bias
TOFF_MIN
Q
Timer
Error Comp
0.6V
SS
ISENSE
(AC)
FB
PG Logic
S
Q
R
FB
Decode
LX
ILIM Comp
Current
Information
Processing
+
OCS
ISENSE
ISENSE (AC)
LX
Vcc
TON
OTP
Q
Timer
MODE
TON
TON
Generator
Light Load
Threshold
Light Load
Comp
Discharge
Pulse
ISENSE
DIS_On
EN
PGND
Rev. 1.1 August 2022
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AGND
Page 7 of 17
AOZ2263NQI-12
Typical Performance Characteristics
TA = 25°C, VIN = 19V, VOUT = 1V, fS = 450kHz, unless otherwise specified.
Normal Operation
Load Transient 0A to 12A
ILX
(5A/div)
ILX
(5A/div)
VO ripple
(50mV/div)
VO ripple
(50mV/div)
VLX
(20V/div)
10µs/div
2ms/div
Full Load Start-up
Short Circuit Protection
VLX
(20V/div)
VLX
(20V/div)
EN
(5V/div)
ILX
(10A/div)
ILX
(5A/div)
VO
(500mV/div)
VO
(500mV/div)
2ms/div
50µs/div
Efficiency vs. Load Current
100
90
80
VOUT = 1V
Efficiency (%)
70
60
50
40
Vin = 6.5V
30
Vin = 12V
20
Vin = 19V
10
Vin = 24V
0
0
Rev. 1.1 August 2022
2.0
8.0
6.0
Output Current (A)
4.0
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10.0
12.0
Page 8 of 17
AOZ2263NQI-12
Detailed Description
The AOZ2263NQI-12 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook
computers. The regulator is capable of supplying 12A of
continuous output current with an output voltage
adjustable down to 0.6V. The programmable on-time
from 100ns to 2.6µs enables optimizing the configuration
for PCB area and efficiency.
The input voltage of AOZ2263NQI-12 can be as low as
2.7JuneV. The highest input voltage of AOZ2263NQI-12
can be 28V. Constant on-time PWM with input feedforward control scheme results in ultra-fast transient
response while maintaining relatively constant switching
frequency over the entire input range. True AC current
mode control scheme guarantees the regulator can be
stable with ceramics output capacitor. The switching
frequency can be externally programmed. Protection
features include VCC under-voltage lockout, current limit,
output over voltage and under voltage protection, shortcircuit protection, and thermal shutdown.
The AOZ2263NQI-12 is available in 23-pin 4mm×4mm
QFN package.
Enable and Soft Start
The AOZ2263NQI-12 has external soft start feature to
limit in-rush current and ensure the output voltage ramps
up smoothly to regulate voltage. A soft start process
begins when VCC rises to 4.5V and voltage on EN pin is
HIGH. An internal current source charges the external
soft-start capacitor; the FB voltage follows the voltage of
soft-start pin (VSS) when it is lower than 0.6V. When VSS
is higher than 0.6V, the FB voltage is regulated by
internal precise band-gap voltage (0.6V). When VSS is
higher than 1.2V, the PGOOD signal is high. The softstart time for PGOOD can be calculated by the following
formula:
TSS(µs) = 120 x CSS(nF)
Rev. 1.1 August 2022
If CSS is 1nF, the soft-start time will be 120µs; if CSS is
3.6nF, the soft-start time will be 432µs.
VOUT
VCC Level
VSS
1.2V
0.6VREF
VEN
PGOOD
TSS
Figure 1. Soft-Start Sequence of AOZ2263NQI-12
Enable and Discharge Function
AOZ2263NQI-12 pin 2 is a multi-function pin, which
combines enable and discharge function together.
Discharge function on/off is determined by the voltage
level on this pin at PGOOD rising edge. Figure 2
illustrates how to activate discharge function. Once
PGOOD signal rises up, AOZ2263NQI-12 detects the
voltage on EN/DIS pin. Discharge function will be
activated (Dis_on set to 1) only if EN/DIS pin voltage is
under discharge threshold at that moment. Dis_on keeps
high until next PGOOD rising edge and will be
overwritten. Discharge function won’t be activated
(Dis_on set to 0) if EN/DIS pin voltage is over discharge
threshold at PGOOD rising edge. Dis_on keeps low until
next PGOOD rising edge and will be overwritten.
AOZ2263NQI-12 enters discharge mode if Dis_on signal
is high when EN/DIS pin voltage is lower than EN off
threshold. Discharge MOSFET is always turn-on during
discharge mode. At the mean while, low-side MOSFET
turns on and off to quickly discharge output voltage. All
protection and COT are disabled during discharge mode.
Discharge mode operation ended when FB voltage is
under 40mV.
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Page 9 of 17
AOZ2263NQI-12
Discharge threshold
= 1.5V
EN/DIS
EN on threshold = 1.2V
EN off threshold = 0.5V
PGOOD
Dis_on
Discharge
mode
activated
No PGOOD
One shot,
Discharge
Mode keep
activated
No PGOOD
One shot,
Discharge
Mode keep
disabled
Discharge
mode not
activated
Figure 2. AOZ2263NQI-12 Discharge Function On/Off Setting
Constant-On-Time PWM Control with Input Feed
Forward
The internal circuit of AOZ2261NQI-12 sets the on-time
of high-side switch inversely proportional to the IN.
The control algorithm of AOZ2263NQI-12 is constant-ontime PWM Control with input feed-forward.
TON v
The simplified control schematic is shown in Figure. 3.
The high-side switch on-time is determined solely by a
one-shot whose pulse width can be programmed by one
external resistor and is inversely proportional to input
voltage (IN). The one-shot is triggered when the internal
0.6V is higher than the combined information of FB
voltage and the AC current information of inductor, which
is processed and obtained through the sensed lower-side
MOSFET current once it turns-on. The added AC current
information can help the stability of constant-on time
control even with pure ceramic output capacitors, which
have very low ESR. The AC current information has no
DC offset, which does not cause offset with output load
change, which is fundamentally different from other V2
constant-on time control schemes.
IN
FB Voltage/
AC Current Information
PWM
Programmable
One-Shot
–
FSW
VOUT
VIN × T ON
(2)
Once the product of VIN x TON is constant, the switching
frequency keeps constant and is independent with input
voltage.
An external resistor between the IN and TON pin sets the
switching on-time according to the following equation:
((ns)
ns)
TTON
ON
R
( kΩ )
RTON
TON ( kΩ ) × 25
× 25
V
(V)
VIN
IN (V)
(3)
(3)
Then, the switching frequency can be estimated by:
FSW ( kHz) =
VOUT
VOUT
6
4
× 10 =
× 4 × 10 (4)
VIN* T ON( ns )
RTON (kΩ)
0.6V
Figure 3. Simplified Control Schematic of AOZ2263NQI-12
The constant-on-time PWM control architecture is a
pseudo-fixed frequency with input voltage feed-forward.
Rev. 1.1 August 2022
(1)
To achieve the flux balance of inductor, the buck
converter has the equation:
Comp
+
RTON( kΩ )
VIN (V)
If VOUT is 1.05V, VIN is 19V, and set FS = 500kHz.
According to equation 3, TON = 110ns is needed. Finally,
use the TON to RTON curve, we can find out RTON is
84k.
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Page 10 of 17
AOZ2263NQI-12
This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency clock
generator.
describes the action when over current condition
happens.
True Current Mode Control
The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large enough as
an effective current-sense resistor. Ceramic capacitors
usually can not be used as output capacitor.
The AOZ2263NQI-12 senses the low-side MOSFET
current and processes it into DC current and AC current
information using AOS proprietary technique. The AC
current information is decoded and added on the FB pin
on phase. With AC current information, the stability of
constant-on-time control is significantly improved even
without the help of output capacitor’s ESR; and thus the
pure ceramic capacitor solution can be applied. The pure
ceramic capacitor solution can significantly reduce the
output ripple (no ESR caused overshoot and undershoot)
and less board area design.
Current-Limit Protection
The AOZ2263NQI-12 has the current-limit protection by
using RDS(ON) of the low-side MOSFET to be as current
sensing. To detect real current information, a minimum
constant off (300ns typical) is implemented after a
constant on time. If the current exceeds the current-limit
threshold, the PWM controller is not allowed to initiate a
new cycle. The actual peak current is greater than the
current-limit threshold by an amount equal to the inductor
ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a
function of the inductor value and input and output
voltages. The current limit will keep the low-side
MOSFET on and will not allow another high-side on-time,
until the current in the low-side MOSFET reduces below
the current limit.
Current-Limit Setting
The current-limit threshold mentioned in last paragraph
can be set by connecting a resistor between OCS pin
and ground. The value of the current limit resistor (ROCS)
can be calculated according to the equation below. And
the value of ROCS is need higher than 18k. A capacitor
from OCS pin to ground would impact the current limit
accuracy and is not allowed.
IL_LIMIT(A)
1.11*ROCS(kΩ) - 2.22
(5)
As shown in Figure 4, once the magnitude of switch node
voltage VLX is larger than VOCS, over current signal is
triggered. The larger ROCS is, the higher over current
threshold will be. Section Current-Limit Protection
Rev. 1.1 August 2022
IREF
OCS
OCL signal
ROCS
LX = -IL x RDS(ON)
GND
OCL level ROCS
Figure 4. Illustration of Current Limit Setting
Output Voltage Under-Voltage Protection
If the output voltage is lower than 50% by over-current or
short circuit, AOZ2263NQI-12 will wait for 32µs (typical)
and turns-off both high-side and low-side MOSFETs and
latches off. Only when triggered, the enable can restart
the AOZ2263NQI-12 again.
Output Voltage Over-Voltage Protection
The threshold of OVP is set 50% higher than 0.6V. When
the VFB voltage exceeds the OVP threshold, high-side
MOSFET is turn-off and low-side MOSFETs is turn-on
1µs, then latch-off.
Power Good Output
The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the
output voltage is 15% below the nominal regulation
voltage, the PGOOD is pulled low. When the output
voltage is 50% higher than the nominal regulation
voltage, the PGOOD is also pull low.
When combined with the under-voltage-protection circuit,
this current limit method is effective in almost every
circumstance.
Ripple Reduction
When switching frequency is down to half of setting
during PFM, AOZ2263NQI-12 actively reduces on-time
pulse width to reduce inductor current ripple and output
voltage ripple. Ripple reduction not only reduces half of
voltage ripple but also decreases the chance of acoustic
noise under light load.
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Page 11 of 17
AOZ2263NQI-12
Application Information
The basic AOZ2263NQI-12 application circuit is shown in
page 2. Component selection is explained below.
Input Capacitor
The input capacitor must be connected to the IN pins and
PGND pin of the AOZ2263NQI-12 to maintain steady
input voltage and filter out the pulsing input current. A
small decoupling capacitor, usually 4.7µF, should be
connected to the VCC pin and AGND pin for stable
operation of the AOZ2263NQI-12. The voltage rating of
input capacitor must be greater than maximum input
voltage plus ripple voltage.
Inductor
The input ripple voltage can be approximated by
equation below:
IOUT
VIN = ----------------f CIN
VOUT
1 – --------VIN
VOUT
--------VIN
(6)
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
VOUT
VOUT
--------- 1 – --------VIN
VIN
ICIN_RMS = IOUT
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
(7)
if let m equal the conversion ratio:
VOUT
--------- = m
VIN
(8)
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 5. It can be seen that when VO is half of VIN, CIN is
under the worst current stress. The worst current stress
on CIN is 0.5 x IO.
0.5
0.4
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
OUT
∆ IL = V
-------f L
VOUT
1 – --------VIN
(9)
The peak inductor current is:
I
I Lpeak = IOUT + -------L2
(10)
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
50% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor needs to be checked for
thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
ICIN_RMS(m) 0.3
IO
0.2
0.1
0
0
0.5
m
1
Figure 5. ICIN vs. Voltage Conversion Ratio
Rev. 1.1 August 2022
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Page 12 of 17
AOZ2263NQI-12
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value, and ESR. It can be calculated by the equation
below;
VOUT =
1
ESR C + ------------------------O
8 f CO
IL
(11)
where CO is output capacitor value and ESRCO is the
Equivalent Series Resistor of output capacitor.
When a low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
VOUT =
IL
1
------------------------8 f CO
(12)
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
VOUT =
IL
ESR C
(13)
O
In the AOZ2263NQI-12 buck regulator circuit, high
pulsing current flows through two circuit loops. The first
loop starts from the input capacitors, to the VIN pin, to
the LX pins, to the filter inductor, to the output capacitor
and load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the low side switch.
Current flows in the second loop when the low side
switch is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ2263NQI-12.
In the AOZ2263NQI-12 buck regulator circuit, the major
power dissipating components are the AOZ2263NQI-12
and the output inductor. The total power dissipation of
converter circuit can be measured by input power minus
output power.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
(14)
VIN u IIN – VOUT u IOUT
Ptotal_loss
(15)
The power dissipation of inductor can be approximately
calculated by DCR of inductor and output current.
Pinductor_loss
IOUT2 u Rinductor u 1.1
(16)
The actual junction temperature can be calculated with
power dissipation in the AOZ2263NQI-12 and thermal
impedance from junction to ambient.
Tjunction
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
IL
I CO_RMS = ---------12
Thermal Management and Layout
Consideration
(Ptotal_loss Ptotal_loss) u θJA + TA
(17)
The maximum junction temperature of AOZ2263NQI-12
is 150ºC, which limits the maximum load current
capability.
The thermal performance of the AOZ2263NQI-12 is
strongly affected by the PCB layout. Extra care should be
taken by users during design process to ensure that the
IC will operate under the recommended environmental
conditions.
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
Rev. 1.1 August 2022
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Page 13 of 17
AOZ2263NQI-12
Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help
thermal dissipation.
5. Voltage divider R1 and R2 should be placed as close
as possible to FB and AGND.
6. RTON should be connected as close as possible to
Pin 6 (TON pin).
7. A ground plane is preferred.
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance
thermal conduction path. Connect a large copper
plane to IN pins to help thermal dissipation.
8. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
9. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
3. Input capacitors should be connected to the IN pin
and the PGND pin as close as possible to reduce the
switching spikes.
10. The current limit resistor (ROCS) should be connected
as close as possible to Pin 19 (OCS). Place three GND
vias to connect to inner ground layer. Keep distance
between Rocs and Lx plane.
4. Decoupling capacitor CVCC should be connected to
VCC and AGND as close as possible.
AGND
EN
PGOOD
2
1
11
3
LX
LX
10
IN
LX
4
9
AGND
IN
5
8
FB
IN
6
GND
23
SS
22
IN
21
VCC
20
BST
19
OCS
18
LX
GND
17 LX
16 LX
15 PGND
14 PGND
13 PGND
12 PGND
PGND
7
TON
VIN
IN
MODE
VOUT
VOUT
Rev. 1.1 August 2022
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Page 14 of 17
AOZ2263NQI-12
Package Dimensions, QFN4x4B-23L
Rev. 1.1 August 2022
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Page 15 of 17
AOZ2263NQI-12
Tape and Reel Dimensions, QFN4x4B-23L
Rev. 1.1 August 2022
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Page 16 of 17
AOZ2263NQI-12
Part Marking
AOZ2263NQI-12
(QFN 4x4)
BKNC
Part Number Code
YWLT
Year & Week Code
Assembly Lot Code
LEGAL DISCLAIMER
Applications or uses as critical components in life support devices or systems are not authorized. Alpha and Omega
Semiconductor does not assume any liability arising out of such applications or uses of its products. AOS reserves
the right to make changes to product specifications without notice. It is the responsibility of the customer to evaluate
suitability of the product for their intended application. Customer shall comply with applicable legal requirements,
including all applicable export control rules, regulations and limitations.
AOS's products are provided subject to AOS’s terms and conditions of sale which are set forth at:
http://www.aosmd.com/terms_and_conditions_of_sale
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 1.1 August 2022
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Page 17 of 17