AOZ3015AI
EZBuck™ 3 A Synchronous Buck Regulator
Not Recommended For New Designs
General Description
Features
The AOZ3015AI is a high efficiency, easy to use, 3 A
synchronous buck regulator. The AOZ3015AI works from
4.5 V to 18 V input voltage range, and provides up to 3 A
of continuous output current with an output voltage
adjustable down to 0.8 V.
4.5 V to 18 V operating input voltage range
The AOZ3015AI comes in a SO-8 package and is rated
over a -40 °C to +85 °C operating ambient temperature
range.
Up to 95 % efficiency
Synchronous Buck: 65 mΩ internal high-side switch
and 30 mΩ internal low-side switch (at 12 V)
s
PEM (pulse energy mode) enables >80% efficiency
es
Internal soft start
ig
n
with IOUT = 10 mA (VIN = 12 V, VOUT = 5 V)
Output voltage adjustable to 0.8 V
D
3 A continuous output current
Replacement Parts:
AOZ6663DI
AOZ6683CI
ew
500 kHz PWM operation
Cycle-by-cycle current limit
N
Pre-bias start-up
Short-circuit protection
Fo
r
Thermal shutdown
SO-8 package
en
de
d
Applications
LCD TV
Set top boxes
DVD and Blu-ray players/recorders
om
m
Cable modems
ec
Typical Application
Point of load DC/DC converters
CCC
C1
10µF
VIN
ot
R
VIN
N
EN
VCC
AOZ3015AI
LX
VOUT
L1
R1
COMP
FB
RC
AGND
PGND
C2, C3
22µF
R2
CC
Figure 1. 3 A Synchronous Buck Regulator, Fs = 500 kHz
Rev. 1.1 June 2013
www.aosmd.com
Page 1 of 14
AOZ3015AI
Ordering Information
Part Number
Ambient Temperature Range
Package
Environmental
AOZ3015AI
-40 °C to +85 °C
SO-8
Green Product
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
EN
VIN
2
7
LX
AGND
3
6
COMP
VCC
4
5
FB
Fo
r
(Top View)
N
SO-8
es
8
D
1
ew
PGND
ig
n
s
Pin Configuration
1
PGND
2
VIN
3
AGND
4
VCC
5
FB
ec
COMP
R
6
Pin Function
Power ground. PGND needs to be electrically connected to AGND.
en
Pin Name
Supply voltage input. When VIN rises above the UVLO threshold and EN is logic high,
the device starts up.
om
m
Pin Number
de
d
Pin Description
Analog ground. AGND is the reference point for controller section. AGND needs to be
electrically connected to PGND.
Internal LDO output.
Feedback input. The FB pin is used to set the output voltage via a resistive voltage divider
between the output and AGND.
External loop compensation pin. Connect a RC network between COMP and AGND to
compensate the control loop.
LX
Switching node. LX is the drain of the internal power FETs.
8
EN
Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the
device. If on/off control in not needed, connect EN to VIN and do not leave it open.
N
ot
7
Rev. 1.1 June 2013
www.aosmd.com
Page 2 of 14
AOZ3015AI
Block Diagram
VCC
UVLO
& POR
EN
VIN
LDO
Regulator
OTP
+
ISen
Iinfo
Softstart
–
s
Reference
& Bias
Q1
ig
n
ILimit
FB
–
–
PWM
Control
Logic
PWM
Comp
Level
Shifter
+
FET
Driver
D
EAmp
LX
Q2
ew
+
N
500kHz
Oscillator
Over-Voltage
Protection
Comparator
Fo
r
COMP
es
+
+
+
0.96V
d
Iinfo
om
m
Iinfo
de
PWM/PEM
Master Control
PEM Control
Logic
en
Vref
–
AGND
PGND
Recommended Operating Conditions
Exceeding the Absolute Maximum Ratings may damage the
device.
The device is not guaranteed to operate beyond the Maximum
Recommended Operating Conditions.
R
ec
Absolute Maximum Ratings
Parameter
ot
Supply Voltage (VIN)
N
LX to AGND
LX to AGND (
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