AOZ6643DI

AOZ6643DI 3A Synchronous EZBuckTM Regulator General Description Features The AOZ6643DI is a current-mode step down regulator with integrated high-side NMOS switch and low-side NMOS switch that operates up to 18V. The device is capable of supplying 3A of continuous output current with an output voltage adjustable down to 0.8V (±1.5%).  4.5V to 18V wide input voltage range Features include, enable control, Power-On Reset, input under-voltage lockout, output over-voltage protection, internal soft-start and thermal shutdown. The AOZ6643DI is available in a 3mm x 3mm DFN-8L package and is rated over a -40°C to +85°C ambient temperature range.  Low RDS(ON) internal NFETs – 80m high-side – 30m low-side  Internal soft start  Output voltage adjustable down to 0.8V (±1.5%)  3A continuous output current  500kHz PWM operation  Cycle-by-cycle current limit  Ceramic capacitor stable  Pre-bias start-up  Extensive protection features  Small 3mm x 3mm DFN-8L package Applications  Point-of-load DC/DC converters  LCD TVs  Cable modems Typical Application 12VIN CIN CVCC VIN VCC BST RBST - 0Ω CBST - 0.1μF EN AOZ6643DI LXS LX COMP L1 4.7μH R1 FB RC GND CC 3.3VOUT COUT R2 Figure 1. 3A Synchronous Buck Regulator, Fs = 500kHz Rev.1.0 July 2016 www.aosmd.com Page 1 of 13 AOZ6643DI Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ6643DI -40°C to +85°C 8-Pin 3mm x 3mm DFN Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information. Pin Configuration EN 1 8 FB LXS 2 7 COMP VIN 3 6 VCC GND 4 5 BST LX 8-Pin 3mm x 3mm DFN (Top View) Pin Description Pin Number Pin Name 1 EN Enable Input. Logic high to enable the device. 2 LXS Source of the internal HS FET. This pin has to be externally connected to exposed pad LX through the PCB. 3 VIN Supply Input. When VIN rises above the UVLO threshold and EN is logic high, the device starts up. 4 GND Power Ground. 5 BST Bootstrap. Requires a capacitor connection between LX and BST to form a floating supply across the high-side switch driver. 6 VCC Internal LDO Output. 7 COMP 8 Exposed Pad Rev.1.0 July 2016 Pin Function External Loop Compensation Pin. Connect a RC network between COMP and GND to compensate the control loop. FB Feedback Input. The FB pin is used to set the output voltage with a resistive voltagedivider between the regulator’s output and AGND. LX Switching Node. LX is the drain of the internal LS power FETs. www.aosmd.com Page 2 of 13 AOZ6643DI Absolute Maximum Ratings Maximum Operating Ratings Exceeding the Absolute Maximum Ratings may damage the device. The device is not guaranteed to operate beyond the Maximum Operating ratings. Parameter Rating Supply Voltage (VIN) EN Parameter 20V Supply Voltage (VIN) 20V Output Voltage Range -0.7V to VIN+0.3V LX to GND LX to GND (20ns) -5V to 22V VCC, FB, COMP to AGND -0.3V to 6V VBST to LX 6V Junction Temperature (TJ) +150°C Storage Temperature (TS) -65°C to +150°C ESD Rating (1) 2kV Rating 4.5V to 18V 0.8V to 0.85*VIN Ambient Temperature (TA) -40°C to +85°C Package Thermal Resistance (θJA)(2) 50°C/W Note: 2. The value of θJA is measured with the device mounted on a 1-in2 FR-4 four layer board with 2oz copper and Vias, in a still air environment with TA = 25°C. The value in any given application depends on the user’s specification board design. Note: 1. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5k in series with 100pF. Electrical Characteristics TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified(3). Symbol VIN VCC_UVLO VCC Parameter Conditions Supply Voltage Under-Voltage Lockout Threshold VIN rising VIN falling 3.3 VCC Regulator ICC = 5mA Supply Current (Quiescent) IOUT = 0V, VFB = 1.2V, VEN > 2V IOFF Shutdown Supply Current VEN = 0V VFB Feedback Voltage TA = 25°C Load Regulation 0.1A < IOUT < 2.9A Line Regulation 8V < VIN < 16V IFB FB Input Current VEN EN Input Threshold VEN_HYS EN Input Hysteresis Typ. 4.5 VCC Load Regulation IIN Min. Off threshold On threshold 0.788 4.2 3.7 Max Units 18 V 4.45 5 V 3 % 0.8 mA 2 5 A 0.800 0.812 V 0.5 % 1 % 200 nA 0.6 V 2 250 EN Leakage Current mV A 10 SS Time V 4 ms Modulator fO Frequency 400 500 600 kHz DMAX Maximum Duty Cycle 85 % TMIN Controllable Minimum On Time 90 ns Current Sense Transconductance 8 A/V Error Amplifier Transconductance 500 A/V Rev.1.0 July 2016 www.aosmd.com Page 3 of 13 AOZ6643DI Electrical Characteristics (Continued) TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified(3). Symbol Parameter Conditions Min. Typ. Max Units Protection ILIM Current Limit 3.5 4.5 6.5 A 850 950 100 1050 mV Over Voltage Protection OVP shutdown threshold OVP hysteresis Over Temperature Shutdown Limit TJ rising TJ falling 150 100 °C HS RDS(ON) High-Side Switch On-Resistance VBST-LX = 5V 80 m LS RDS(ON) Low-Side Switch On-Resistance VCC = 5V 30 m VOVP Output Stage Note: 3. The device is not guaranteed to operate beyond the Maximum Operating Ratings. Specifications in Bold indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design. Functional Block Diagram BST VCC UVLO & POR EN VIN 5V LDO Regulator ISEN Reference Soft Start & Bias Q1 ILIMIT SS 0.8V EAMP PWM/PEM Control Logic FB Level Shifter LXS + FET Driver LX Q2 500KHz Oscillator COMP GND Rev.1.0 July 2016 www.aosmd.com Page 4 of 13 AOZ6643DI Typical Performance Characteristics Circuit of Typical Application. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified. Full Load Operation Light Load Operation LX 5V/div LX 10V/div IL 1A/div Vo ripple 50mV/div Vo ripple 50mV/div Vin ripple 50mV/div Vin ripple 0.2V/div IL 1A/div 2μs/div 2μs/div Short Circuit Protection Short Circuit Recovery LX 5V/div LX 5V/div Vo 1V/div Vo 1V/div IL 2A/div IL 2A/div 20ms/div 20ms/div Full Load Start-up 50% to 100% Load Transient Vin 5V/div Vo 1V/div Vo 0.2V/div Io 1A/div IL 2A/div 2ms/div Rev.1.0 July 2016 100μs/div www.aosmd.com Page 5 of 13 AOZ6643DI Efficiency Efficiency vs. Load Current (VIN=12V, f=500kHz) 100 Efficiency (%) 90 80 70 5VOUT, L=6.8μH 3.3VOUT, L=4.7μH 2.5VOUT, L=4.7μH 1.8VOUT, L=2.2μH 1.2VOUT, L=2.2μH 60 50 40 0 0.5 1.0 1.5 2.0 2.5 3.0 down by the external voltage divider at the FB pin. The difference of the FB pin voltage and reference is amplified by the internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against the current signal, which is sum of inductor current signal and ramp compensation signal, at PWM comparator input. If the current signal is less than the error voltage, the internal high-side switch is on. The inductor current flows from the input through the inductor to the output. When the current signal exceeds the error voltage, the high-side switch is off. The inductor current is freewheeling through the internal low-side NMOSFET switch to output. The internal adaptive FET driver guarantees no turn on overlap of both high-side and low-side switch. Output Current (A) Detailed Description The AOZ6643DI is a current-mode step down regulator with integrated high-side NMOS switch and low-side NMOS switch. It operates from a 4.5V to 18V input voltage range and supplies up to 3A of load current. Features include, enable control, Power-On Reset, input under voltage lockout, output over voltage protection, internal soft-start and thermal shut down. The AOZ6643DI is available in 8-pin 3mm x 3mm DFN package. Enable and Soft Start The AOZ6643DI has internal soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. A soft start process begins when the input voltage rises to 4.1V and voltage on EN pin is HIGH. In soft start process, the output voltage is typically ramped to regulation voltage in 4ms. The 4ms soft start time is set internally. The EN pin of the AOZ6643DI is active high. Connect the EN pin to VIN if enable function is not used. Pull it to ground will disable the AOZ6643DI. Do not leave it open. The voltage on EN pin must be above 2V to enable the device. When the voltage on EN pin falls below 0.6V, the AOZ6643DI is disabled. Comparing with regulators using freewheeling Schottky diodes, the AOZ6643DI uses freewheeling NMOSFET to realize synchronous rectification. It greatly improves the converter efficiency and reduces power loss in the lowside switch. The AOZ6643DI uses a N-Channel MOSFET as the high-side switch. Since the NMOSFET requires a gate voltage higher than the input voltage, a boost capacitor is needed between LXS pin and BST pin to drive the gate. The boost capacitor is charged while LX is low Output Voltage Programming Output voltage can be set by feeding back the output to the FB pin by using a resistor divider network. In the application circuit shown in Figure 1. The resistor divider network includes R1 and R2. Usually, a design is started by picking a fixed R2 value and calculating the required R1 with equation below. R 1  V O = 0.8   1 + ------- R 2  Some standard value of R1, R2 and most used output voltage values are listed in Table 1. VO (V) R1 (kΩ) R2 (kΩ) 0.8 1.0 Open 1.2 4.99 10 1.5 10 11.5 1.8 12.7 10.2 2.5 21.5 10 3.3 31.1 10 5.0 52.3 10 Steady-State Operation The AOZ6643DI switching frequency is fixed and set by an internal oscillator. The practical switching frequency could range from 400kHz to 600kHz due to device variation. The AOZ6643DI integrates an internal N-MOSFET as the high-side switch. Inductor current is sensed by amplifying the voltage drop across the drain to source of the high side power MOSFET. Output voltage is divided Rev.1.0 July 2016 www.aosmd.com Table 1. Page 6 of 13 AOZ6643DI Combination of R1 and R2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. Protection Features The AOZ6643DI has multiple protection features to prevent system circuit damage under abnormal conditions. Over Current Protection (OCP) The sensed inductor current signal is also used for over current protection. Since the AOZ6643DI employs peak current mode control, during over current conditions. The peak inductor current is automatically limited to cycle-bycycle, and if output is shorted to GND, then the AOZ6643DI will shutdown and auto restart approximately every 25ms. circuit, the RMS value of input capacitor current can be calculated by: VO  VO  I CIN_RMS = I O  ---------  1 – --------- V IN  V IN if let m equal the conversion ratio: VO -------- = m V IN The relation between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 2 below. It can be seen that when VO is half of VIN, CIN it is under the worst current stress. The worst current stress on CIN is 0.5 x IO. Power-On Reset (POR) 0.5 A power-on reset circuit monitors the VCC voltage. When the input voltage exceeds 4.1V, the converter starts operation. When input voltage falls below 3.7V, the converter will be shut down. Thermal Protection 0.4 ICIN_RMS(m) 0.3 IO 0.2 An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and high side NMOS if the junction temperature exceeds 150°C. The regulator will restart automatically under the control of soft-start circuit when the junction temperature decreases to 100°C. Application Information The basic AOZ6643DI application circuit is shown in Figure 1. Component selection is explained below. Input Capacitor The input capacitor must be connected to the VIN pin and GND pin of the AOZ6643DI to maintain steady input voltage and filter out the pulsing input current. The voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. The input ripple voltage can be approximated by equation below: 0 0 0.5 m 1 Figure 2. ICIN vs. Voltage Conversion Ratio For reliable operation and best performance, the input capacitors must have current rating higher than ICIN-RMS at worst operating conditions. Ceramic capacitors are preferred for input capacitors because of their low ESR and high ripple current rating. Depending on the application circuits, other low ESR tantalum capacitor or aluminum electrolytic capacitor may also be used. When selecting ceramic capacitors, X5R or X7R type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. Note that the ripple current rating from capacitor manufactures is based on certain amount of life time. Further de-rating may be necessary for practical design requirement. Inductor VO  VO IO  V IN = -----------------   1 – ---------  --------V IN V IN f  C IN  Since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. For a buck Rev.1.0 July 2016 0.1 The inductor is used to supply constant current to output when it is driven by a switching voltage. For given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: VO  VO  I L = -----------   1 – --------- V IN fL  www.aosmd.com Page 7 of 13 AOZ6643DI The peak inductor current is: I L I Lpeak = I O + -------2 1 V O = I L  ------------------------8fC High inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also reduces RMS current through inductor and switches, which results in less conduction loss. Usually, peak to peak ripple current on inductor is designed to be 20% to 40% of output current. When selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. The inductor takes the highest current in a buck circuit. The conduction loss on the inductor needs to be checked for thermal and efficiency requirements. Surface mount inductors in different shapes and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise, but they do cost more than unshielded inductors. The choice depends on EMI requirement, price and size. Output Capacitor The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating. The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be considered for long term reliability. Output ripple voltage specification is another important factor for selecting the output capacitor. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. It can be calculated by the equation below: 1 V O = I L   ESR CO + -------------------------  8fC  O If the impedance of ESR at switching frequency dominates, the output ripple voltage is mainly decided by capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified to: V O = I L  ESR CO For lower output ripple voltage across the entire operating temperature range, X5R or X7R dielectric type of ceramic, or other low ESR tantalum are recommended to be used as output capacitors. In a buck converter, output capacitor current is continuous. The RMS current of output capacitor is decided by the peak to peak inductor ripple current. It can be calculated by: I L I CO_RMS = ---------12 Usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. When the buck inductor is selected to be very small and inductor ripple current is high, the output capacitor could be overstressed. Loop Compensation The AOZ6643DI employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It greatly simplifies the compensation loop design. With peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in frequency domain. The pole is dominant pole can be calculated by: 1 f p1 = ----------------------------------2  C O  R L where, CO is output capacitor value and ESRCO is the Equivalent Series Resistor of output capacitor. When a low ESR ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. Output ripple is mainly caused by capacitor value and inductor ripple current. The output ripple voltage calculation can be simplified to: Rev.1.0 July 2016 O The zero is a ESR zero due to output capacitor and its ESR. It is can be calculated by: 1 f z1 = -----------------------------------------------2  C O  ESR CO www.aosmd.com Page 8 of 13 AOZ6643DI where, where, CO is output filter capacitor, fC is desired crossover frequency. For best performance, fC is set to be about 1/10 of switching frequency; RL is load resistor value and ESRCO is the Equivalent Series Resistor of output capacitor. The compensation design is actually to shape the converter control loop transfer function to get desired gain and phase. Several different types of compensation network can be used for the AOZ6643DI. For most cases, a series capacitor and resistor network connected to the COMP pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. In the AOZ6643DI, FB pin and COMP pin are the inverting input and the output of internal error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is: G EA f p2 = ------------------------------------------2  C C  G VEA GCS is the current sense circuit transconductance, which is 8 A/V. The compensation capacitor CC and resistor RC together make a zero. This zero is put somewhere close to the dominate pole fp1 but lower than 1/5 of selected crossover frequency. C2 can is selected by: 1 C C = ----------------------------------2  R C  f p1 Equation above can also be simplified to: An easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com. GEA is the error amplifier transconductance, which is 500•10-6 A/V; GVEA is the error amplifier voltage gain, which is 7000 V/V; Thermal Management and Layout Consideration CC is compensation capacitor in Figure 1. The zero given by the external compensation network, capacitor C2 and resistor R3, is located at: 1 f z2 = ----------------------------------2  C C  R C To design the compensation circuit, a target crossover frequency fC for close loop must be selected. The system crossover frequency is where control loop has unity gain. The crossover is the also called the converter bandwidth. Generally a higher bandwidth means faster response to load transient. However, the bandwidth should not be too high because of system stability concern. When designing the compensation loop, converter stability under all line and load condition must be considered. Usually, it is recommended to set the bandwidth to be equal or less than 1/10 of switching frequency. The strategy for choosing RC and CC is to set the cross over frequency with Rc and set the compensator zero with CC. Using selected crossover frequency, fC, to calculate R3: Rev.1.0 July 2016 GEA is the error amplifier transconductance, which is 500•10-6 A/V; CO  RL C C = --------------------RC where, 2  C O VO R C = f C  ----------  -----------------------------V FB G EA  G CS VFB is 0.8V; In the AOZ6643DI buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the VIN pin, to the LX pins, to the filter inductor, to the output capacitor and load, and then returns to the input capacitor through ground. Current flows in the first loop when the high side switch is on. The second loop starts from the inductor, to the output capacitors and load, to the low side switch. Current flows in the second loop when the low side switch is on. In PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. A ground plane is strongly recommended to connect the input capacitor, output capacitor and GND pin of the AOZ6643DI. In the AOZ6643DI buck regulator circuit, the major power dissipating components are the AOZ6643DI and output inductor. The total power dissipation of the converter circuit can be measured by input power minus output power. P total_loss = V IN  I IN – V O  I O The power dissipation of inductor can be approximately calculated by output current and DCR of inductor. www.aosmd.com Page 9 of 13 AOZ6643DI Layout Considerations P inductor_loss = IO2  R inductor  1.1 The actual junction temperature can be calculated with power dissipation in the AOZ6643DI and thermal impedance from junction to ambient. T junction =  P total_loss – P inductor_loss    JA The maximum junction temperature of AOZ6643DI is 150ºC, which limits the maximum load current capability. The thermal performance of the AOZ6643DI is strongly affected by the PCB layout. Extra care should be taken by users during design process to ensure that the IC will operate under the recommended environmental conditions. Several layout tips are listed below for the best electric and thermal performance. 1. The exposed pad (LX), which is the low-side NFET drain, has to be externally connected to internal highside NFET source (LXS). Place a large copper plane to LX pin to help thermal dissipation. 2. Do not use thermal relief connection to VIN and the GND pin. Pour a maximized copper area to the GND pin and the VIN pin to help thermal dissipation. 3. Input capacitor should be connected to the VIN pin and the GND pin as close as possible.Make the current trace from LX pins to L to CO to the GND as short as possible. 4. Pour copper plane on all unused board area and connect it to stable DC nodes, like VIN, GND or VOUT. 5. Keep sensitive signal traces such as feedback trace far away from the LX pins. Rev.1.0 July 2016 www.aosmd.com Page 10 of 13 AOZ6643DI Package Dimensions, DFN 3x3B, 8 Lead EP1_P θ RECOMMENDED LAND PATTERN SYMBOLS A A1 b c D D1 E E1 E2 e K L L1 θ1 DIMENSIONS IN MILLIMETERS MIN               NOM  −−−             MAX               DIMENSIONS IN INCHES MIN               NOM  −−−             MAX               NOTE 1. PAKCAGE BODY SIZES EXCLUDE MOLD FLASH AND GATE BURRS. MOLD FLASH AT THE NON-LEAD SIDES SHOULD BE LESS THAN 6 MILS EACH. 2. CONTROLLING DIMENSION IS MILLIMETER. CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT. Rev.1.0 July 2016 www.aosmd.com Page 11 of 13 AOZ6643DI Tape and Reel Dimensions, DFN 3x3, EP Carrier Tape D0 P1 D1 A-A E1 K0 E2 E B0 T P0 P2 A0 Feeding Direction UNIT: mm Package A0 B0 K0 D0 DFN 3x3 EP 3.40 ±0.10 3.35 ±0.10 1.10 ±0.10 1.50 +0.10/-0 D1 1.50 +0.10/-0 E 12.00 ±0.30 E1 E2 P0 P1 P2 T 1.75 ±0.10 5.50 ±0.05 8.00 ±0.10 4.00 ±0.10 2.00 ±0.05 0.30 ±0.05 Reel W1 N S G K M V R H W UNIT: mm Tape Size Reel Size 12mm ø330 M ø330.0 ±0.50 N ø97.0 ±1.0 W 13.0 ±0.30 W1 17.4 ±1.0 H ø13.0 +0.5/-0.2 K 10.6 S 2.0 ±0.5 G — R — V — Leader/Trailer and Orientation Unit Per Reel: 5000pcs Trailer Tape 300mm min. Rev.1.0 July 2016 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm min. Page 12 of 13 AOZ6643DI Part Marking AOZ6643DI (3x3 DFN-8) 6643 Industrial Temperature Range No Option I 0 A W LT Part Number Code Week (Year code is embedded by using upper dot, on “W”) Assembly Location Assembly Lot Number LEGAL DISCLAIMER Applications or uses as critical components in life support devices or systems are not authorized. AOS does not assume any liability arising out of such applications or uses of its products. AOS reserves the right to make changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the product for their intended application. Customer shall comply with applicable legal requirements, including all applicable export control rules, regulations and limitations. AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at: http://www.aosmd.com/terms_and_conditions_of_sale LIFE SUPPORT POLICY ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev.1.0 July 2016 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 13 of 13