AOZ6763DI
3A 1.25MHz Synchronous EZBuckTM Regulator
General Description
Features
The AOZ6763DI is a high efficiency, easy to use, 3A
synchronous buck regulator at high switching frequency
for small form factor solution. The AOZ6763DI works
from 4.5V to 18V input voltage range, and provides up to
3A of continuous output current with an output voltage
adjustable down to 0.6V.
4.5V to 18V operating input voltage range
The AOZ6763DI comes in a DFN 3mm x 3mm package
and is rated over a -40°C to +85°C operating ambient
temperature range.
Pulse Energy Mode for light load efficiency (Vin=12V,
Synchronous Buck: 145mΩ internal high-side switch
and 80mΩ Internal low-side switch
Up to 95% efficiency
30ns controllable minimum on-time enabling this part
can work at Vo=0.9V with 12V power rail
Vo=5V, 86%@10mA)
Output voltage adjustable to 0.6V
3A continuous output current
Fixed frequency 1.25MHz PWM operation
External compensation for flexible LC design
Internal Soft Start
Cycle-by-cycle current limit
Pre-bias start-up
Short-circuit protection
Thermal shutdown
Applications
High performance wireless AP/router
High reliable DC/DC converters
High performance LCD TV
High performance cable modems
Typical Application
VIN
C1
10µF
VIN
BST
CBST
L1
EN
AOZ6763DI
EN
LX
VOUT
2.2µH
R1
COMP
FB
RC
GND
VCC
CC
C2,C3
22µF
R2
C4
1µF
Figure 1. 3A Synchronous Buck Regulator, Fs = 1.25 MHz
Rev. 1.0 October 2019
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Page 1 of 15
AOZ6763DI
Ordering Information
Part Number
Ambient Temperature Range
Package
Environmental
AOZ6763DI
-40°C to +85°C
8-Pin 3mm x 3mm DFN
RoHS
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
GND
1
LX
2
VIN
3
COMP
4
Thermal
PAD
(9)
8
BST
7
EN
6
FB
5
VCC
8-Pin 3mm x 3mm DFN
Top Transparent View
Pin Description
Pin Number
Pin Name
1
GND
2
LX
Switching output.
3
VIN
Supply voltage input. When VIN rises above the UVLO threshold and EN is logic high, the
device starts up.
4
COMP
5
VCC
6
FB
Feedback input. The FB pin is used to set the output voltage via a resistor voltage divider
between the output and GND.
7
EN
Enable input. Pull up EN to logic high will enable the device. Pull EN to logic low will
disable the device. EN pin must be connected to VIN if no Enable control is required.
8
BST
Bootstrap input. Connect a capacitor to LX. Typical value is 0.1µF.
9
Thermal PAD
This thermal pad must be connected to GND for normal operation.
Rev. 1.0 October 2019
Pin Function
System ground.
External Loop Compensation Pin. Connect a RC network between COMP and GND to
compensate the control loop.
The output of LDO. 1µF decoupling capacitor needs added.
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AOZ6763DI
Absolute Maximum Ratings(1)
Maximum Operating Ratings(3)
Exceeding the Absolute Maximum Ratings may damage the
device.
The device is not guaranteed to operate beyond the
Maximum Operating ratings.
Parameter
Rating
Supply Voltage (VIN), EN (VEN)
Parameter
20V
Supply Voltage (VIN)
-0.3V to VIN+0.3V
LX to GND
Rating
4.5V to 18V
Output Voltage Range
0.6V to 0.65*VIN
LX to GND (20ns)
-5V to 22V
Ambient Temperature (TA)
VCC, FB to GND
-0.3V to 6V
Package Thermal Resistance
DFN 3x3 (θJA)(4)
VBST TO LX
6V
Junction Temperature (TJ)
+150°C
Storage Temperature (TS)
-65°C to +150°C
ESD Rating(2)
2kV
Notes:
1. Exceeding the Absolute Maximum ratings may damage the device.
-40°C to +85°C
50°C/W
Notes:
3. The device is not guaranteed to operate beyond the Maximum
Operating ratings.
4. The value of θJA is measured with the device mounted on a 1-in2
FR-4 four layer board with 2oz copper and Vias, in a still air environment with TA = 25°C. The value in any given application depends on
the user’s specification board design.
2. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k in series with 100pF.
Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified. Specifications in bold indicate an ambient temperature range
of -40°C to +85°C. These specifications are guaranteed by design.
Symbol
Parameter
Conditions
Min.
Typ.
Units
18
V
4.49
V
V
VIN
Supply Voltage
VUVLO
Input Under-Voltage Lockout Threshold
VIN rising
VIN falling
IIN
Supply Current (Quiescent)
IOUT = 0V, VFB = 1.2V, VEN > 2V
260
IOFF
Shutdown Supply Current
VEN = 0V
0.1
1
A
VFB
Feedback Voltage
TA = 25°C
0.6
0.609
V
RO
Load Regulation
PWM mode 500mA < ILoad < 3A
4.5V < VIN < 18V
SV
Line Regulation
IFB
Feedback Voltage Input Current
VEN
EN Input Threshold
VHYS
EN Input Hysteresis
IEN
EN Input Current
tSS
SS Time
4.5
Max
Off threshold
On threshold
3.2
0.591
4.1
3.7
A
0.5
%
1
%
200
nA
0.6
V
V
2
300
VEN = 5V
2.5
mV
A
4
2.6
ms
Modulator
fO
Frequency
DMAX
Maximum Duty Cycle
TMIN
Controllable Minimum Duty Cycle
1100
1250
65
70
1400
kHz
%
30
ns
Protection
4.5
A
Over Temperature Shutdown Limit
TJ rising
TJ falling
150
100
°C
°C
RHS
High-Side Switch On-Resistance
BST - LX = 5V
145
m
RLS
Low-Side Switch On-Resistance
80
m
ILIM
TOTP
Current Limit
3.5
Output Stage
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Page 3 of 15
AOZ6763DI
Functional Block Diagram
BST
VCC
UVLO
& POR
EN
VIN
LDO
Regulator
HS
BST UVLO
Soft Start
ISEN
LX
Reference
& Bias
Q1
ILIMIT
PWM
COMP
EAMP
PWM
Control
Logic
FB
HS
DRV
LX
VCC
COMP
1.25 MHz
Oscillator
OTP
Q2
LS
DRV
PEM
Logic
ZCD
GND
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Page 4 of 15
AOZ6763DI
Typical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified.
Light Load Operation
Full Load Operation
LX
(5V/div)
LX
(5V/div)
VO
(50mV/div)
VO
(50mV/div)
VIN
(200mV/div)
VIN
(200mV/div)
IL
(2A/div)
IL
(1A/div)
1µs/div
1µs/div
PEM to PWM Transition
PWM to PEM Transition
LX
(5V/div)
LX
(5V/div)
VO
(200mV/div)
VO
(200mV/div)
IL
(2A/div)
0.5ms/div
IL
(2A/div)
0.5ms/div
Short Protection
Short Circuit Recovery
LX
(5V/div)
LX
(5V/div)
VO
(1V/div)
VO
(1V/div)
IL
(2A/div)
IL
(2A/div)
10ms/div
10ms/div
Rev. 1.0 October 2019
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Page 5 of 15
AOZ6763DI
Typical Characteristics (continued)
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified.
Start-up to Full Load
50% to 100% Load Transient
VIN
(5V/div)
VO
(100mV/div)
VO
(1V/div)
IO
(2A/div)
IO
(2A/div)
1ms/div
200µs/div
Efficiency
AOZ6763DI Efficiency
(VIN = 12V)
100
90
Efficiency (%)
80
70
60
5V OUTPUT L=3.3µH
3.3V OUTPUT L=2.2µH
50
2.5V OUTPUT L=2.2µH
40
1.8V OUTPUT L=2.2µH
1.2V OUTPUT L=2.2µH
30
20
0.01
1
0.1
10
IO (A)
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Page 6 of 15
AOZ6763DI
IO_Max (A)
Thermal Derating
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
AOZ6763DI Thermal Derating
(VIN = 12V)
5VO
3.3VO
2.5VO
1.8VO
1.2VO
25 30 35 40 45 50 55 60 65 70 75 80 85
Temperature (°C)
Rev. 1.0 October 2019
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Page 7 of 15
AOZ6763DI
Detailed Description
The AOZ6763DI is a current-mode step down regulator
with integrated high-side NMOS switch and low-side
NMOS switch. It operates from a 4.5V to 18V input
voltage range and supplies up to 3A of load current.
Features include, enable control, Power-On Reset, input
under voltage lockout, output over voltage protection,
internal soft-start and thermal shut down.
The AOZ6763DI is available in DFN3x3 package.
Enable and Soft Start
The AOZ6763DI has internal soft start feature to limit inrush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.1V and voltage
on EN pin is HIGH. The soft start time is programmed by
internal soft start capacitor and is set to 3.5ms (Typ).
The EN pin of the AOZ6763DI is active high. Connect the
EN pin to VIN if enable function is not used. Pull it to
ground will disable the AOZ6763DI. Do not leave it open.
The voltage on EN pin must be above 2V to enable the
AOZ6763DI. When voltage on EN pin falls below 0.6V,
the AOZ6763DI is disabled.
Light Load and PWM Operation
Under low output current settings, the AOZ6763DI will
operate with pulse energy mode to obtain high efficiency.
In pulse energy mode, the PWM will not turn off until the
on time get a fixed time which is defined by Vin, Vo and
switching frequency.
Steady-State Operation
switch to output. The internal adaptive FET driver
guarantees no turn on overlap of both high-side and lowside switch.
Comparing with regulators using freewheeling Schottky
diodes, the AOZ6763DI uses freewheeling NMOSFET to
realize synchronous rectification. It greatly improves the
converter efficiency and reduces power loss in the lowside switch.
The AOZ6763DI uses a N-Channel MOSFET as the
high-side switch. Since the NMOSFET requires a gate
voltage higher than the input voltage, a boost capacitor is
needed between LX pin and BST pin to drive the gate.
The boost capacitor is charged while LX is low
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin by using a resistor divider network. In the
application circuit shown in Figure 1. Usually, a design is
started by picking a fixed R2 value and calculating the
required R1 with equation below.
R 1
V O = 0.6 1 + -------
R 2
Combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Some standard value of R1, R2 and most used output
voltage values are listed in Table 1.
VO (V)
R1 (kΩ)
R2 (kΩ)
Under heavy load steady-state conditions, the converter
operates in fixed frequency and Continuous-Conduction
Mode (CCM).
he AOZ6763DI integrates an internal N-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error
voltage is compared against the current signal, which is
sum of inductor current signal and input and output
modulated voltage ramp compensation signal, at PWM
comparator input. If the current signal is less than the
error voltage, the internal high-side switch is on. The
inductor current flows from the input through the inductor
to the output. When the current signal exceeds the error
voltage, the high-side switch is off. The inductor current
is freewheeling through the internal low-side N-MOSFET
Rev. 1.0 October 2019
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1.0
10
15
1.2
10
10
1.5
15
10
1.8
20
10
2.5
31.6
10
3.3
68.1
15
5.0
110
15
Table 1.
Page 8 of 15
AOZ6763DI
Protection Features
The AOZ6763DI has multiple protection features to
prevent system circuit damage under abnormal
conditions.
circuit, the RMS value of input capacitor current can be
calculated by:
I CIN _ RMS I O
Over Current Protection (OCP)
The sensed low side MOSFET valley current signal is
also used for over current protection. Since the
AOZ6763DI employs valley current mode control, during
over current conditions, it will skip a pulse if the valley
current over the OC point setting until the output drop to
some level after current limit. The AOZ6763DI will shut
down and auto restart with hiccup mode. To prevent the
current running away in the extreme case, the minimum
inductor value needed is 2.2µH for the application.
Power-On Reset (POR)
if let m equal the conversion ratio:
VO
-------- = m
V IN
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 2 below. It can be seen that when VO is half of VIN,
CIN it is under the worst current stress. The worst current
stress on CIN is 0.5 x IO.
A power-on reset circuit monitors the VIN voltage. When
the VIN voltage exceeds 4.1V, the converter starts
operation. When VIN voltage falls below 3.7V, the
converter will be shut down.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side NMOS if the junction temperature exceeds
150ºC. The regulator will restart automatically under the
control of soft-start circuit when the junction temperature
decreases to 100ºC.
0.5
0.4
ICIN_RMS(m) 0.3
IO
0.2
0.1
0
0
0.5
m
1
Figure 2. ICIN vs. Voltage Conversion Ratio
Application Information
The basic AOZ6763DI application circuit is show in
Figure 1. Component selection is explained below.
Input Capacitor
The input capacitor must be connected to the VIN pin and
GND pin of AOZ6763DI to maintain steady input voltage
and filter out the pulsing input current. The voltage rating
of input capacitor must be greater than maximum input
voltage plus ripple voltage.
The input ripple voltage can be approximated by
equation below:
VO VO
IO
V IN = ----------------- 1 – --------- --------V IN V IN
f C IN
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high current rating. Depending on the application
circuits, other low ESR tantalum capacitor may also be
used. When selecting ceramic capacitors, X5R or X7R
type dielectric ceramic capacitors should be used for
their better temperature and voltage characteristics. Note
that the ripple current rating from capacitor manufactures
are based on certain amount of life time. Further derating may be necessary in practical design.
Inductor
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
Rev. 1.0 October 2019
VO
V
(1 O )
VIN
VIN
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
VO
VO
I L = ----------- 1 – ---------
V IN
fL
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AOZ6763DI
The peak inductor current is:
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
I L
I Lpeak = I O + -------2
1
V O = I L ------------------------8fC
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20% to
40% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor need to be checked for
thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
1
V O = I L ESR CO + -------------------------
8fC
O
O
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
V O = I L ESR CO
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current. It can
be calculated by:
I L
I CO_RMS = ---------12
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
Loop Compensation
The AOZ6763DI employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole can be
calculated by:
f p1
where,
CO is output capacitor value and ESRCO is the
Equivalent Series Resistor of output capacitor.
When a low ESR ceramic capacitor is used as output
capacitor, When low ESR ceramic capacitor is used as
output capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
Rev. 1.0 October 2019
1
2 C O R L
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
f Z1
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1
2 CO ESR CO
Page 10 of 15
AOZ6763DI
with Cc. Using selected crossover frequency, fC, to
calculate R3:
Where CO is the output filter capacitor;
RL is load resistor value;
ESRCO is the equivalent series resistance of
output capacitor;
The compensation design is actually to shape the
converter control loop transfer function to get desired
gain and phase. Several different types of compensation
network can be used for the AOZ6763DI. For most
cases, a series capacitor and resistor network connected
to the COMP pin sets the pole-zero and is adequate for a
stable high-bandwidth control loop.
Rc f C
where fC is desired crossover frequency. For best
performance, fc is set to be about 1/10 of
switching frequency;
VFB is 0.6V;
GEA is the error amplifier transconductance,
In the AOZ6763DI, FB pin and COMP pin are the
inverting input and the output of internal error amplifier. A
series R and C compensation network connected to
COMP provides one pole and one zero. The pole is:
f p2
GCS is the current sense circuit
transconductance, which is 5 A/V;
The compensation capacitor Cc and resistor Rc together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected
crossover frequency. C2 can is selected by:
G EA
2 Cc GVEA
Where GEA is the error amplifier transconductance, GVEA
is the error amplifier voltage gain, Cc is compensation
capacitor in figure1.
The zero given by the external compensation network,
capacitor Cc and resistor Rc, is located at:
fZ2
VO
2 Co
VFB GEA GCS
1
2 C c Rc
Equation above can also be simplified to:
Cc
C O RL
Rc
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When
designing the compensation loop, converter stability
under all line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency.
The strategy for choosing Rc and Cc is to set the cross
over frequency with Rc and set the compensator zero
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Page 11 of 15
AOZ6763DI
Thermal Management and Layout
Consideration
The maximum junction temperature of AOZ6763DI is
150ºC, which limits the maximum load current capability.
In the AOZ6763DI buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pad, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the low side NMOSFET.
Current flows in the second loop when the low side
NMOSFET is on.
The thermal performance of the AOZ6763DI is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and GND pin of the
AOZ6763DI
In the AOZ6763DI buck regulator circuit, the major power
dissipating components are the AOZ6763DI and the
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
P total_loss = V IN I IN – V O I O
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
The AOZ6763DI is an exposed pad DFN3x3 package.
Several layout tips are listed below for the best electric
and thermal performance.
1. The exposed thermal pad has to connect to ground
by PCB externally. Connect a large copper plane to
exposed thermal pad to help thermal dissipation.
2. Do not use thermal relief connection to the VIN and
the GND pin. Pour a maximized copper area to the
GND pin and the VIN pin to help thermal dissipation.
3. Input capacitor should be connected to the VIN pin
and the GND pin as close as possible.
4. Make the current trace from LX pins to L to Co to the
GND as short as possible.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
6. Keep sensitive signal trace far away from the LX pad.
P inductor_loss = IO2 R inductor 1.1
The actual junction temperature can be calculated with
power dissipation in the AOZ6763DI and thermal
impedance from junction to ambient.
T junction = P total_loss – P inductor_loss JA
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Page 12 of 15
AOZ6763DI
Package Dimensions, DFN3x3B-8L, EP1_P
θ
RECOMMENDED LAND PATTERN
SYMBOLS
A
A1
b
c
D
D1
E
E1
E2
e
K
L
L1
θ1
DIMENSIONS IN MILLIMETERS
MIN
NOM
−−−
MAX
DIMENSIONS IN INCHES
MIN
NOM
−−−
MAX
NOTE
1. PAKCAGE BODY SIZES EXCLUDE MOLD FLASH AND GATE BURRS.
MOLD FLASH AT THE NON-LEAD SIDES SHOULD BE LESS THAN 6 MILS EACH.
2. CONTROLLING DIMENSION IS MILLIMETER.
CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT.
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Page 13 of 15
AOZ6763DI
Tape and Reel Dimensions, DFN3x3B-8L, EP1_P
Carrier Tape
D0
P1
D1
A-A
E1
K0
E2
E
B0
T
P0
P2
A0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
DFN 3x3 EP
3.40
±0.10
3.35
±0.10
1.10
±0.10
1.50
+0.10/-0
D1
1.50
+0.10/-0
E
12.00
±0.30
E1
E2
P0
P1
P2
T
1.75
±0.10
5.50
±0.05
8.00
±0.10
4.00
±0.10
2.00
±0.05
0.30
±0.05
Reel
W1
N
S
G
K
M
V
R
H
W
UNIT: mm
Tape Size Reel Size
12mm
ø330
M
ø330.0
±0.50
N
ø97.0
±1.0
W
13.0
±0.30
W1
17.4
±1.0
H
ø13.0
+0.5/-0.2
K
10.6
S
2.0
±0.5
G
—
R
—
V
—
Leader/Trailer and Orientation
Unit Per Reel:
5000pcs
Trailer Tape
300mm min.
Rev. 1.0 October 2019
Components Tape
Orientation in Pocket
www.aosmd.com
Leader Tape
500mm min.
Page 14 of 15
AOZ6763DI
Part Marking
AOZ6763DI
(3x3 DFN-8)
AR00
Year Code
Week Code
Y W L T
Part Number Code
Assembly Lot Code
LEGAL DISCLAIMER
Applications or uses as critical components in life support devices or systems are not authorized. AOS does not
assume any liability arising out of such applications or uses of its products. AOS reserves the right to make
changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the
product for their intended application. Customer shall comply with applicable legal requirements, including all
applicable export control rules, regulations and limitations.
AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at:
http://www.aosmd.com/terms_and_conditions_of_sale
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 1.0 October 2019
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
www.aosmd.com
Page 15 of 15
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