PA04A

PA04 • PA04A Power Operational Amplifier RoHS COMPLIANT FEATURES • • • • • • • • High Internal Dissipation — 200 Watts High Voltage, High Current — 200V, 20A High Slew Rate — 50V/µs 4 Wire Current Limit Sensing Low Distortion External Sleep Mode Control Optional Boost Voltage Inputs Evaluation Kit — See EK45 APPLICATIONS • • • • • Sonar Transducer Driver Linear and Rotary Motor Drives Yoke/Magnetic Field Excitation Programmable Power Supplies to ±95V Audio up to 400W DESCRIPTION The PA04 is a high voltage MOSFET power operational amplifier that extends the performance limits of power amplifiers in slew rate and power bandwidth, while maintaining high current and power dissipation ratings. The PA04 is a highly flexible amplifier. The sleep mode feature allows ultra-low quiescent current for standby operation or load protection by disabling the entire amplifier. Boost voltage inputs allow the small signal portion of the amplifier to operate at a higher voltage than the high current output stage. The amplifier is then biased to achieve close linear swings to the supply rails at high currents for extra efficient operation. External compensation tailors performance to user needs. A four wire sense technique allows precision current limiting without the need to consider internal or external mΩ parasitic resistance in the output line. The JEDEC MO-127 12-pin Power Dip™ package (see Package Outlines) is hermetically sealed and isolated from the internal circuits. The use of compressible thermal washers will void product warranty. www.apexanalog.com © Apex Microtechnology Inc. All rights reserved Nov 2018 PA04U Rev P PA04 • PA04A Figure 1: Equivalent Schematic 12 9 +VS 8 SLEEP +VB D1 D2 D3 Q10 Q5 Q6 D4 Q12 D5 ICL 11 Q13 D6 –IN 1 +IN 2 Q14 Q15 10 ICL Q17 D7 COMP D8 Q19 3 Q22 Q21 Q18 D9 7 OUT Q7 Q26 4 COMP –VB Q20 5 –VS 6 TYPICAL CONNECTION Figure 2: Typical Connection * * Use 10μF per Amp of output current * 2 PA04U Rev P PA04 • PA04A PINOUT AND DESCRIPTION TABLE Figure 3: External Connections Pin Number Name Description 1 -IN The inverting input. 2 +IN The non-inverting input. 3 RC Compensation resistor connection. Select value based on Phase Compensation. See applicable section. 4 CC Compensation capacitor connection. Select value based on Phase Compensation. See applicable section. 5 -VB The negative boost supply rail. Short to -VS if unused. See applicable section. 6 -VS The negative supply rail. 7 OUT The output. Connect this pin to load and to the feedback resistors through RCL. 8 +VS The positive supply rail. 9 +VB The positive boost supply rail. Short to +VS if unused. See applicable section. 10 -CL Connect to the load side of the current limit resistor. Current limit will activate as the voltage across RCL increases. 11 +CL Connect to the OUT side of the current limit resistor. Current limit will activate as the voltage across RCL increases. 12 SL The sleep mode activation pin. See applicable section. PA04U Rev P 3 PA04 • PA04A SPECIFICATIONS Unless otherwise noted: TC = 25°C, CC = 470pF, RC = 120 Ω. DC input specifications are ± value given. Power supply voltage is typical rating. ±VB = ±VS. ABSOLUTE MAXIMUM RATINGS Parameter Max Units +Vs to -Vs 200 V Boost Voltage ±VB ±VS ± 20V V Output Current, within SOA IOUT 20 A Power Dissipation, internal PD 200 W Input Voltage, differential VIN (Diff) -20 20 V VCM -VS VS V 350 °C 150 °C -65 +150 °C -55 +125 °C Supply Voltage, total Input Voltage, common mode Symbol Min Temperature, pin solder, 10s Temperature, junction 1 TJ Temperature, storage Operating Temperature Range, case TC 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. For guidance, refer to the heatsink data sheet. CAUTION 4 The PA04 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. PA04U Rev P PA04 • PA04A INPUT Parameter Test Conditions PA04 Min Offset Voltage, initial Offset Voltage vs. temperature Full temp range Offset Voltage vs. supply Offset Voltage vs. power Full temp range Typ Bias Current vs. supply Max Min 10 2 5 mV 10 30 µV/°C 15 * µV/V 30 10 µV/W 50 5 50 5 10 13 Common Mode Voltage Range Full temp range ±VB-8 Common Mode Rejection, DC Full temp range, VCM = ±20V 86 Input Noise 100 kHz BW, RI = 1 kΩ 20 * 11 Input Capacitance Units 50 10 Input Impedance, DC Max 5 0.01 Offset Current, initial Typ 30 10 Bias Current, initial PA04A pA/V 20 * pA * Ω * pF * 98 pA V * dB 10 * µVrms PA04 PA04A GAIN Parameter Test Conditions Min Typ 94 102 Max Max Units Min Typ * * dB Open Loop, @ 15 Hz Full temp range, CC = 100pF Gain Bandwidth Product IOUT = 10A 2 * MHz Power Bandwidth RL=4.5 Ω, VOUT = 180V p-p CC=100pF, RC=120 Ω 90 * kHz Phase Margin Full temp range 60 * ° PA04U Rev P 5 PA04 • PA04A OUTPUT Parameter Test Conditions PA04 Min Typ PA04A Max Min Typ Max Units Voltage Swing IOUT = 15A ±VS-8.8 ±VS-7.5 * * V Voltage Swing VB= Vs + 5V, IOUT ±VS-6.8 ±VS-5.5 = 20A * * V Current, peak 20 Settling Time to 0.1% AV = 1, 10V step, RL = 4 Ω Slew Rate AV = 10, CC= 100pF,  RC=120 Ω 40 Capacitive Load Full temp range, AV = +1 10 * 2.5 Resistance 50 * A * µs * V/µs * nF 2 * PA04 PA04A Ω POWER SUPPLY Parameter Voltage Test Conditions Min Typ Max Min Typ Max Full temp range ±15 ±75 ±100 * * * Units V Current, quiescent, boost supply 30 40 * * mA Current, quiescent, total 70 90 * * mA Full temp range 3 5 * * mA Test Conditions PA04 Current, quiescent, total, sleep mode THERMAL Parameter Min PA04A Typ Max Min Typ Max Units Resistance, AC, junction to case1 Full temp range, F>60 Hz 0.3 0.4 * * °C/W Resistance, DC, junction to case Full temp range, FK 20 RCсϭϮϬɏ 0 100 200 12 10 8 V B= 6 4 VB= 400 500 0 5V 5 10 15 Figure 11: Pulse Response 7.5 100 A V = +1 Output Voltage, VOUT (V) 80 60 40 20 0 10 20 Output Current, IOUT (A) Figure 10: Common Mode Rejection ŽŵŵŽŶDŽĚĞZĞũĞĐƟŽŶ͕DZ;Ě) VS+ 2 300 džƚŽŵƉĞŶƐĂƟŽŶĂƉĂĐŝƚŽƌ͕C (pF) CC = 470pF 5 2.5 0 -2.5 -5 -7.5 100 1k 10k Frequency, F (Hz) 8 VS 100k 1M 0 5 10 15 20 25 30 Time, t (μs) PA04U Rev P PA04 • PA04A Figure 13: Harmonic Distortion 100 90 80 0.02 0.01 PO = 1W 0.005 0W 70 0 =2 0.002 60 -50 -25 0 25 50 75 100 125 PO 0.001 30 100 300 Case Temperature, TC (°C) 1k 3k 10k 30k Frequency, F (Hz) Figure 14: Quiescent Current Figure 15: Power Response 200 180 150 00 pF 20 pF =2 pF 60 =1 CC 70 0.9 80 =4 1.0 120 100 CC 1.1 CC Output Voltage, VOUT (VP-P) 1.2 Normalized Quiescent Current, IQ (X) W 0.05 00 110 AV = 10 RLсϰɏ CC = 100pF, RCсϭϮϬɏ VS = 62V =3 120 0.1 O 0.2 P 130 ŝƐƚŽƌƟŽŶ͕d,;й) Normalized Current Limit (%) Figure 12: Current Limit 40 RCсϭϮϬɏ RLсϰ͘Ϭɏ 0.8 30 50 100 150 Total Supply Voltage, VS (V) PA04U Rev P 200 20 10k 20k 50k 0.2M 0.6M 1M Frequency, F (Hz) 9 PA04 • PA04A SAFE OPERATING AREA (SOA) The MOSFET output stage of this power operational amplifier has two distinct limitations: 1. The current handling capability of the MOSFET geometry and the wire bonds. 2. The junction temperature of the output MOSFETs. Note: The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. Figure 16: SOA 20 10 KƵƚƉƵƚƵƌƌĞŶƚ;) t= t= DC DC 5.0 DC C T C 2.0 = = 1m s m s T = C T 10 25 °C 85 °C 12 5° C 1.0 0.5 0.2 2 5 10 20 50 100 200 ^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕VS-VOUT (V) 10 PA04U Rev P PA04 • PA04A GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexanalog.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and Evaluation Kits. TYPICAL APPLICATION Figure 17: Typical Application (Sonar Transducer Driver) The high power bandwidth and high voltage output of the PA04 allows driving sonar transducers via a resonant circuit including the transducer and a matching transformer. The load circuit appears resistive to the PA04. Control logic turns off the amplifier in sleep mode. PHASE COMPENSATION Gain CC* RC ≥1 470pF 120 Ω ≥3 220pF 120 Ω ≥10 100pF 120 Ω CC Rated For Full Supply Voltage *See “BOOST OPERATION” paragraph. PA04U Rev P 11 PA04 • PA04A CURRENT LIMIT The two current limit sense lines are to be connected directly across the current limit sense resistor. For the current limit to work correctly pin 11 must be connected to the amplifier output side and pin 10 connected to the load side of the current limit resistor, RCL, as shown in Figure 18. This connection will bypass any parasitic resistances, RP, formed by sockets and solder joints as well as internal amplifier losses. The current limiting resistor may not be placed anywhere in the output circuit except where shown in Figure 18. The value of the current limit resistor can be calculated as follows: 0.76VR CL    = ---------------I CL  A  Figure 18: Current Limit 12 PA04U Rev P PA04 • PA04A SLEEP MODE OPERATION To activate sleep mode, connect pin 12 (sleep) to pin 9 (+VB). This disables the amplifier’s internal reference and the amplifier shuts down except for a trickle current of 3 mA which flows into pin 12. Pin 12 should be left open if the sleep mode is not required. Several possible circuits can be built to take advantage of this mode. In Figure 19a a small signal relay is driven by a logic gate. This removes the requirement to deal with the common mode voltage that exists on the shutoff circuitry since the sleep mode is referenced to the +VB voltage. In Figure 19b, circuitry is used to level translate the sleep mode input signal. The differential input activates sleep mode with a differential logic level signal and allows common mode voltages to ±VB. Figure 19: Sleep Mode Current BOOST OPERATION With the VB feature the small signal stages of the amplifier are operated at higher supply voltages than the amplifier’s high current output stage. +VB (pin 9) and –VB (pin 5) are connected to the small signal circuitry of the amplifier. +VS (pin 8) and –VS (pin 6) are connected to the high current output stage. An additional 5V on the VB pins is sufficient to allow the small signal stages to drive the output transistors into saturation and improve the output voltage swing for extra efficient operation when required. When close swings to the supply rails is not required the +VB and +VS pins must be strapped together as well as the –VB and –VS pins. The VB pins must not be at a voltage lower than the VS pins. COMPENSATION The external compensation components CC and RC are connected to pins 3 and 4. Unity gain stability can be achieved at any compensation capacitance greater than 330 pF with at least 60 degrees of phase margin. At higher gains more phase shift can be tolerated in most designs and the compensation capacitance can accordingly be reduced, resulting in higher bandwidth and slew rate. Use the typical operating curves as a guide to select CC and RC for the application. PA04U Rev P 13 PA04 • PA04A PACKAGE DESIGN PACKAGE STYLE CR NEED TECHNICAL HELP? CONTACT APEX SUPPORT! For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@apexanalog.com. International customers can also request support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you, go to www.apexanalog.com IMPORTANT NOTICE Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. 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