PA341
High Voltage Power Operational Amplifier
RoHS
COMPLIANT
FEATURES
•
•
•
•
•
•
•
•
RoHS Compliant
Monolithic MOS Technology
Low Cost
High Voltage Operation 350V
Low Quiescent Current Typ. 2.2mA
No Second Breakdown
High Output Current 120mA PEAK
Available in Die Form CPA341
APPLICATIONS
•
•
•
•
•
Piezo Electric Positioning
Electrostatic Transducer and Deflection
Deformable Mirror Focusing
Biochemistry Stimulators
Computer to Vacuum Tube Interface
DESCRIPTION
The PA341 is a high voltage monolithic MOSFET operational amplifier which achieves performance features previously found only in hybrid designs while increasing reliability. Inputs are protected from excessive
common mode and differential mode voltages. The safe operating area (SOA) has no second breakdown limitation and can be observed with all type loads by choosing an appropriate current limiting resistor. External
compensation provides the user flexibility in choosing optimum gain and bandwidth for the application.
The PA341CE is packaged in a hermetically sealed 8-pin TO-3 package. The metal case of the PA341CE is
isolated in excess of full supply voltage.
The PA341DF is packaged in a 24 pin PSOP (JEDEC MO-166) package. The metal heat slug of the PA341DF
is isolated in excess of full supply voltage.
The PA341DW is packaged in Apex Microtechnology’s hermetic ceramic SIP. The alumina ceramic isolates
the die in excess of full supply voltage.
Figure 1: Equivalent Schematic
+VS
CC1
CC2
+IN
ILIM
-IN
OUT
-VS
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© Apex Microtechnology Inc.
All rights reserved
Feb 2023
PA341U Rev E
PA341
TYPICAL CONNECTION
Figure 2: Typical Connection
RF
+V S
100nF
*
CC
RI
+V S
V OUT
CC1
+
CC2
OUT
CL
PA341
RCL
-V S
RL
* Use 10 μF
per Amp
-V S
100nF
*
PINOUT AND DESCRIPTION TABLE
Figure 3: External Connections
-V S
7
6
+IN
+V S 8
5 -IN
TOP VIEW
4 OUT
CL
1
2
CC2
PA341CE
3
CC1
24
NC
23
NC
22
NC
OUT 21
NC 20
CC1 19
18
NC
C 17
1
NC
2 NC
3 NC
4 NC
5 -IN
6 NC
7 +IN
8
NC
9
NC
10 NC
1
2
3
4
5
6
7
8
9
-IN
+IN
NC
NC
-V S
+V S
CL
CC2
10
C2
16
NC
CL 15
14
NC
+V S 13
11 NC
12 -V S
PA341DF
CC1 OUT
PA341DW
For CC values, see graphs on page 8 & 9.
Note: CC must be rated for full supply voltage.
Note: PA341CE Recommended mounting torque is 4-7 in•lbs (0.45 - 0.79 N•m)
CAUTION: The use of compressible, thermally conductive insulators may void warranty.
2
PA341U Rev E
PA341
PA341CE
Pin Number
Name
Description
1
CL
Connect to the current limit resistor. Output current flows into/out of this pin
through RCL.. The output pin and the load are connected to the other side of RCL.
2, 3
CC
4
5
6
7
8
OUT
-IN
+IN
-Vs
+Vs
Compensation capacitor connection. Select value based on Phase Compensation.
See applicable section.
The output. Connect this pin to load and to the feedback resistors.
The inverting input.
The non-inverting input.
The negative supply rail.
The positive supply rail.
Pin Number
Name
Description
5
7
12
13
-IN
+IN
-Vs
+Vs
15
CL
The inverting input.
The non-inverting input.
The negative supply rail.
The positive supply rail.
Connect to the current limit resistor. Output current flows into/out of this pin
through RCL.. The output pin and the load are connected to the other side of RCL.
17, 19
CC
21
All Others
OUT
NC
Compensation capacitor connection. Select value based on Phase Compensation.
See applicable section.
The output. Connect this pin to load and to the feedback resistors.
No connection.
Pin Number
Name
Description
1
2
3, 4
5
6
-IN
+IN
NC
-Vs
+Vs
7
CL
The inverting input.
The non-inverting input.
No connection.
The negative supply rail.
The positive supply rail.
Connect to the current limit resistor. Output current flows into/out of this pin
through RCL.. The output pin and the load are connected to the other side of RCL.
8, 9
CC
10
OUT
PA341DF
PA341DW
PA341U Rev E
Compensation capacitor connection. Select value based on Phase Compensation.
See applicable section.
The output. Connect this pin to load and to the feedback resistors.
3
PA341
SPECIFICATIONS
Unless otherwise noted TC = 25°C, CC = 6.8pF. DC input specifications are ± value given. Power supply voltage
is typical rating.
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage, total
Output Current, continuous within SOA
Output Current, peak
Power Dissipation, continuous @ Tc = 25°C
Input Voltage, differential
Input Voltage, common mode
Symbol
PA341CE
Min
Max
PA341DF
Min
Max
PA341DW
Min
Max
Units
+Vs to -Vs
350
*
*
V
IO
60
*
*
mA
120
*
*
mA
12
*
9
W
PD
VIN (Diff)
-16
+16
*
*
*
*
V
Vcm
-VS
+VS
*
*
*
*
V
Temperature, pin solder, 10s max.
Temperature, junction 1
Temperature, storage
TJ
Temperature Range, powered (case)
TC
350
220
220
°C
150
*
*
°C
-65
+150
*
*
*
*
°C
-40
125
*
*
*
*
°C
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. For guidance, refer to heatsink data sheet.
CAUTION
4
The PA341 is constructed from MOSFET transistors. ESD handling procedures must be
observed.
The substrate (DW package) contains beryllia (BeO). Do not crush, or subject to temperatures
in excess of 850°C to avoid generating toxic fumes.
PA341U Rev E
PA341
INPUT
Test
Conditions
Parameter
PA341CE, PA341DF
Min
Offset Voltage, initial
Typ
Max
12
PA341DW
Min
Units
Typ
Max
40
*
*
mV
Offset Voltage vs. temperature
1
25° to 85°C
17
250
*
*
µV/°C
Offset Voltage vs. temperature
Offset Voltage vs. supply
Offset Voltage vs. time
1
-25° to 25°C
18
500
*
*
µV/°C
Bias Current, initial 2
Bias Current vs. supply
Offset Current, initial 2
4.5
80
5/50
*
*
50/200
100
2000
pA
0.2/2
15
50
pA/V
2.5/50 50/200
100
1000
pA
1011
3
Input Impedance, DC
Input Capacitance
µV/V
µV/kh
*
Ω
*
pF
Common Mode, voltage range
+VS-12
*
V
Common Mode, voltage range
-VS+12
*
V
Common Mode Rejection, DC
VCM = ±90V DC
Noise, broad band
10 kHz BW,
RS = 1 kΩ
84
115
*
337
*
dB
*
µV RMS
1. Sample tested by wafer to 95%.
2. Specifications separated by / indicate values for the PA341CE and PA341DF respectively.
GAIN
Parameter
Open Loop @ 15 Hz
Test
Conditions
RL = 5k Ω
Bandwidth, gain bandwidth prod@ 1 MHz
uct
Power Bandwidth
280V p-p
PA341U Rev E
PA341CE, PA341DF
Min
Typ
90
103
Max
PA341DW
Max
Units
Min
Typ
*
*
dB
10
*
MHz
35
*
kHz
5
PA341
OUTPUT
Parameter
Voltage Swing
Test
Conditions
IO = 40mA
Current, peak 1
Current, continuous
PA341CE, PA341DF
Min
Typ
Max
±VS-12 ±VS-10
PA341DW
Min
Typ
*
*
Max
Units
V
120
*
mA
60
*
mA
Settling Time to 0.1%
10V step Av =-10
2
*
µs
Slew Rate
CC = 4.7pF
32
*
V/µs
Resistance, 10mA 2
RCL = 0 Ω
91
*
Ω
Resistance, 40mA 2
RCL = 0 Ω
65
*
Ω
1. Guaranteed but not tested.
2. The selected value of RCL must be added to the values given for total output resistance.
POWER SUPPLY
Parameter
Voltage
Current, quiescent
6
Test
Conditions
PA341CE, PA341DF
PA341DW
Min
Typ
Max
Min
Typ
Max
±10
±150
2.2
±175
2.5
*
*
*
*
*
Units
V
mA
PA341U Rev E
PA341
THERMAL
Parameter
PA341CE Resistance, AC junction
to case
PA341DF Resistance, AC junction
to case
PA341DW Resistance, AC junction
to case
PA341CE Resistance, DC junction
to case
PA341DF Resistance, DC junction
to case
PA341DW Resistance, DC junction
to case
PA341CE Resistance, junction to
air
PA341DF Resistance, junction to
air 1
PA341DW Resistance,
junction to air
Temperature Range, case
Test
Conditions
PA341CE, PA341DF
Min
PA341DW
Min
Max
F > 60 Hz
5.4
6.5
°C/W
F > 60 Hz
6
7
°C/W
F > 60 Hz
Typ
7
Max
Units
Typ
10
°C/W
F < 60 Hz
9
10.4
°C/W
F < 60 Hz
9
11
°C/W
F < 60 Hz
12
Full temp range
Full temp range
°C/W
25
°C/W
30
-25
°C/W
30
Full temp range
Meets full range
spec's
14
+85
*
°C/W
*
°C
1. Rating applies with solder connection of heatslug to a minimum 1 square inch foil area of the printed circuit board.
Note: *The specification of PA341DW is identical to the specification for PA341CE, PA341DF in applicable
column to the left.
PA341U Rev E
7
PA341
TYPICAL PERFORMANCE GRAPHS
Figure 4: Power Derating
Figure 5: VBE for ILIMIT
0.85
T = TC
12
PA341CE
PA341DF
0.80
Wϯϰϭt
0.75
T = TC
9
VBE (V)
/ŶƚĞƌŶĂůWŽǁĞƌŝƐƐŝƉĂƟŽŶ͕W;tͿ
15
6
T = TA
VBE+
0.70
0.65
0.60
VBE-
3
0.55
T = TA
0
0
25
50
75
100
0.50
-40 -20
125
Temperature, T (°C)
0
20
40
60
80 100
120
Temperature (°C)
Figure 6: Small Signal Response
Figure 7: Phase Response
-90
80
-100
0.75pF
68pF
0.75pF
-110
60
2.2pF
6.8pF
40
Phase, Ɍ;ΣͿ
Open Loop Gain, A (dB)
-80
100
15pF
20
2.2pF
-120
6.8pF
-130
-140
15pF
-150
68pF
-160
0
-170
-20
10
100
1k
10k
100k
Frequency, F (Hz)
8
1M
10M
-180
10k
100k
1M
10M
Frequency, F (Hz)
PA341U Rev E
PA341
Figure 8: Gain and Compensation
Figure 9: Power Response
1000
100
Output Voltage, VOUT (VP-P)
ŽŵƉĞŶƐĂƟŽŶ͕Ɖ&
125°C
85°C
10
25°C
55°C
1
0.1
0.1
1
2.2pF
6.8pF
15pF
100
33pF
68pF
10
10k
10
100k
Gain
1M
Frequency, F (Hz)
Figure 10: Harmonic Distortion
Figure 11: Slew Rate
10
30
^ůĞǁZĂƚĞ;V/μs)
ŝƐƚŽƌƟŽŶ;йͿ
1
30VP-P
0.1
60VP-P
180VP-P
0.01
0.001
100
20
10
A V = 20
C C = 15pF
R L = 2K
ZŝƐĞ
0
1k
10k
Frequency, F (Hz)
PA341U Rev E
&Ăůů
100k
5
15
25
35
45
55
65
75
85
ŽŵƉĞŶƐĂƟŽŶĂƉĂĐŝƚŽƌ͕CC;Ɖ&)
9
PA341
Figure 12: Quiescent Current
Figure 13: Common Mode Rejection
ŽŵŵŽŶDŽĚĞZĞũĞĐƟŽŶ͕DZ;ĚͿ
Normalized Quiescent Current (%)
120
102
100
125°C
25°C
98
96
20
-40°C
100
80
60
40
20
0
10
60 100 140 180 220 260 300 340
100
Total Supply Voltage (V)
100k
Figure 15: Output Voltage Swing
100
30
WŽƐŝƟǀĞ
90
25
VDROP+@85°C
VDROP From VS (V)
WŽǁĞƌ^ƵƉƉůLJZĞũĞĐƟŽŶ͕W^Z;ĚͿ
10k
Frequency, F (Hz)
Figure 14: Power Supply Rejection
80
EĞŐĂƟǀĞ
70
60
20
VDROP-@85°C
15
VDROP-@27°C
10
5
50
VDROP+@27°C
40
10
0
100
1k
10k
Frequency, F (Hz)
10
1k
100k
0
20
40
60
80
100
120
Output Current, IO (mA)
PA341U Rev E
PA341
SAFE OPERATING AREA (SOA)
The MOSFET output stage of the PA341 is not limited by second breakdown considerations as in bipolar
output stages. However there are still three distinct limitations:
1. Voltage withstand capability of the transistors.
2. Current handling capability of the die metalization.
3. Temperature of the output MOSFETS.
These limitations can be seen in the SOA (see Safe Operating Area graphs). Note that each pulse capability line shows a constant power level (unlike second breakdown limitations where power varies with voltage
stress). These lines are shown for a case temperature of 25°C and correspond to thermal resistances of 5.2°C/
W for the PA341CE and DF and 10.4°C/W for the PA341DW respectively. Pulse stress levels for other case
temperatures can be calculated in the same manner as DC power levels at different temperatures. The output stage is protected against transient flyback by the parasitic diodes of the output stage MOSFET structure.
However, for protection against sustained high energy flyback external fast-recovery diodes must be used.
Figure 16: PA341CE and DF SOA
KƵƚƉƵƚƵƌƌĞŶƚ&ƌŽŵнVSŽƌͲVS ;ŵA)
200
ϮϬ
120
100
50
40
30
20
10
Ϭŵ
^
DC
͕d
C=
85
°C
͕d
C=
12
5°
C
5
4
3
WƵůƐĞƵƌǀĞƐΛϭϬйƵƚLJLJĐůĞDĂdž
2
200 300 500
10
20 30 50
100
^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕VS-VO (V)
PA341U Rev E
11
PA341
Figure 17: PA341DW SOA
KƵƚƉƵƚƵƌƌĞŶƚ&ƌŽŵнVSŽƌͲVS ;ŵA)
200
120
100
ϮϬ
Ϭŵ
^
50
40
30
DC
͕d
C=
͕d
85
°C
C=
12
5°
C
20
10
5
4
3
2
10
WƵůƐĞƵƌǀĞƐΛϭϬйƵƚLJLJĐůĞDĂdž
20 30
50
100
200 300 500
^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕VS-VO (V)
12
PA341U Rev E
PA341
GENERAL
Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat
sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexanalog.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and
Evaluation Kits.
TYPICAL APPLICATION
Ref: APPLICATION NOTE 20: “Bridge Mode Operation of Power Amplifiers”
Two PA341 amplifiers operated as a bridge driver for a piezo transducer provides a low cost 660 V total
drive capability. The RN CN network serves to raise the apparent gain of A2 at high frequencies. If RN is set
equal to R the amplifiers can be compensated identically and will have matching bandwidths.
Figure 18: Typical Application (Low Cost 660 VP-P Piezo Driver)
PHASE COMPENSATION
Open loop gain and phase shift both increase with increasing temperature. The PHASE COMPENSATION
typical graph shows closed loop gain and phase compensation capacitor value relationships for four case
temperatures. The curves are based on achieving a phase margin of 50°. Calculate the highest case temperature for the application (maximum ambient temperature and highest internal power dissipation) before
choosing the compensation. Keep in mind that when working with small values of compensation, parasitics
may play a large role in performance of the finished circuit. The compensation capacitor must be rated for at
least the total voltage applied to the amplifier and should be a temperature stable type such as NPO or COG.
OTHER STABILITY CONCERNS
There are two important concepts about closed loop gain when choosing compensation. They stem from
the fact that while “gain” is the most commonly used term, ß (the feedback factor) is really what counts when
designing for stability.
1. Gain must be calculated as a non-inverting circuit (equal input and feedback resistors can provide a signal
gain of -1, but for calculating offset errors, noise, and stability, this is a gain of 2).
PA341U Rev E
13
PA341
2. Including a feedback capacitor changes the feedback factor or gain of the circuit. Consider RIN=4.7k,
RF=47k for a gain of 11. Compensation of 4.7 to 6.8pF would be reasonable. Adding 33pF parallel to the
47K rolls off the circuit at 103 kHz, and at 2 MHz has reduced gain from 11 to roughly 1.5 and the circuit is
likely to oscillate.
As a general rule the DC summing junction impedance (parallel combination of the feedback resistor and
all input resistors) should be limited to 5k ohms or less. The amplifier input capacitance of about 6pF, plus
capacitance of connecting traces or wires and (if used) a socket will cause undesirable circuit performance
and even oscillation if these resistances are too high. In circuits requiring high resistances, measure or estimate the total sum point capacitance, multiply by RIN/RF, and parallel RF with this value. Capacitors included
for this purpose are usually in the single digit pF range. This technique results in equal feedback factor calculations for AC and DC cases. It does not produce a roll off, but merely keeps ß constant over a wide frequency
range. Paragraph 6 of Application Note 19 details suitable stability tests for the finished circuit.
CURRENT LIMIT
For proper operation, the current limiting resistor, RCL, must be connected as shown in Figure 2, “Typical
Connections”. The current limit can be predicted as follows:
V BE
I LIMIT A = ------------------R CL
The “VBE for ILIMIT” performance graph is used to find VBE. On this graph, the VBE+ and VBE− curves show
the voltages across the current limiting resistor at which current limiting is turned on. The VBE+ curve shows
these turn-on voltages when the amplifier is sourcing current, and the VBE− curve shows these voltages when
the amplifier is sinking current.
The current limit can be thought of as a ceiling or limit for safe operation. For continuous operation it is
any value between the desired load current and 60 mA (as long as the curves on the SOA graph are not
exceeded, please refer to Safe Operating Area). As an example, suppose the desired load current for the
application is 20 mA. In this case we may set a current limit of 30 mA. Starting with the smaller VBE− of 0.6 we
have:
0.6V
R CL = ----------- = 20
1.03
For the larger VBE+ this RCL resistor will allow for a maximum current of:
0.7V
I LIMIT A = ----------- = 35mA
20
This value is still acceptable because it is less than 60 mA. For the case of continuous load currents, check
that the current limit does not exceed 60 mA.
The VBE values used above are approximate and can vary with process. To allow for this possibility the
user can reduce the VBE = 0.6 value by 20%. This results in a RCL value of 16 Ω. Using this same RCL value and
allowing for a 20% increase in the other VBE, the current limit maximum is 52 mA.
The absolute minimum value of the current limiting resistor is bounded by the largest current and the
largest VBE in the application. The largest VBE is determined by the coldest temperature in the application. In
general the largest VBE is VBE+ = 0.78V, which occurs at T = − 40°C. The largest allowed current occurs in
pulsed applications where, from the SOA graph, we can see current pulses of 120 mA. This gives us an absolute minimum RCL value of 0.78V/0.12 (A) = 6.5 Ω.
14
PA341U Rev E
PA341
HEATSINKING
The PA341DF package has a large exposed integrated copper heatslug to which the monolithic amplifier
is directly attached. The solder connection of the heatslug to a minimum of 1 square inch foil area, on the
printed circuit board will result in thermal performance of 25°C/W junction to air rating of the PA341DF. Solder connection to an area of 1 to 2 square inches is recommended. This may be adequate heatsinking but the
large number of variables involved suggest temperature measurements be made on the top of the package.
Do not allow the temperature to exceed 85°C.
OVERVOLTAGE PROTECTION
Although the PA341 can withstand differential input voltages up to 16V, in some applications additional
external protection may be needed. Differential inputs exceeding 16V will be clipped by the protection circuitry. However, if more than a few milliamps of current is available from the overload source, the protection
circuitry could be destroyed. For differential sources above 16V, adding series resistance limiting input current to 1mA will prevent damage. Alternatively, 1N4148 signal diodes connected anti-parallel across the
input pins is usually sufficient. In more demanding applications where bias current is important, diode connected JFETs such as 2N4416 will be required. See Q1 and Q2 in Figure 19. In either case the differential input
voltage will be clamped to 0.7V. This is sufficient overdrive to produce the maximum power bandwidth.
In the case of inverting circuits where the +IN pin is grounded, the diodes mentioned above will also afford
protection from excessive common mode voltage. In the case of non-inverting circuits, clamp diodes from
each input to each supply will provide protection. Note that these diodes will have substantial reverse bias
voltage under normal operation and diode leakage will produce errors.
Some applications will also need over-voltage protection devices connected to the power supply rails.
Unidirectional zener diode transient suppressors are recommended. The zeners clamp transients to voltages
within the power supply rating and also clamp power supply reversals to ground. Whether the zeners are
used or not the system power supply should be evaluated for transient performance including power-on
overshoot and power-off polarity reversals as well as line regulation. See Z1 and Z2 in Figure 19.
Figure 19: Overvoltage Protection
PA341U Rev E
15
PA341
PACKAGE OPTIONS
Part Number
Apex Package Style
Description
MSL1
PA341CE
PA341DF
PA341DW
CE
DF
DW
8-pin TO-3
24-pin MO-166
10-pin SIP
Level 3
1. The Moisture Sensitivity Level rating according to the JEDEC industry standard classification.
PACKAGE STYLE CE
16
PA341U Rev E
PA341
PACKAGE STYLE DF
3.30 .130
3.00 [ .118 ]
16.00
.630
15.80 [ .623 ]
.30 .012
.10 [ .004 ]
13.00
9.00
.354 ]
[ .512
2.95 [.116]
6.20
5.80
.228 ]
[ .244
1.27 [.050]
.61 [.024] MAX.
11.10 .437
10.90 [.429]
14.50 .571
13.90 [.548]
A
B
2.90 [.114] MAX.
2 PLACES
.90 [.084]
REF.
1.10 [.043] MAX.
2 PLACES
PIN 1 & ESD ID
.61 [.024] MAX.
2.24 [.088]
14°±1°
TOP & BOTTOM
ALL SIDES
1.53[.060]
6.13[.242]
R.46 [R.018]
TYP.
3.07
[.121]
1.00 [.0394]
1.42
[.056]
.32
.013
.23 [ .009]
0.53 .021
0.40 .016
[ ]
.56 [.022] TYP.
0-4°
3.18 [.125] TYP
.15 [.006] REF
1.47 [.058]
1.17 [.046]
13.34 [.525]
16.27 [.641]
1.00 [.0394]
Surface Mount Layout
.10
.00
DETAIL A
000]
[ ..004
1.60 [.063] REF.
1.10 .043
.80 [ .031]
DETAIL B
NOTES:
1.
2.
3.
4.
5.
6.
7.
Dimensions are millimeters & [inches].
Bracketed alternate units are for reference only.
Dimple on lid & ESD triangle denote pin 1.
Pins & Heat Slug: MATTE TIN / ST380
Mold compound: MP-8000AN epoxy
Package weight: .086 oz. [2.44 g]
Suggested surface mount layout for reference only.
PA341U Rev E
17
PA341
PACKAGE STYLE DW
.022
[0.55]
.16
[4.17]
1.00 [25.40]
.50
[12.70]
.09 [2.3]
.75
[18.97]
.21
[5.21]
.24 [6.0]
.04 [0.89]
NOTES:
1. Dimensions are inches & [mm].
2. Triangle printed on lid denotes pin 1.
3. Pins: Alloy 510 phosphor bronze plated with matte tin
tin (150 - 300μ") over nickel (50 μ" max.) underplate.
4. Package Material: Alumina with hermetic glass seal.
5. Package weight: .1 oz [2.8 g]
.010±.002
[0.25±0.05]
.100 [2.54] TYP.
.019±.002
[0.48±0.05]
TYP.
NEED TECHNICAL HELP? CONTACT APEX SUPPORT!
For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For
inquiries via email, please contact apex.support@apexanalog.com. International customers can also request
support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you,
go to www.apexanalog.com
IMPORTANT NOTICE
Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. However, the information is
subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right
to make changes without further notice to any specifications or products mentioned herein to improve reliability. This document is the property of
Apex Microtechnology and by furnishing this information, Apex Microtechnology grants no license, expressed or implied under any patents, mask
work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Apex Microtechnology owns the copyrights associated with the
information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Apex
Microtechnology integrated circuits or other products of Apex Microtechnology. This consent does not extend to other copying such as copying for
general distribution, advertising or promotional purposes, or for creating any work for resale.
APEX MICROTECHNOLOGY PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS USED FOR LIFE
SUPPORT, AUTOMOTIVE SAFETY, SECURITY DEVICES, OR OTHER CRITICAL APPLICATIONS. PRODUCTS IN SUCH APPLICATIONS ARE UNDERSTOOD TO BE
FULLY AT THE CUSTOMER OR THE CUSTOMER’S RISK.
Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be
trademarks of their respective holders.
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