PA52 • PA52A
Power Operational Amplifiers
RoHS
COMPLIANT
FEATURES
•
•
•
•
High Internal Dissipation — 400W
High Current — 40A Continuous, 80A Peak
High Slew Rate — 50V/µs
Optional Boost Voltage Inputs
APPLICATIONS
•
•
•
•
Semi-conductor Testing
Brushless DC Motor Drive
Voltage Controlled Current Source
Electromagnetic Driver
DESCRIPTION
The PA52 is a MOSFET power operational amplifier that extends the performance limits of power amplifiers in slew rate and power bandwidth, while maintaining high current and power dissipation ratings.
Boost voltage inputs allow the small signal portion of the amplifier to operate at a higher voltage than the
high current output stage. The amplifier is then biased to achieve close linear swings to the supply rails at
high currents for extra efficient operation.
The JEDEC MO-127 12-pin Power Dip™ package (see Package Outlines) is hermetically sealed and isolated
from the internal circuits. The use of compressible thermal washers and/or improper mounting torque will
void the product warranty. Please see Application Note 1, “General Operating Considerations”.
www.apexanalog.com
© Apex Microtechnology Inc.
All rights reserved
Jul 2019
PA52U Rev K
PA52 • PA52A
Figure 1: Equivalent Schematic
TYPICAL CONNECTION
Figure 2: Typical Connection
2
PA52U Rev K
PA52 • PA52A
PINOUT AND DESCRIPTION TABLE
Figure 3: External Connections
Pin Number
Name
Description
1
2
3, 4
-IN
+IN
-VS
5, 6
-OUT
7, 8
+OUT
9, 10
11
12
+VS
+VB
-VB
The inverting input.
The non-inverting input.
The negative supply rail. Pins 3 and 4 are internally connected.
The negative output. Pins 5 and 6 are not internally connected.
Short pins 5, 6, 7, and 8.
The positive output. Pins 7 and 8 are not internally connected.
Short pins 5, 6, 7, and 8.
The positive supply rail. Pins 9 and 10 are internally connected.
The positive boost supply rail. Short to +VS if unused. See applicable section.
The negative boost supply rail. Short to -VS if unused. See applicable section.
PA52U Rev K
3
PA52 • PA52A
SPECIFICATIONS
Unless otherwise noted: TC = 25°C, DC input specifications are ± value given. Power supply voltage is typical
rating. ±VB = ±VS.
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage, +Vs To -Vs
Symbol
Min
+Vs to -Vs
Boost Voltage, +VB To -VB
Max
Units
200
V
230
V
Output Current, within SOA
IOUT
80
A
Power Dissipation, internal
PD
400
W
Input Voltage, differential
VIN (Diff)
-20
20
V
VCM
-VB
+VB
V
350
°C
150
°C
-65
+150
°C
-55
+125
°C
Input Voltage, common mode
Temperature, pin solder, 10s
Temperature, junction 1
Temperature, storage
TJ
Operating Temperature Range, case
TC
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. For guidance, refer to the heatsink data sheet.
CAUTION
4
The PA52 is constructed from MOSFET transistors. ESD handling procedures must be observed.
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do
not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic
fumes.
PA52U Rev K
PA52 • PA52A
INPUT
Parameter
Offset Voltage, initial
Offset Voltage vs. temperature
Offset Voltage vs. supply
Test
Conditions
PA52
Min
Full temp range
Bias Current, initial
Bias Current vs. supply
PA52A
Typ
Max
5
20
10
10
Min
Max
10
50
30
2
*
*
5
*
*
mV
µV/°C
µV/V
50
*
*
pA
0.01
Offset Current, initial
10
Input Impedance, DC
1011
13
Input Capacitance
Common Mode Voltage Range
Full temp range
-VB +12
+VB -14
Common Mode Rejection, DC
Full temp range,
VCM= ±20V
90
Input Noise
100 kHz BW,
RS=1 kΩ
Units
Typ
*
50
*
pA/V
*
pA
*
Ω
*
pF
*
V
100
*
10
*
PA52
PA52A
*
dB
µVrms
GAIN
Parameter
Open Loop, @ 15 Hz
Gain Bandwidth Product
Power Bandwidth
PA52U Rev K
Test
Conditions
Full temp range
RL=10 Ω
RL = 4 Ω,
VOUT=180VP-P,
AV= -10
Full temp range
Min
Typ
94
102
Max
Max
Units
Min
Typ
*
*
dB
3
*
MHz
90
*
kHz
5
PA52 • PA52A
OUTPUT
Parameter
Test
Conditions
PA52
Min
Typ
Voltage Swing
IOUT = 40A
±VS±9.5 ±VS±8.0
Voltage Swing, PA52
±VB = ±VS±10V,
IOUT=40A
±VS±5.8 ±VS±4.0
Voltage Swing, PA52A
±VB = ±VS±10V,
IOUT=50A
Current, peak
Settling Time to 0.1%
3ms 10% Duty
Cycle
AV = -10,
10V Step,
RL=4 Ω
Slew Rate
AV=-10
Resistance
IOUT=0, No Load,
2 MHz
PA52A
Max
Min
Typ
*
*
Max
Units
V
V
±VS±5.8 ±VS±5.0
80
V
*
1
A
*
50
µs
*
V/µs
2.5
*
PA52
PA52A
Ω
POWER SUPPLY
Parameter
Test
Conditions
Min
Voltage, ±VB
Full temp range +14,-12
Voltage, ±VS
Full temp range
Max
Min
Typ
Max
±30
±115
*
*
*
V
±100
*
*
V
*
*
mA
mA
±3
Current, quiescent, boost supply
Current, quiescent, total
Units
Typ
26
30
32
36
*
*
THERMAL
Parameter
Resistance, AC, junction to case 1
Resistance, DC, junction to case
Resistance, junction to air
Temperature Range, case
Test
Conditions
Full temp range,
F > 60 Hz
Full temp range,
F > 60 Hz
Full temp range
Meets full range
specification
PA52
Min
PA52A
Typ
Max
0.2
0.25
Min
Max
0.25
*
*
°C/W
0.31
*
*
°C/W
12
-25
Units
Typ
*
85
*
°C/W
*
°C
1. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz.
Note: *The specification of PA52A is identical to the specification for PA52 in applicable column to the left
6
PA52U Rev K
PA52 • PA52A
TYPICAL PERFORMANCE GRAPHS
Figure 4: Power Derating
Figure 5: Power Supply Rejection
100
WŽǁĞƌ^ƵƉƉůLJZĞũĞĐƟŽŶ͕W^Z;ĚͿ
/ŶƚĞƌŶĂůWŽǁĞƌŝƐƐŝƉĂƟŽŶ͕W;tͿ
400
300
T = TC
200
100
0
0
25
50
75
80
60
40
20
0
10
100
100
Temperature, TC (°C)
10k
100k
1M
10M
Frequency, F (Hz)
Figure 6: Small Signal Gain
Figure 7: Small Signal Phase
120
0
RLсϰɏ
Open Loop Phase, ˇ;ΣͿ
Open Loop Gain Response, AOL (dB)
1k
80
40
0
10
100
1k
10k 100k 1M 10M
Frequency, F (Hz)
PA52U Rev K
-90
-135
-180
RLсϰɏ
1
-45
1
10
100
1K
10K 100k 1M 10M
Frequency, F (Hz)
7
PA52 • PA52A
Figure 10: Power Response
200
10
Output Voltage, VOUT (VP-P)
ѐsŽůƚĂŐĞƌŽƉ&ƌŽŵ^ƵƉƉůLJ͕s^- sOUT (sͿ
Figure 8: Output Voltage Swing
8
s ^
s Bс
6
4
Ϭs
нϭ
сs ^
2
100
sB
10
0
0
10
20
30
40
100k
50
1M
Frequency, F (Hz)
Output Current, IOUT (A)
Figure 9:
Figure 11: Common Mode Rejection
Figure 12: Quiescent Current
1.18
Normalized Quiescent Current, IQ (X)
ŽŵŵŽŶDŽĚĞZĞũĞĐƟŽŶ͕DZ;ĚͿ
100
80
60
40
20
0
10
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1
100
1k
10k
Frequency, F (Hz)
8
1.16
100k
1M
0
50
100
150
200
Total Supply Voltage, VS (V)
PA52U Rev K
PA52 • PA52A
SAFE OPERATING AREA (SOA)
Figure 13: SOA
KƵƚƉƵƚƵƌƌĞŶƚ&ƌŽŵнVSŽƌͲVS (A)
80
t=
1m
s
t=
DC 10m
s
T
C =
DC
25
°C
DC TC =
8
T
5°
C =
12 C
5°
C
10
1
0.1
1
10
100
^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕VS-VOUT (V)
GENERAL
Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat
sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexanalog.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and
Evaluation Kits.
CURRENT LIMIT
There is no internal circuit provision for current limit in the PA52. However, the PA52 circuit board in the
PA52 evaluation kit does provide a means whereby the output current can be sensed. An external circuit current limit can thereby be implemented if needed.
BOOST OPERATION
With the VB feature the small signal stages of the amplifier are operated at higher supply voltages than
the amplifier’s high current output stage. +VB (pin 11) and –VB (pin 12) are connected to the small signal circuitry of the amplifier. +VS (pin 9,10) and –VS (pin 3,4) are connected to the high current output stage. An
additional 10V on the VB pins is sufficient to allow the small signal stages to drive the output transistors into
PA52U Rev K
9
PA52 • PA52A
saturation and improve the output voltage swing for extra efficient operation when required. When close
swings to the supply rails is not required the +VB and +VS pins must be strapped together as well as the –VB
and –VS pins. The boost voltage pins must not be at a voltage lower than the VS pins.
COMPENSATION
Compensation is internally fixed for a gain of 3 or more and is not adjustable by the user. The PA52 therefore is not unity gain stable.
POWER SUPPLY BYPASSING
Proper and sufficient power supply bypassing is crucial to proper operation of the PA52. Bypass the +VB
and -VB supply pins with a minimum 0.1µF ceramic capacitors directly at the supply pins. On the +VS and -VS
pins use a combination of ceramic and electrolytic capacitors. Use 1µF ceramic capacitors and an electrolytic
capacitor at least 10µF for each amp of output current required.
10
PA52U Rev K
PA52 • PA52A
PACKAGE DESIGN
PACKAGE STYLE CR
NEED TECHNICAL HELP? CONTACT APEX SUPPORT!
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subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right
to make changes without further notice to any specifications or products mentioned herein to improve reliability. This document is the property of
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Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be
trademarks of their respective holders.
PA52U Rev K
11