PA61 • PA61A
Power Operational Amplifiers
RoHS
COMPLIANT
FEATURES
•
•
•
•
Wide Supply Range — ±10 to ±45V
High Output Current — ±10A Peak
Low Cost — Class “C” Output Stage
Low Quiescent Current — 3mA
APPLICATIONS
•
•
•
•
•
Programmable Power Supply
Motor/Syncro Driver
Valve And Actuator Control
DC or AC Power Regulator
Fixed Frequency Power Oscillator
DESCRIPTION
The PA61 and PA61A are high output current operational amplifiers designed to drive resistive, inductive
and capacitive loads. Their complementary emitter follower output stage is the simple class C type and opti‐
mized for low frequency applications where crossover distortion is not critical. These amplifiers are not rec‐
ommended for audio, transducer or deflection coil drive circuits above 1 kHz or when distortion is critical.
The safe operating area (SOA) is fully specified and can be observed for all operating conditions by selection
of user programmable current limiting resistors. Both amplifiers are internally compensated for all gain set‐
tings. For continuous operation under load, mounting on a heatsink of proper rating is recommended.
This hybrid circuit utilizes thick film conductors, ceramic capacitors, and semiconductor chips to maxi‐
mize reliability, minimize size, and give top performance. Ultrasonically bonded aluminum wires provide reli‐
able interconnections at all operating temperatures. The 8‐pin TO‐3 package is electrically isolated and
hermetically sealed. The use of compressible thermal washers and/or improper mounting torque voids the
product warranty. Please see Application Note 1, “General Operating Considerations”.
Figure 1: Equivalent Schematic
3
Q1A
Q1B
2
Q3
4
A1
1
5
Q4
8
C1
Q6B
Q6A
6
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© Apex Microtechnology Inc.
All rights reserved
Dec 2015
PA61U Rev P
PA61 • PA61A
TYPICAL CONNECTION
Figure 2: Typical Connection
2
PA61U Rev P
PA61 • PA61A
PINOUT AND DESCRIPTION TABLE
Figure 3: External Connections
Pin Number
Name
Description
1
OUT
The output. Connect this pin to load and to the feedback resistors.
2
+CL
Connect to the sourcing current limit resistor. Output current flows into/out of this
pin through RCL+. The output pin and the load are connected to the other side of
RCL+.
3
‐Vs
The positive supply rail.
4
+IN
The non‐inverting input.
5
‐IN
The inverting input.
6
‐Vs
The negative supply rail.
7
NC
No connection.
8
‐CL
Connect to the sinking current limit resistor. Output current flows into/out of this
pin through RCL‐. The output pin and the load are connected to the other side of RCL‐
.
PA61U Rev P
3
PA61 • PA61A
SPECIFICATIONS
The power supply voltage for all specifications is the TYP rating unless noted as a test condition.
ABSOLUTE MAXIMUM RATINGS
Parameter
Max
Units
+Vs to ‐Vs
90
V
Output Current, within SOA
IO
10
A
Power Dissipation, internal
PD
97
W
Input Voltage, differential
VIN (Diff)
±37
V
Vcm
±VS
V
350
°C
200
°C
‐65
+150
°C
‐55
+125
°C
Supply Voltage, total
Input Voltage, common mode
Symbol
Min
Temperature, pin solder, 10s max.
Temperature, junction
1
TJ
Temperature Range, storage
Operating Temperature Range, case
TC
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dis‐
sipation to achieve high MTTF.
CAUTION
4
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do
not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic
fumes.
PA61U Rev P
PA61 • PA61A
INPUT
Parameter
Test
Conditions
PA61
Min
PA61A
Typ
Max
Min
Typ
Max
Units
Offset Voltage, initial
TC = 25°C
±2
±6
±1
±4
mV
Offset Voltage vs. Temperature
Specified temp
range
±10
±65
*
±40
µV/°C
Offset Voltage vs. Supply
TC = 25°C
±30
±200
*
*
µV/V
Offset Voltage vs. Power
TC = 25°C
±20
Bias Current, initial
TC = 25°C
12
30
10
20
nA
Bias Current vs. Temperature
Specified temp
range
±50
±500
*
*
pA/°C
Bias Current vs. Supply
TC = 25°C
±10
Offset Current, initial
TC = 25°C
±12
Offset Current vs. Temperature
Specified temp
range
±50
*
pA/°C
Input Impedance, DC
TC = 25°C
200
*
MΩ
Input Capacitance
TC = 25°C
3
*
pF
Common Mode Voltage Range 1
Specified temp
range
*
*
V
Common Mode Rejection, DC 1
Specified temp
range
*
*
dB
*
*
±30
±VS – 5 ±VS – 3
74
µV/W
100
±5
pA/V
±10
nA
1. +VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
GAIN
Parameter
Test
Conditions
Open Loop @ 10 Hz
Full temp range,
full load
Gain Bandwidth Product @ 1 MHz
TC = 25°C, full
load
Power Bandwidth
TC = 25°C, IO =
8A, VO = 40VPP
Phase Margin
Full temp range
PA61U Rev P
PA61
Min
Typ
96
108
PA61A
Max
Typ
*
*
dB
*
MHz
*
kHz
*
°
1
10
16
45
*
Max
Units
Min
5
PA61 • PA61A
OUTPUT
Parameter
Test
Conditions
PA61
Min
Typ
PA61A
Max
Min
Typ
Max
Units
Voltage Swing 1
TC=25°C, IO=10A ±VS–7
±VS–5
±VS–6
*
V
Voltage Swing 1
Full temp range,
IO = 4A
±VS–6
±VS–4
*
*
V
Voltage Swing 1
Full temp range,
IO = 68mA
±VS–5
*
V
Current
TC = 25°C
±10
*
A
Settling Time to 0.1%
TC=25°C, 2V step
Slew Rate
TC=25°C, RL=6 Ω
Capacitive Load, unit gain
Full temp range
1.5
*
Capacitive Load, gain > 4
Full temp range
SOA
*
2
1.0
2.8
*
*
µs
*
V/µs
nF
1. +VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
POWER SUPPLY
PA61
PA61A
Test
Conditions
Min
Typ
Max
Min
Typ
Max
Voltage
Full temp range
±10
±32
±45
*
*
*
V
Current, quiescent
TC = 25°C
3
10
*
*
mA
Parameter
Units
THERMAL
Parameter
Test
Conditions
PA61
Min
PA61A
Typ
Max
Min
Typ
Max
Units
Resistance, AC, junction to case 1
F > 60 Hz
1.0
1.2
*
*
°C/W
Resistance, DC, junction to case
F < 60 Hz
1.5
1.8
*
*
°C/W
Resistance, junction to air
Temperature Range, case
30
Meets full range
specs
‐25
25
*
+85
*
*
°C/W
*
°C
1. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz.
Note: * The specification of PA61A is identical to the specification for PA61 in applicable column to the left.
6
PA61U Rev P
PA61 • PA61A
TYPICAL PERFORMANCE GRAPHS
Figure 4: Power Derating
Figure 5: Output Voltage Swing
5.5
Voltage Drop From Supply (V)
/ŶƚĞƌŶĂůWŽǁĞƌŝƐƐŝƉĂƟŽŶ͕W;t)
100
T = TC
80
60
40
20
25
50
75
100
125
4.5
150
3.5
3.0
2
100
-30
80
-60
Phase, Ɍ(°)
Open Loop Gain, AOL (dB)
0
60
40
0
-180
Frequency, F (Hz)
PA61U Rev P
10
-120
-150
10k .1M
8
-90
20
1k
6
Figure 7: Phase Response
120
100
4
Output Current, IO (A)
Figure 6: Small Signal Response
10
5°C
to 8
25
=
TC
Temperature, TC (°C)
-20
1
C
25°
–
T C=
4.0
2.5
0
0
0
5.0
1M
10M
-210
1
10
100
1k
10k
.1M
1M 10M
Frequency, F (Hz)
7
PA61 • PA61A
Figure 8: Current Limit
Figure 9: Power Response
7
80
6
58
Output Voltage, VO (VP-P)
Current Limit, ILIM (A)
VS = ±40V
R с
CL Ϭ
͘ϭϮ
ɏ
5
4
3
RCL сϬ͘ϯɏ
2
1
41
RLсϴɏ
30
21
15
RLсϯɏ
11
0
-25
0
25
50
75
100
8
10k
125
20k
Figure 10: Pulse Response
.1M
120
ŽŵŵŽŶDŽĚĞZĞũĞĐƟŽŶ͕DZ;ĚͿ
Output Voltage VO (V)
70k
Figure 11: Common Mode Rejection
8
RLсϱɏ
AV = +1
4
2
0
-2
-4
-6
100
80
60
40
20
0
-8
0
2
4
6
8
Time, t (μs)
8
50k
Frequency, F (Hz)
Case Temperature, TC (°C)
6
30k
10
12
14
1
10
100
1k
10k
.1M
1M
Frequency, F (Hz)
PA61U Rev P
PA61 • PA61A
Figure 12: Bias Current
Figure 13: Harmonic Distortion
10
VS = ±36
RLсϰɏ
3
AV = 10
2.2
1.9
ŝƐƚŽƌƟŽŶ;%)
Normalized Bias Current, IB (X)
2.5
1.6
1.3
PO
=0
0.3
W
=5
PO
0.1
0W
1.0
=5
PO
0.03
.7
.4
–50
–25
0
25
50
100
75
0.01
30
125
Figure 14: Quiescent Current
1k
3k
10k
30k
Input Noise Voltage, V (nV/яHz)
100
1.4
1.2
T C = 125°C
1.0
T C = 25°C
C
55°
–
T C=
0.8
0.6
30
40
50
60
70
80
Total Supply Voltage, VS (V)
PA61U Rev P
300
Figure 15: Input Noise
1.6
0.4
20
100
Frequency, F (Hz)
Case Temperature, TC (°C)
Normalized Quiescent Current, IQ (X)
.1W
1
90
70
50
40
30
20
10
10
100
1k
10k
.1M
Frequency, F (Hz)
9
PA61 • PA61A
SAFE OPERATING AREA (SOA)
The output stage of most power amplifiers has 3 distinct limitations:
1. The current handling capability of the transistor geometry and the wire bonds.
2. The second breakdown effect which occurs whenever the simultaneous collector current and collector‐
emitter voltage exceeds specified limits.
3. The junction temperature of the output transistors.
The SOA curves combine the effect of all limits for this Power Op Amp. For a given application, the direc‐
tion and magnitude of the output current should be calculated or measured and checked against the SOA
curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. The follow‐
ing guidelines may save extensive analytical efforts.
1. Under transient conditions, capacitive and dynamic* inductive loads up to the following maximum are
safe:
Capacitive Load
Inductive Load
±VS
ILIM = 5A
ILIM = 10A
ILIM = 5A
ILIM = 10A
45V
200 F
150 F
8 mH
2.8 mH
40V
400 F
200 F
11 mH
4.3 mH
35V
800 F
400 F
20 mH
5.0 mH
30V
160 F
800 F
35 mH
6.2 mH
25V
5mF
2.5mF
50 mH
15 mH
20V
10mF
5mF
400 mH
20 mH
15V
20mF
10mF
**
100 mH
*
If the inductive load is driven near steady state conditions, allowing the output voltage to drop more than
8V below the supply rail with ILIM = 10A or 15V below the supply rail with ILIM = 5A while the amplifier is
current limiting, the inductor should be capacitively coupled or the current limit must be lowered to meet
SOA criteria.
** Second breakdown effect imposes no limitation but thermal limitations must still be observed.
2. The amplifier can handle any EMF generating or reactive load and short circuits to the supply rail or shorts
to common if the current limits are set as follows at TC = 85°C.
*
10
±VS
Short to ±VS
C, L, or EMF Load
Short to Common
45V
0.1A
1.3A
40V
0.2A
1.5A
35V
0.3A
1.6A
30V
0.5A
2.0A
25V
1.2A
2.4A
20V
1.5A
3.0A
15V
2.0A
4.0A
These simplified limits may be exceeded with further analysis using the operating conditions for a specific
application.
PA61U Rev P
PA61 • PA61A
3. The output stage is protected against transient flyback. However, for protection against sustained, high
energy flyback, external fast‐recovery diodes should be used.
T =
C
2
T = 5°C
C
85°
T =
C
C
125
°C
4.0
3.0
2.0
1.5
1.0
0.8
0.6
0.4
0.3
ms
s
0.5
Ğ
1m
t=
ƚĂƚ
s
t=
5m ĂĚLJ^
^ƚĞ
10
8.0
6.0
t=
Input Current From +VS or -VS (A)
Figure 16: SOA
0.2
0.1
10
15
20 25 30
40 50 60 70 80 90
^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕VS-VO (V)
PA61U Rev P
11
PA61 • PA61A
GENERAL
Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat
sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexana‐
log.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and
Evaluation Kits.
TYPICAL APPLICATION
Due to its high current drive capability, PA61 applications often utilize remote sensing to compensate IR
drops in the wiring. The importance of remote sensing increases as accuracy requirements, output currents,
and distance between amplifier and load go up. The circuit above shows wire resistance from the PA61 to the
load and back to the local ground via the power return line. Without remote sensing, a 7.5A load current
across only 0.05 ohm in each line would produce a 0.75V error at the load.
With the addition of the second ratio matched RF/RIN pair and two low current sense wires, IR drops in
the power return line become common mode voltages for which the op amp has a very high rejection ratio.
Voltage drops in the output and power return wires are inside the feedback loop. Therefore, as long as the
Power Op Amp has the voltage drive capability to overcome the IR losses, accuracy remains the same. Appli‐
cation Note 7 presents a general discussion of PPS circuits.
Figure 17: Typical Application (Programmable Power Supply With Remote Sensing)
12
PA61U Rev P
PA61 • PA61A
PACKAGE OPTIONS
Part Number
Apex Package Style
Description
PA61
CE
8‐pin TO‐3
PA61A
CE
8‐pin TO‐3
PACKAGE STYLE CE
PA61U Rev P
13
PA61 • PA61A
NEED TECHNICAL HELP? CONTACT APEX SUPPORT!
For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For
inquiries via email, please contact apex.support@apexanalog.com. International customers can also request
support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you,
go to www.apexanalog.com
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14
PA61U Rev P