PA74M
Table 4 Group A Inspection
SG Parameter
Symbol
Temp. Power Test Conditions
Min
Max
Units
IQ
25°C
±15
VIN = 0, AV = 100
30
mA
Input Offset Voltage
VOS
25°C
±2.5
VIN = 0, AV = 100
10
mV
1
Input Offset Voltage
VOS
25°C
±15
VIN = 0, AV = 100
10
mV
1
Input Offset Voltage
VOS
25°C
±20
VIN = 0, AV = 100
14
mV
1
Input Bias Current, +IN
+IB
25°C
±15
VIN = 0
1000
nA
1
Input Bias Current, –IN
–IB
25°C
±15
VIN = 0
1000
nA
1
Input Offset Current
IOS
25°C
±15
VIN = 0
500
nA
3
Quiescent Current
IQ
–55°C
±15
VIN = 0, AV = 100
30
mA
3
Input Offset Voltage
VOS
–55°C
±2.5
VIN = 0, AV = 100
14
mV
3
Input Offset Voltage
VOS
–55°C
±15
VIN = 0, AV = 100
14
mV
3
Input Offset Voltage
VOS
–55°C
±20
VIN = 0, AV = 100
18
mV
3
Input Bias Current, +IN
+IB
–55°C
±15
VIN = 0
1000
nA
3
Input Bias Current, –IN
–IB
–55°C
±15
VIN = 0
1000
nA
3
Input Offset Current
IOS
–55°C
±15
VIN = 0
500
nA
2
Quiescent Current
IQ
125°C
±15
VIN = 0, AV = 100
40
mA
2
Input Offset Voltage
VOS
125°C
±2.5
VIN = 0, AV = 100
15
mV
2
Input Offset Voltage
VOS
125°C
±15
VIN = 0, AV = 100
15
mV
2
Input Offset Voltage
VOS
125°C
±20
VIN = 0, AV = 100
19
mV
2
Input Bias Current, +IN
+IB
125°C
±15
VIN = 0
1000
nA
2
Input Bias Current, –IN
–IB
125°C
±15
VIN = 0
1000
nA
2
Input Offset Current
IOS
125°C
±15
VIN = 0
500
nA
4
Output Voltage, IO = 2A
VO
25°C
±9.5
RL = 3 Ω
6.0
V
4
Output Voltage, IO = 100mA
VO
25°C
±11
RL = 100 Ω
9.9
V
4
Output Voltage, IO = 1A
VO
25°C
±4.8
RL = 3 Ω
2.8
V
4
Stability/Noise
EN
25°C
±15
RL = 500 Ω, AV = 1 CL =
1.5nF
4
Crosstalk
XTLK
25°C
±15
RL = 3 Ω
50
dB
4
Slew Rate
SR
25°C
±15
RL = 500 Ω
0.5
V/µs
4
Open Loop Gain
AOL
25°C
±15
RL = 500 Ω, F = 10 Hz
75
dB
4
Common Mode Rejection
CMR
25°C
±17
RL = 500 Ω, VCM = ±14V
60
dB
1
Quiescent Current
1
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1.0
mV
Dec 2015
PA74MU Rev D
PA74M
SG Parameter
Symbol
Temp. Power Test Conditions
Min
Max
Units
6
Output Voltage, IO = 2A
VO
–55°C
±9.5
RL = 3 Ω
6.0
V
6
Output Voltage, IO = 100mA
VO
–55°C
±11
RL = 100 Ω
9.9
V
6
Output Voltage, IO = 1A
VO
–55°C
±4.8
RL = 3 Ω
2.8
V
6
Stability/Noise
EN
–55°C
±15
RL = 500 Ω, AV = 1, CL =
1.5nF
6
Slew Rate
SR
–55°C
±15
RL = 500 Ω
0.5
V/µs
6
Open Loop Gain
AOL
–55°C
±15
RL = 500 Ω, F = 10 Hz
75
dB
6
Common Mode Rejection
CMR
–55°C
±17
RL = 500 Ω, VCM = ±14V
60
dB
5
Output Voltage, IO = 1A
VO
125°C
±4.8
RL = 3 Ω
2.8
V
5
Output Voltage, IO = 100mA
VO
125°C
±11
RL = 100 Ω
9.9
V
5
Output Voltage, IO = 750mA
VO
125°C
±4.0
RL = 3 Ω
2.25
V
5
Stability/Noise
EN
125°C
±15
RL = 500 Ω, AV = 1, CL =
1.5nF
5
Slew Rate
SR
125°C
±15
RL = 500 Ω
0.5
V/µs
5
Open Loop Gain
AOL
125°C
±15
RL = 500 Ω, F = 10 Hz
75
dB
5
Common Mode Rejection
CMR
125°C
±17
RL = 500 Ω, VCM = ±14V
60
dB
2
1.0
1.0
mV
mV
PA74MU Rev D
PA74M
BURN IN CIRCUIT
Figure 1: Burn in Circuit
* These components are used to stabilize device due to poor high frequency characteristics of burn in board.
** Input signals are calculated to result in internal power dissipation of approximately 2.1W at case tempera‐
ture = 125°C
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PA74MU Rev D
3