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PA78EU

PA78EU

  • 厂商:

    APEX

  • 封装:

    SIP12

  • 描述:

    IC OPAMP POWER 1MHZ 12SIP

  • 数据手册
  • 价格&库存
PA78EU 数据手册
PA78 Power Operational Amplifier RoHS COMPLIANT FEATURES • • • • • • • • A Unique (Patent Pending) Technique for Very Low Quiescent Current Over 350 V/µs Slew Rate Wide Supply Voltage Single Supply: 20V To 350V Split Supplies: ± 10V To ± 175V Output Current – 150mA Cont.; 200mA Pk Up to 14 Watt Dissipation Capability Over 200 kHz Power Bandwidth APPLICATIONS • • • • Piezoelectric Positioning And Actuation Electrostatic Deflection Deformable Mirror Actuators Chemical And Biological Stimulators DESCRIPTION The PA78 is a high voltage, high speed, low idle current op-amp capable of delivering up to 200mA peak output current. Due to the dynamic biasing of the input stage, it can achieve slew rates over 350V/µs, while only consuming less than 1mA of idle current. External phase compensation allows great flexibility for the user to optimize bandwidth and stability. The output stage is protected with user selected current limit resistor. For the selection of this current limiting resistor, pay close attention to the SOA. Proper heatsinking is required for maximum reliability. BLOCK DIAGRAM Figure 1: Block Diagram VOUT+ ACTIVE LOAD BUFFER V+ V– CLASS AB INPUT STAGE ACTIVE LOAD www.apexanalog.com VOUT– CURRENT LIMIT © Apex Microtechnology Inc. All rights reserved VOUT Feb 2023 PA78U Rev F PA78 TYPICAL CONNECTION Figure 2: Typical Connection 2 PA78U Rev F PA78 PINOUT AND DESCRIPTION TABLE Figure 3: External Connections 1 2 -IN +IN 3 -RC 4 +RC 5 +CC 6 NC 7 NC 8 NC 9 NC 10 NC TOP VIEW -VS 20 19 -CC 18 VOUT CL 17 +VS 16 15 NC NC 14 13 NC 12 NC 11 NC Pin Number Name Description 1 2 -IN +IN 3 -RC 4 +RC 5 +CC 16 +Vs 17 CL The inverting input. The non-inverting input. Negative compensation resistor connection. Select value based on Phase Compensation. See applicable section. Positive compensation resistor connection. Select value based on Phase Compensation. See applicable section. Positive compensation capacitor connection. Select value based on Phase Compensation. See applicable section. The positive supply rail. Connect to the current limit resistor. Output current flows into/out of this pin through RCL. The output pin and the load are connected to the other side of RCL.   18 OUT 19 -CC 20 All Others -Vs NC PA78U Rev F The output. Connect this pin to load and to the feedback resistors. Negative compensation capacitor connection. Select value based on Phase Compensation. See applicable section. The negative supply rail. No connection. 3 PA78 SPECIFICATIONS Unless otherwise noted: TC = 25°C, DC input specifications are ± value given, power supply voltage is typical rating. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Max Units +Vs to -Vs 350 V Output Current, peak (200ms), within SOA IO 200 mA Power Dissipation, internal, DC PD 14 W Supply Voltage, total Input Voltage, differential Input Voltage, common mode Min VIN (Diff) -15 16 V Vcm -VS +VS V 150 °C -55 125 °C -40 125 °C Temperature, junction 1 Temperature Range, storage TJ Operating Temperature, case TC 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. INPUT Parameter Offset Voltage, initial Offset Voltage vs. Temperature Offset Voltage vs. Supply Bias Current, initial Offset Current, initial Test Conditions Min Typ Max Units -40 8 -63 40 mV µV/°C µV/V pA pA 0 to 125°C (Case Temp) 8.5 12 Input Resistance, DC Common Mode Voltage Range, Neg. Common Mode Voltage Range, Pos. Common Mode Rejection, DC Noise Noise, VO Noise 4 90 700 kHz 32 200 400 108 Ω +VS - 2 V -VS + 5.5 V 118 418 dB µV RMS 500 nV/√Hz PA78U Rev F PA78 GAIN Parameter Test Conditions Open Loop @ 1Hz Gain Bandwidth Product @ 1MHz Phase Margin Full temp range +VS = 160V, −VS = -160V Power Bandwidth, 300VP-P Min Typ Max Units 89 120 1 50 dB MHz ° 200 kHz OUTPUT Parameter Test Conditions Min Typ Voltage Swing IO = 10mA |VS| - 2 Voltage Swing IO = 100mA |VS| - 8.6 Voltage Swing IO = 150mA |VS| - 10 Current, continuous, DC Slew Rate Settling Time, to 0.1% Output Resistance, No load Max V |VS| - 12 100 V V 150 Package Tab connected to GND 2V Step RCL = 6.2 Ω Units mA 350 V/µs 1 µs 44 Ω POWER SUPPLY Parameter Test Conditions Voltage Current, quiescent 1 ±150V Supply Min Typ Max Units ±10 ±150 ±175 V 0.2 0.7 2.5 mA Min Typ Max Units 9.1 °C/W 1. Supply current increases with signal frequency. See graph on page 4. THERMAL Parameter Test Conditions Resistance, DC, junction to case Full temp range 8.3 Resistance, DC, junction to air 1 Full temp range 25 °C/W Resistance, DC, junction to air 2 Temperature Range, case Full temp range 19.1 °C/W -40 125 °C 1. Rating applies when the heatslug of the DK package is soldered to a minimum of 1 square inch foil area of a printed circuit board. 2. Rating applies with the JEDEC conditions outlined in the Heatsinksing section of this datasheet. PA78U Rev F 5 PA78 TYPICAL PERFORMANCE GRAPHS Figure 4: Power Derating Figure 5: Current Limit 160 140 20 Current Limit, ILIM (mA) /ŶƚĞƌŶĂůWŽǁĞƌŝƐƐŝƉĂƟŽŶ͕W;tͿ 25 15 10 5 120 100 80 60 +VS 40 –VS 20 0 0 0 25 50 75 100 125 0 Figure 6: Common Mode Rejection Figure 7: Power Supply Rejection 100 120 WŽǁĞƌ^ƵƉƉůLJZĞũĞĐƟŽŶ;ĚͿ ŽŵŵŽŶDŽĚĞZĞũĞĐƟŽŶ;Ě) 140 100 80 60 40 20 0 10 100 1k Frequency, F (Hz) 6 100 Resistor Value (ɏ) Case Temperature, TC (°C) 1 50 10k 100k -VS 80 +VS 60 40 20 0 100 1k 10k Frequency, F (Hz) PA78U Rev F PA78 Figure 8: Small Signal Open Loop Gain Figure 9: Small Signal Open Loop Phase 100 180 RC = Open, CC = 0pF 150 RC = 3.3 k, CC = 1pF 80 120 RC = 3.3 k, CC = 2.2pF RC = 3.3 k, CC = 5pF 40 20 CS = 68pF PIN = -40dBm RC = 3.3 k, CC = 10pF R 0 BIAS = Open RSсϰϴ͘ϳё RC = 3.3 k, CC = 22pF VS = ±50V -20 1k 10k 100k 60 30 1M Figure 11: Small Signal Open Loop Phase, VO= 250 mVP-P 180 45 35 150 25 120 A V = +26 C = 5pF R -5 BIAS = 100 k C RC = 3.3 k CC = 10pF -15 RF = 35.7 k RG = 1.5 k CC = 22pF -25 RL = 50 k VS = ±50V -35 10k 100k 1M Frequency (Hz) RC = 3.3 k, CC = 22pF RC = 3.3 k, CC = 10pF 90 CC = 1pF CC = 2.2pF Phase (°) Gain (dB) CC = 0pF PA78U Rev F 1M Frequency (Hz) Figure 10: Small Signal Gain vs. Compensation VO= 500 mVP-P 5 RC = 3.3 k, CC = 5pF RC = 3.3 k, CC = 2.2pF 0 CS = 68pF PIN = -40dBm RC = 3.3 k, CC = 1pF -30 RBIAS = 100K RSсϰϴ͘ϳё RC = Open, CC = 0pF -60 VS = ±50V -90 1k 10k 100k Frequency (Hz) 15 RC = 3.3 k, CC = 22pF 90 Phase (°) Gain (dB) 60 RC = 3.3 k, CC = 10pF 10M 60 30 RC = 3.3 k, CC = 5pF RC = 3.3 k, 0 CS = 68pF CC = 2.2pF -30 P = -40dBm IN RC = 3.3 k, CC = 1pF -60 RBIAS = Open RSсϰϴ͘ϳё RC = Open, CC = 0pF -90 1k 10k 100k 1M Frequency (Hz) 7 PA78 Figure 12: Small Signal Gain vs. Compensation, VO= 5 VP-P Figure 13: Large Signal Gain vs. Compensation, VO= 50VP-P 35 35 CC = 0pF CC = 0pF 25 25 15 5 CC = 1pF Gain (dB) Gain (dB) 15 CC = 2.2pF -5 A V = +26 CC = 5pF RBIAS = 100 k CC = 10pF -15 R = 35.7 k F RG = 1.5 k CC = 22pF -25 R = 50 k L VS = ±50V -35 10k 100k 1M CC = 1pF 5 CC = 2.2pF -5 A V = +26 RBIAS = 100 k RF = 35.7 k RG = 1.5 k RL = 50 k VS = ±50V -15 -25 -35 10k 10M Voltage Drop From Supply (V) Gain (dB) 500 mVP-P 15 -25 10k A V = +51 RBIAS = 100 k RC = OPEN RF = 75 k RG = 1.5 k RL = 50 k VS = ±50V 5 VP-P 100k 50 VP-P 10 -VS SIDE DROP 8 6 +VS SIDE DROP 4 2 0 1M Frequency (Hz) 8 10M 12 35 -15 1M Figure 15: Output Voltage Swing 45 -5 CC = 22pF Frequency (Hz) Figure 14: Gain vs. Input/Output Signal Level 5 CC = 10pF 100k Frequency (Hz) 25 CC = 5pF 10M 0 50 100 150 200 Peak to Peak Load Current (mA) PA78U Rev F PA78 Figure 16: Power Response Figure 17: SR+/SR- (25% - 75%) 1000 350 SR+ GAIN = -50 800 SR- GAIN = -100 250 SR (V/μs) Output Voltage (V) 300 200 150 600 A V = +101 CL = 8pF RF = 25 k RGсϮϱϬё RL = 50 k VS = ±150V 400 100 200 50 NO COMPENSATION 0 0 1k 10k 100k 0 1M 4 6 8 10 12 14 16 Peak-to-Peak Input Voltage (V) Frequency, F (Hz) Figure 18: SR+/SR- (25% - 75%) Figure 19: SR+/SR- (25% - 75%) 1000 1000 SR+ 800 SR600 A V = +51 CL = 8pF RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V 400 200 A V = +26 CL = 8pF RF = 35.6 k RG = 1.5 k RL = 50 k VS = ±150V 800 Slew Rate (V/μs) Slew Rate (V/μs) 2 600 SR+ 400 SR200 0 0 0 2 4 6 8 10 12 14 Peak-to-Peak Input Voltage (V) PA78U Rev F 16 0 2 4 6 8 10 12 14 16 Peak-to-Peak Input Voltage 9 PA78 Figure 20: SR+/SR- (25% - 75%) Figure 21: SR+/SR- (25% - 75%) 1600 RF = 75 k RG = 1.5 k 1000 R = 50 k L VS = ±150V 800 CL = 8pF RF = 75 k 1400 RG = 1.5 k RL = 50 k 1200 VS = ±150V CL = 8pF 1000 SR+(A V = -25) SR-(A V = -25) SR+(A V = +26) SR-(A V = +26) V/μs 600 800 600 400 SR+(A V = -50) SR-(A V = -50) SR+(A V = +51) SR-(A V = +51) 400 200 200 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Peak-to-Peak Input Voltage (V) Peak-to-Peak Input Voltage (V) Figure 22: Transient Response Figure 23: Transient Response 1.2 30 1.5 10 0.8 20 1 5 0 -5 -10 -15 -4 -2 0 2 input 1 1VP-P 0.4 A V = +26 CC = 2.2pF CL = 8pF RC = 3.3 k RF = 35.7 k RG = 1.5 k RL = 50 k 0 4 6 Time (μs) 10 -0.4 -0.8 8 10 -1.2 12 Output Voltage (V) 15 Input Voltage (V) Output Voltage (V) 0 input 2 2VP-P 10 0 0 A V = +26 CC = 2.2pF CL = 8pF RC = 3.3 k RF = 35.7 k RG = 1.5 k RL = 50 k -10 -20 -30 -4 0.5 -2 0 2 4 6 Input Voltage (V) SR+/SR- (V/μs) 1200 -0.5 -1 8 10 -1.5 12 Time (μs) PA78U Rev F PA78 Figure 24: Transient Response Figure 25: Rise and Fall Time (10%-90%) 6 50 4 A V = +26 CC = 2.2pF CL = 8pF RC = 3.3 k RF = 35.7 k RG = 1.5 k RL = 50 k 0 -50 -100 -2 2 0 4 0 -4 A V = +51 CL = 8pF RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V 0.8 0.6 Time (μs) input 10 10VP-P Input Voltage (V) Output Voltage (V) 100 -150 -4 1 8 150 TF 0.4 TR 0.2 -6 6 8 10 0 -8 12 0 Figure 26: Pulse Response vs. CC and RC 60 Out - 1pF & 3.3 k 0 1.2 0.6 0 -1.2 Out - 5pF & 3.3 k -90 -1.8 -120 -2.4 0 1 2 3 4 Time (μs) PA78U Rev F 5 6 7 0.15 1.8 -0.6 -1 12 14 16 A V = +51 CL = 8pF RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V 2.4 -30 -150 -2 10 8 -3.0 0.1 IS (A) input -60 8 0.2 Input Votlage (V) Output Votlage (V) A V = +51 CC = 68pF CL = 330pF RCсϰϴё RF = 75 k RG = 1.5 k RL = OPEN VS = ±150V Out - 0pF 30 6 Figure 27: Pulse Response 3.0 150 90 4 Peak-to-Peak Input Voltage (V) Time (μs) 120 2 0.05 0 -0.05 -1 0 1 2 3 4 5 6 Time (μs) 11 PA78 Figure 28: Pulse Response vs. Cap Load Figure 29: Pulse Response vs. Cap Load 140 140 300pf, 3VP-P 200pf, 3VP-P 100pf, 3VP-P 100 80 80 60 60 Output (v) Output (v) 100 40 20 A V = -50 RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V 0 -20 -40 -60 -80 -6 -2 2 6 300pF, 2VP-P 200pF, 2VP-P 100pF, 2VP-P 120 40 20 A V = -50 RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V CL = 8pF 0 -20 -40 -60 10 14 18 22 26 -80 -6 30 2 -2 6 Figure 30: Pulse Response vs Cap Load INPUT 300pF, 1VP-P 200pF, 1VP-P 100pF, 1VP-P 100 Output Votlage (V) 60 40 20 A V = -50 RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V 0 -20 -40 -60 -2 2 6 10 14 18 Time (μs) 4 200 80 Output (v) 6 300 120 30 Figure 31: Overdrive Recovery 140 12 22 26 Time (μs) Time (μs) -80 -6 10 14 18 OUTPUT 100 A V = +51 CC = OPEN CL = 8pF RC = OPEN RF = 75 k RG = 1.5 k RL = 50 k VS = ±150V 0 -100 -200 22 26 30 -300 -4 2 0 -2 Input Votlage (V) 120 -4 -6 -2 0 2 4 6 8 10 12 Time (μs) PA78U Rev F PA78 Figure 32: Supply Current vs. VIN Figure 33: Supply Current vs. Frequency 30 18 A V = +51 CL = 8pF CS = 68pF RF = 75 k RG = 1.5 k RL = 50 k RSсϰϴ͘ϳё VS = ±150V 14 IS (mA) 12 10 8 25 20 IS (mA) 16 15 A V = +51 CL = 8pF CS = 68pF RF = 75 k RG = 1.5 k RL = 50 k RSсϰϴ͘ϳё VS = ±150V VIN = 6VP 10 6 4 VIN = 3VP 5 2 0 0 1 2 3 4 5 6 7 VIN, VP-P (100kHz sine wave) PA78U Rev F 8 9 0 10 100 1000 Frequency (kHz Sine Wave) 13 PA78 HEATSINKING AND SAFE OPERATING AREA (SOA) The MOSFET output stage of the PA78 is not limited by second breakdown considerations as in bipolar output stages. Only thermal considerations of the package and current handling capabilities limit the Safe Operating Area. The SOA plots include power dissipation limitations which are dependent upon case temperature. Keep in mind that the dynamic current sources which drive high slew rates can increase the operating temperature of the amplifier during periods of repeated slewing. The plot of supply current vs. input signal amplitude for a 100 kHz signal provides an indication of the supply current with repeated slewing conditions. This application dependent condition must be considered carefully. The output stage is self-protected against transient flyback by the parasitic body diodes of the output stage. However, for protection against sustained high energy flyback, external fast recovery diodes must be used. Figure 34: SOA WƵůƐĞƵƌǀĞƐ ΛϭϬйƵƚLJLJĐůĞDĂdž S 0m S 5°C 20 0m = 2 °C 30 ͕d C = 85 ͕d C  0.1  KƵƚƉƵƚƵƌƌĞŶƚ&ƌŽŵнVSŽƌͲVS (A) 1 0.01 10 100 1000 ^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕VS-VO (V) 14 PA78U Rev F PA78 GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexanalog.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and Evaluation Kits. TYPICAL APPLICATION The PA78 is ideally suited for driving continuous drop ink jet printers, in both piezo actuation and deflection applications. The high voltage of the amplifier creates an electrostatic field on the deflection plates to control the position of the ink droplets. The rate at which droplets can be printed is directly related to the rate at which the amplifier can drive the plate to a different electrostatic field strength. Figure 35: Typical Application THEORY OF OPERATION The PA78 is designed specifically as a high speed pulse amplifier. In order to achieve high slew rates with low idle current, the internal design is quite different from traditional voltage feedback amplifiers. Basic op amp behaviors like high input impedance and high open loop gain still apply. But there are some notable differences, such as signal dependent supply current, bandwidth and output impedance, among others. The impact of these differences varies depending on application performance requirements and circumstances. These different behaviors are ideal for some applications but can make designs more challenging in other circumstances. SUPPLY CURRENT AND BYPASS CAPACITANCE A traditional voltage feedback amplifier relies on fixed current sources in each stage to drive the parasitic capacitances of the next stage. These currents combine to define the idle or quiescent current of the amplifier. By design, these fixed currents are often the limiting parameter for slew rate and bandwidth of the amplifier. Amplifiers which are high voltage and have fast slew rates typically have high idle currents and dissipate notable power with no signal applied to the load. At the heart of the PA78 design is a signal dependent current source which strikes a new balance between supply current and dynamic performance. With small PA78U Rev F 15 PA78 input signals, the supply current of the PA78 is very low, idling at less than 1 mA. With large transient input signals, the supply currents increase dramatically to allow the amplifier stages to respond quickly. The Pulse Response plot in the typical performance section of this datasheet describes the dynamic nature of the supply current with various input transients. Choosing proper bypass capacitance requires careful consideration of the dynamic supply currents. High frequency ceramic capacitors of 0.1µF or more should be placed as close as possible to the amplifier supply pins. The inductance of the routing from the supply pins to these ceramic capacitors will limit the supply of peak current during transients, thus reducing the slew rate of the PA78. The high frequency capacitance should be supplemented by additional bypass capacitance not more than a few centimeters from the amplifier. This additional bypass can be a slower capacitor technology, such as electrolytic, and is necessary to keep the supplies stable during sustained output currents. Generally, a few microfarads are sufficient. SMALL SIGNAL PERFORMANCE The small signal performance plots in the typical performance section of this datasheet describe the behavior when the dynamic current sources described previously are near the idle state. The selection of compensation capacitor directly affects the open loop gain and phase performance. Depending on the configuration of the amplifier, these plots show that the phase margin can diminish to very low levels when left uncompensated. This is due to the amount of bias current in the input stage when the part is in standby. An increase in the idle current in the output stage of the amplifier will improve phase margin for small signals although will increase the overall supply current. Current can be injected into the output stage by adding a resistor, RBIAS, between CC- and VS+. The size of RBIAS will depend upon the application but 500µA (50V V+ supply/100K) of added bias current shows significant improvement in the small signal phase plots. Adding this resistor has little to no impact on small signal gain or large signal performance as under these conditions the current in the input stage is elevated over its idle value. It should also be noted that connecting a resistor to the upper supply only injects a fixed current and if the upper supply is fixed and well bypassed. If the application includes variable or adjustable supplies, a current source diode could also be used. These two terminal components combine a JFET and resistor connected within the package to behave like a current source. As a second stability measure, the PA78 is externally compensated and performance can be optimized to the application. Unlike the RBIAS technique, external phase compensation maintains the low idle current but does affect the large signal response of the amplifier. Refer to the small and large signal response plots as a guide in making the trade-offs between bandwidth and stability. Due to the unique design of the PA78, two symmetric compensation networks are required. The compensation capacitor Cc must be rated for a working voltage of the full operating supply voltage (+VS to –VS). NPO capacitors are recommended to maintain the desired level of compensation over temperature. The PA78 requires an external 33pF capacitor between CC- and –VS to prevent oscillations in the falling edge of the output. This capacitor should be rated for the full supply voltage (+VS to –VS). LARGE SIGNAL PERFORMANCE As the amplitude of the input signal increases, the internal dynamic current sources increase the operation bandwidth of the amplifier. This unique performance is apparent in its slew rate, pulse response, and large signal performance plots. Recall the previous discussion about the relationships between signal amplitude, supply current, and slew rate. As the amplitude of the input amplitude increases from 1VP-P to 15VP-P, the slew rate increases from 50V/µs to well over 350V/µs. Notice the knee in the Rise and Fall times plot, at approximately 6VP-P input voltage. Beyond this point the output becomes clipped by the supply rails and the amplifier is no longer operating in a closed loop fash- 16 PA78U Rev F PA78 ion. The rise and fall times become faster as the dynamic current sources are providing maximum current for slewing. The result of this amplifier architecture is that it slews fast, but allows good control of overshoot for large input signals. This can be seen clearly in the large signal Transient Response plots. CURRENT LIMIT For proper operation, the current limit resistor, RLIM, must be connected as shown in the external connections diagram. For maximum reliability and protection, the largest resistor value should be used. The minimum practical value for RLIM is about 12Ω. However, refer to the SOA to assist in selecting the optimum value for RLIM in the intended application. Current limit may not protect against short circuit conditions with supply voltages over 200V. LAYOUT CONSIDERATIONS The PA78 is built on a dielectrically isolated process and the package tab is therefore not electrically connected to the amplifier. For high speed operation, the package tab should be connected to a stable reference to reduce capacitive coupling between amplifier nodes and the floating tab. It is often convenient to directly connect the tab to GND or one of the supply rails, but an AC connection through a 1µF capacitor to GND is also sufficient if a DC connection is undesirable. Care should be taken to position the RC / CC compensation networks close to the amplifier compensation pins. Long loops in these paths pick up noise and increase the likelihood of LC interactions and oscillations. The PA78DK package has a large exposed integrated copper heatslug to which the monolithic amplifier is directly attached. The solder connection of the heat slug to a 1 square inch foil area on the printed circuit board will result in improved thermal performance of 25°C/W. In order to improve the thermal performance, multiple metal layers in the printed circuit board are recommended. This may be adequate heatsinking but the large number of variables involved suggest temperature measurements be made on the top of the package. Do not allow the temperature to exceed 85°C. The junction to ambient thermal resistance of the DK package can achieve a 19.1°C/W rating by using the PCB conditions outlined in JEDEC standard: (JESD51–5): PCB Conditions: PCB Layers = 4L, Copper, FR–4 PCB Dimensions = 101.6 x 114.3mm PCB Thickness = 1.6mm Conditions: Power dissipation = 2 Watt Ambient Temperature = 55°C ELECTROSTATIC DISCHARGE Like many high performance MOSFET amplifiers, the PA78 is very sensitive to damage due to electrostatic discharge (ESD). Failure to follow proper ESD handling procedures could have results ranging from reduced operating performance to catastrophic damage. Minimum proper handling includes the use of grounded wrist or shoe straps, grounded work surfaces. Ionizers directed at the work in progress can neutralize the charge build up in the work environment and are strongly recommended. PA78U Rev F 17 PACKAGE OPTIONS Part Number Apex Package Style Description MSL1 PA78DK DK 20-pin PSOP Level 3 1. The Moisture Sensitivity Level rating according to the JEDEC industry standard classification. PACKAGE STYLE DK PA78 NEED TECHNICAL HELP? CONTACT APEX SUPPORT! For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@apexanalog.com. International customers can also request support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you, go to www.apexanalog.com IMPORTANT NOTICE Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right to make changes without further notice to any specifications or products mentioned herein to improve reliability. This document is the property of Apex Microtechnology and by furnishing this information, Apex Microtechnology grants no license, expressed or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Apex Microtechnology owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Apex Microtechnology integrated circuits or other products of Apex Microtechnology. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. APEX MICROTECHNOLOGY PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS USED FOR LIFE SUPPORT, AUTOMOTIVE SAFETY, SECURITY DEVICES, OR OTHER CRITICAL APPLICATIONS. PRODUCTS IN SUCH APPLICATIONS ARE UNDERSTOOD TO BE FULLY AT THE CUSTOMER OR THE CUSTOMER’S RISK. Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be trademarks of their respective holders. PA78U Rev F 19
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