PA79DK

PA79 Power Operational Amplifier RoHS COMPLIANT FEATURES • • • • • • A Unique (Patent Pending) Technique for Very Low Quiescent Current Over 350 V/µs Slew Rate Wide Supply Voltage Single Supply: 20V To 350V Split Supplies: ± 10V To ± 175V Output Current – Per Amplifier – 50mA Cont.; 200mA Pk Up to 26 Watt Dissipation Capability (Dual) Over 200 kHz Power Bandwidth APPLICATIONS • • • • Piezoelectric Positioning and Actuation Electrostatic Deflection Deformable Mirror Actuators Chemical and Biological Stimulators DESCRIPTION The PA79 is a high voltage, high speed, low idle current op-amp capable of delivering up to 200mA peak output current. Due to the dynamic biasing of the input stage, it can achieve slew rates over 350V/µs, while only consuming less than 1mA of idle current. External phase compensation allows great flexibility for the user to optimize bandwidth and stability. The output stage is protected with user selected current limit resistor. For the selection of this current limiting resistor, pay close attention to the SOA curves for each package type. Proper heatsinking is required for maximum reliability. Figure 1: Equivalent Schematic ACTIVE LOAD VOUT+ BUFFER V+ V– CLASS AB INPUT STAGE ACTIVE LOAD www.apexanalog.com VOUT– CURRENT LIMIT © Apex Microtechnology Inc. All rights reserved VOUT Feb 2023 PA79U Rev E PA79 TYPICAL CONNECTION Figure 2: Typical Connection 2 PA79U Rev E PA79 PINOUT AND DESCRIPTION TABLE Figure 3: External Connections Notes: 1. The package heat slug needs to be connected to a stable reference such as gnd for high slew rates. Please refer to special considerations section for details. 2. Supply bypassing required for –VS and +VS. 3. For CC and RC values refer to power supply biasing section. 4. Dimple and ESD triangle denotes pin 1. Pin Number Name Description 1 2 -IN_A +IN_A 3 -RC_A 4 +RC_A The inverting input for channel A. The non-inverting input for channel A. Negative compensation resistor connection for channel A. Select value based on Phase Compensation. See applicable section. Positive compensation resistor connection for channel A. Select value based on Phase Compensation. See applicable section. 5 +CC_A 6 7 8 -Vs_B -IN_B +IN_B 9 +RC_B 10 -RC_B 11 +CC_B 12 +Vs_B 13 -CC_B PA79U Rev E Positive compensation capacitor connection for Channel A. Select value based on Phase Compensation. See applicable section. The negative supply rail for channel B. The inverting input for channel B. The non-inverting input for channel B. Positive compensation resistor connection for channel B. Select value based on Phase Compensation. See applicable section. Negative compensation resistor connection for channel B. Select value based on Phase Compensation. See applicable section. Positive compensation capacitor connection for channel B. Select value based on Phase Compensation. See applicable section. The positive supply rail for channel B. Negative compensation capacitor connection for channel B. Select value based on Phase Compensation. See applicable section. 3 PA79 Pin Number 4 Name Description 14 CL_B Connect to the current limit resistor. Output current flows into/out of these pins through RCL_B. The output pin and the load are connected to the other side of the RCL_B. 15 16 OUT_B +Vs_A 17 CL_A 18 OUT_A 19 -CC_A 20 -Vs_A The output for channel B. Connect this pin to load and to the feedback resistors. The positive supply rail for channel A. Connect to the current limit resistor. Output current flows into/out of these pins through RCL_A. The output pin and the load are connected to the other side of the RCL_A. The output for channel A. Connect this pin to load and to the feedback resistors. Negative compensation capacitor connection for channel A. Select value based on Phase Compensation. See applicable section. The negative supply rail for channel A. PA79U Rev E PA79 SPECIFICATIONS Unless otherwise noted: TC = 25°C, DC input specifications are ± value given, power supply voltage is typical rating. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Max Units +Vs to -Vs 350 V Output Current, peak (200ms), within SOA IO 200 mA Power Dissipation, internal, DC Single PD 14 W Power Dissipation, internal, DC Dual PD 26 W Supply Voltage, total Input Voltage, differential Input Voltage, common mode Min VIN (Diff) -15 15 V Vcm -VS VS V 150 °C -55 125 °C -40 85 °C TJ Temperature, junction 1 Temperature Range, storage TC Operating Temperature Range, case 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. INPUT Parameter Test Conditions Offset Voltage, initial Offset Voltage vs. temperature Min Typ Max Units -40 8 40 mV 0 to 125°C (Case Temperature) -63 Offset Voltage vs. supply Bias Current, initial Offset Current, initial 8.5 12 Input Resistance, DC 1 Common Mode Voltage Range, pos. Common Mode Voltage Range, neg. Common Mode Rejection, DC Noise Noise, VO Noise 90 700 kHz µV/°C 32 200 400 µV/V pA pA 108 Ω +VS - 2 V -VS + 5.5 V 118 418 dB µV RMS 500 nV/√Hz 1. Rating applies when power dissipation is equal in two amplifiers. PA79U Rev E 5 PA79 GAIN Parameter Test Conditions Open Loop @ 1 Hz Gain Bandwidth Product @ 1 MHz Phase Margin Full temp range Min Typ 89 120 1 50 Min Typ Max Units dB MHz ° OUTPUT Parameter Test Conditions Voltage Swing IO = 10mA |VS| - 2 Voltage Swing IO = 100mA |VS| - 8.6 Voltage Swing IO = 150mA |VS| - 10 Current, continuous, DC Settling Time to 0.1% Power Bandwidth, 300VP-P Output Resistance, no load RCL = 6.2 Ω 100 Units V |VS| - 12 V V 150 Package Tab connected to GND 5V Step (No Compensation) +VS = 160V, −VS = -160V Slew Rate Max mA 350 V/µs 1 µs 200 kHz 44 Ω POWER SUPPLY Parameter Test Conditions Voltage 1 Current, quiescent ±150V Supply Min Typ Max Units ±10 ±150 ±175 V 0.2 0.7 2.5 mA Max Units 1. Supply current increases with signal frequency. See Figure 32. Applies to each amplifier. THERMAL Parameter Resistance, DC, junction to case, Dual 1 Resistance, DC, junction to case, Single Resistance, junction to air, Dual Resistance, junction to air, Single Temperature Range, case Test Conditions Min Typ Full temp range 5.5 Full temp range 8.3 Full temp range Full temp range 25 19.1 -40 °C/W 9.1 °C/W 125 °C/W °C/W °C 1. Rating applies when power dissipation is equal in two amplifiers. 6 PA79U Rev E PA79 Notes: 1. +VS and –VS denote the positive and negative supply voltages of the output stage. 2. Rating applies if output current alternates between both output transistors at a rate faster than 60 Hz. 3. Rating applies when the heatslug of the DK package is soldered to a minimum of 1 square inch foil area of a printed circuit board. 4. Rating applies with the JEDEC conditions outlined in the Heatsinking section of this datasheet. PA79U Rev E 7 PA79 TYPICAL PERFORMANCE GRAPHS Figure 4: Power Response Figure 5: Current Limit 160 350 GAIN = -50 140 250 Current Limit, ILIM (mA) Output Voltage (V) 300 GAIN = -100 200 150 100 50 120 100 80 60 +VS 40 –VS 20 EŽŽŵƉĞŶƐĂƟŽŶ 0 0 1 10 100 0 1000 Figure 6: Power Derating Figure 7: Power Supply Rejection 100 WŽǁĞƌ^ƵƉƉůLJZĞũĞĐƟŽŶ;ĚͿ 30 /ŶƚĞƌŶĂůWŽǁĞƌŝƐƐŝƉĂƟŽŶ͕W;tͿ 100 Resistor Value (ɏ) Frequency (kHz) 25 Two Amplifiers Loaded 20 15 One Amplifier Loaded 10 5 0 0 25 50 75 100 Case Temperature, TC (°C) 8 50 125 -VS 80 +VS 60 40 20 0 100 1k 10k Frequency, F (Hz) PA79U Rev E PA79 Figure 8: Output Voltage Swing Figure 9: Common Mode Rejection 140 ŽŵŵŽŶDŽĚĞZĞũĞĐƟŽŶ;ĚͿ Voltage Drop From Supply (V) 12 10 -VS Side Drop 8 6 +VS Side Drop 4 2 0 0 50 100 150 120 100 80 60 40 20 0 200 1 10 Peak to Peak Load Current (mA) 100 120 CC = 22pF 100 60 60 Phase (°) CC = 10pF CC = 22pF 20 CC = 10pF 80 EŽŽŵƉĞŶƐĂƟŽŶ CC = 2.7pF 40 Gain (dB) 100k Figure 11: Phase Response 80 0 CC = 2.7pF 40 20 0 EŽŽŵƉĞŶƐĂƟŽŶ -20 33pF Pin 3 To GND ϭϬϬŬɏнsS To Pin 3 RCсϯ͘ϯ