PB63DP

PB63 • PB63A Dual Power Booster Amplifier FEATURES • • • • • • • Wide Supply Range – ±20 V to ±75 V High Output Current – Up to 2 A Continuous Programmable Gain High Slew Rate – 1000 V/µs Typical Programmable Output Current Limit High Power Bandwidth – 1 MHz Typical Low Quiescent Current – 37 mA Typical (Total, Both Channels) APPLICATIONS • • • • • • • LED Test Equipment LCD Test Equipment Semiconductor Test Equipment High Voltage Instrumentation Electrostatic Transducers and Deflection Piezoelectric Positioning and Actuation Programmable Power Supplies DESCRIPTION The PB63 is a dual high voltage, high current booster amplifier designed to provide voltage and current gain for a small signal, general purpose op amp. Including the power booster within the feedback loop of the driver amplifier results in a composite amplifier with the accuracy of the driver and the extended output current capability of the booster. The output stage utilizes complementary MOSFETs, providing symmetrical output impedance and eliminating second breakdown limitations imposed by Bipolar Junction Transistors. Although the booster can be configured quite simply, enormous flexibility is provided through the choice of driver amplifier, current limit and supply voltage. This hybrid circuit utilizes a Beryllia (BeO) substrate, thick film resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The PB63 is packaged in Apex Microtechnology’s 12-pin power SIP. The case is electrically isolated. www.apexanalog.com © Apex Microtechnology Inc. All rights reserved Jan 2020 PB63U Rev I PB63 • PB63A TYPICAL CONNECTION Figure 1: Typical Connection 2 PB63U Rev I PB63 • PB63A PINOUT AND DESCRIPTION TABLE Figure 2: External Connections Pin Number Name Description 1 IN_A 2 CC_A 3 OUT_A 4 GAIN_A 5 CL_A The input for channel A. Compensation capacitor connection for channel A. Select value based on Phase Compensation. See applicable section. The output for channel A. Connect this pin to load and to the feedback resistors. Gain resistor pin for channel A. Connect RGAIN_A between GAIN_A and ground. This will specify the gain for the power booster itself, not the composite amplifier. See applicable section. Connect to the current limit resistor. Output current flows into/out of these pins through RCL. The output pin and the load are connected to the other side of RCL. 6 7 +Vs -Vs 8 CL_B 9 GAIN_B 10 OUT_B 11 CC_B 12 IN_B PB63U Rev I The positive supply rail for both channels. The negative supply rail for both channels. Connect to the current limit resistor. Output current flows into/out of these pins through RCL. The output pin and the load are connected to the other side of RCL. Gain resistor pin for channel B. Connect RGAIN_B between GAIN_B and ground. This will specify the gain for the power booster itself, not the composite amplifier. See applicable section. The output for channel B. Connect this pin to load and to the feedback resistors. Compensation capacitor connection for channel B. Select value based on Phase Compensation. See applicable section. The input for channel B. 3 PB63 • PB63A SPECIFICATIONS (PER AMPLIFIER) All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at typical supply voltages and TC = 25°C. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Max Units +Vs to -Vs 200 V Output Current, peak, per channel within SOA IO 2 A Power Dissipation, internal DC 1 PD 90 W Input Voltage, referred to common VIN Supply Voltage, total Min (-VS + 10V) / AV (+VS - 10V) / AV Temperature, pin solder, 10s max. Temperature, junction Temperature Range, storage TJ Operating Temperature Range, case TC 2 V 260 °C 150 °C -55 +125 °C -25 +85 °C 1. Each device in the package is capable of dissipating 45W internally. 2. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. CAUTION The PB63 is constructed from MOSFET devices. ESD handling procedures must be observed. The substrate contains beryllia (BeO). Do not crush, machine or subject to temperatures in excess of 850°C to avoid generating toxic fumes. INPUT Parameter Offset Voltage, initial Offset Voltage vs. Temperature Input Bias Current Input Resistance, DC Input Capacitance Noise DC Power Supply Rejection DC Common Mode Rejection 4 Test Conditions Full temp range Full temp range PB63 PB63A Min Typ Max Min Typ Max -20 ±5 +0.04 ±4 97 3 +20 -10 +10 +50 -25 * * * * * -50 f = 10 kHz 25 87 75 100 78 * * * * * +25 Units mV mV/°C µA MΩ pF nV/√Hz dB dB PB63U Rev I PB63 • PB63A GAIN (EACH CHANNEL) Parameter Open Loop Gain Bandwidth, -3db Power Bandwidth, 100Vp-p Test Conditions PB63 Min f = 10 kHz A V = 5V/V, RL = 50 Ω A V = 5V/V, RL = 50 Ω Typ PB63A Max Min Typ Max Units 83 * dB 1.2 * MHz 1 * MHz PB63 PB63A OUTPUT (EACH CHANNEL) Parameter Test Conditions Voltage Swing IO = 2A Voltage Swing IO = 0.5A Current, peak, source Per Channel RL = 50 Ω, 10VP-P input step, AV = 10V/V Slew Rate Min Typ |Vs| 11V |Vs| 7.5V 950 Max Max Units Min Typ * * V * V |Vs| 6.5V 2 2 * A 1000 * * V/µs Capacitive Load, 25% Overshoot 4VP-P input step, A V = 5V/V, Comp = 10pF 470 * pF Settling Time to 0.1% RL = 50 Ω, 4VP-P input step, AV=5V/V 300 * ns PB63 PB63A POWER SUPPLY Parameter 1 Test Conditions Voltage,± VS Current, quiescent Units Min Typ Max Min Typ Max ±20 ±65 ±75 * * * V 37 46 * * mA Both Channels 1. +VS and −VS denote the positive and negative supply voltages. PB63U Rev I 5 PB63 • PB63A MATCHING SPECIFICATIONS, VS=±75V, TC =25°C UNLESS OTHERWISE NOTED. Parameter Test Conditions PB63 Min Input Offset Voltage Match Gain Match Typ PB63A Max Min Typ Max 5 0.2 2 5 0.2 PB63 PB63A Units mV % THERMAL Parameter Resistance, AC junction to case 1 Resistance, DC junction to case Resistance, junction to air Operating Temperature Range, case Test Conditions Min Full temp range, f ≥ 60 Hz Full temp range, f < 60 Hz Full temp range Typ Max 1.3 2.4 Min Max 1.5 * * °C/W 2.7 * * °C/W 30 -25 25 Units Typ * 85 * * °C/W * °C 1. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz. 6 PB63U Rev I PB63 • PB63A TYPICAL PERFORMANCE GRAPHS Figure 3: Power Derating Figure 4: Pulse Response 60 70 VOUT 40 60 20 50 Volts (V) /ŶƚĞƌŶĂůWŽǁĞƌŝƐƐŝƉĂƟŽŶ͕W;tͿ 80 40 30 0 INPUT -20 20 -40 10 0 -25 0 25 50 75 -60 0 100 200 Case Temperature, TC (°C) 600 800 1000 Time (ns) Figure 5: Output Voltage Swing Figure 6: THD vs. Frequency 8 6 7.5 5 7 4 6.5 6 THD, % Voltage Drop From Supply, VS-VO (V) 400 V S+ 5.5 1 4.5 4 0.01 RLсϭŬё 0.1 Output Current, IO (A) PB63U Rev I RLсϱϬё 2 V S- 5 3 1 0 10k 100k 1M Frequency, F (Hz) 7 PB63 • PB63A Figure 7: Small Signal Closed Loop Gain Figure 8: Small Signal Closed Loop Phase 45 40 AVCL=25 0 Closed Loop Phase, (°) Closed Loop Gain (dB) 30 20 10 0 AVCL=10 AVCL=5 -10 AVCL=3 -20 -30 -45 -90 -135 AVCL=3 -180 AVCL=5 -225 AVCL=10 AVCL=25 -270 -315 -40 1k 10k 100k 1M 10M -360 1k 100M 10k Frequency, F (Hz) 2.0 VS = ±75V 45 1.8 Output Current, A 40 35 30 20 -40 VS = ±50V VS = ±25V -20 0 20 100M Ϭ͘ϯϯё͕/Kн Ϭ͘ϯϯё͕/KͲ 1.6 25 10M Figure 10: Current Limit vs. Temperature 50 Quiescent Current (mA) 1M Frequency, F (Hz) Figure 9: Quiescent Current ϭ͘ϰ Ϭ͘ϲϴё͕/Kн 1.2 Ϭ͘ϲϴё͕/KͲ 1.0 0.8 ϭ͘ϱё͕/KͲ 0.6 40 60 Case Temperature, TC (°C) 8 100k 80 100 Ϭ͘ϰ ͲϰϬ ͲϮϬ ϭ͘ϱё͕/Kн 0 20 ϰϬ 60 80 100 120 Case Temperature, TC (°C) PB63U Rev I PB63 • PB63A Figure 11: Rise and Fall Time vs. Temperature Figure 12: Power Supply Rejection Ratio 75 100 +VS PSRR (dB) 95 70 RISE 80 FALL 75 -VS PSRR (dB) 65 85 PSRR, dB Rise and Fall Time (ns) 90 70 65 60 55 50 60 45 55 50 -40 -20 0 20 40 60 80 40 0.1 100 1 10 100 Frequency, F (Hz) Case Temperature, TC (°C) Figure 13: VOS vs. Temperature Figure 14: Channel Separation -20 6.00 -30 5.00 VOS (mV) 4.00 /ƐŽůĂƟŽŶ;ĚͿ -40 VS = ±20V 3.00 VS = ±75V 2.00 VS = ±50V -60 AV = 3 -70 AV = 10 -90 -20 0 20 40 60 Case Temperature, TC (°C) PB63U Rev I -50 -80 1.00 0.00 -40 AV = 1 80 100 -100 1.0 10 100 1000 Frequency, F (Hz) 9 PB63 • PB63A SAFE OPERATING AREA (SOA) The MOSFET output stage of the PB63 is not limited by second breakdown considerations as in bipolar output stages. Only thermal considerations and current handling capabilities limit the SOA (see Safe Operating Area graph). The output stage is protected against transient flyback by the parasitic body diodes of the output stage MOSFET structure. However, for protection against sustained high energy flyback external fastrecovery diodes must be used. KƵƚƉƵƚƵƌƌĞŶƚ&ƌŽŵнsS ŽƌͲsS;Ϳ Figure 15: SOA (Per Channel) ϭϬ Ϭŵ Ɛ^ ^ƚ ŝŶ ĞĂ ĚLJ ŐůĞ WƵ ^ƚ ^ƚ ůƐĞ Ăƚ ĞĂ Ğ d ĚLJ d ^ƚ C= 25 C =25 Ăƚ °C °C Ğ d C = 85 °C 1 0.1 sZKW>/D/d 0.01 1 10 100 ^ƵƉƉůLJƚŽKƵƚƉƵƚŝīĞƌĞŶƟĂů͕sSͲsO;sͿ 10 PB63U Rev I PB63 • PB63A GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexanalog.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and Evaluation Kits. TYPICAL APPLICATION Figure 16: Typical Application (Inverting Composite Amplifier) COMPOSITE AMPLIFIER CONSIDERATIONS Cascading two amplifiers within a feedback loop has many advantages, but also requires careful consideration of several amplifier and system parameters. The most important of these are gain, stability, slew rate, and output swing of the driver. STABILITY Stability can be maximized by observing the following guidelines: 1. Keep gain-bandwidth product of the driver lower than the closed loop bandwidth of the booster. Use the lowest possible booster gain. 2. Minimize phase shift within the loop. A good compromise is to set total (composite) gain at least a factor of 3 times booster gain. Phase shift within the loop is minimized through use of loop compensation capacitor CF when required. Typical values are 5pF to 33pF. Stability is the most difficult to achieve in a configuration where driver effective gain is unity (i.e.; total gain = booster gain). PB63U Rev I 11 PB63 • PB63A BOOSTER GAIN The gain of each section may be set independently by selecting a value for the gain setting resistor RG according to the relation: GAIN = 1 + 2000 ---------------RG where RG is in ohms. Recommended gain range is A V = 3V/V to A V = 25V/V. SLEW RATE The slew rate of the composite amplifier is equal to the slew rate of the driver times the booster gain, with a maximum value equal to the booster slew rate. OUTPUT SWING The maximum output voltage swing required from the driver op amp is equal to the maximum output swing from the booster divided by the booster gain. The offset voltage of the booster over temperature must be taken into account. Note also that effects of booster gain accuracy should be considered when calculating maximum available driver swing. POWER SUPPLY BYPASSING Bypass capacitors to power supply terminals +VS and –VS must be connected physically close to the pins to prevent local parasitic oscillation in the output stage of the PB63. Use capacitors of at least 10μF for each supply. Bypass the large capacitors with high quality ceramic capacitors (X7R) of 0.1μF or greater. CURRENT LIMIT For proper operation, the current limit resistor (RLIM) must be connected as shown in the typical connection diagram. For optimum reliability the resistor value should be set as high as possible. The value is calculated as follows; with the maximum practical value of 30 ohms. The current limit function can be disabled by shorting the CL pin to the OUT pin. 0.7V R LIM    = ------------------I LIM  A  POWER SUPPLY PROTECTION Unidirectional zener diode transient suppressors are recommended as protection on the supply pins. The zeners clamp transients to voltages within the power supply rating and also clamp power supply reversals to ground. Whether the zeners are used or not, the system power supply should be evaluated for transient performance including power-on overshoot and power-off polarity reversal as well as line regulation. Conditions which can cause open circuits or polarity reversals on either power supply rail should be avoided or protected against. Reversals or opens on the negative supply rail is known to induce input stage failure. Unidirectional transzorbs prevent this, and it is desirable that they be both electrically and physically as close to the amplifier as possible. 12 PB63U Rev I PB63 • PB63A PACKAGE OPTIONS Part Number Apex Package Style Description PB63DP PB63DPA DP DP 12-pin Power Sip 12-pin Power Sip PACKAGE STYLE DP PB63U Rev I 13 PB63 • PB63A NEED TECHNICAL HELP? CONTACT APEX SUPPORT! For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@apexanalog.com. International customers can also request support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you, go to www.apexanalog.com IMPORTANT NOTICE Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right to make changes without further notice to any specifications or products mentioned herein to improve reliability. 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PRODUCTS IN SUCH APPLICATIONS ARE UNDERSTOOD TO BE FULLY AT THE CUSTOMER OR THE CUSTOMER’S RISK. Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be trademarks of their respective holders. 14 PB63U Rev I