VRE3050AS

® VRE3050 VRE3050 duct Innovation From P r oVRE3050 Precision Voltage Reference FEATURES DESCRIPTION The VRE3050 is a low cost, high precision 5 V reference that operates from +10 V. The device features a buried zener for low noise and excellent long term stability. Packaged in an 8-pin SMT, the device is ideal for high resolution data conversion systems. ♦ +5 V Output, ± 0.5 mV (.01%) ♦ Temperature Drift: 0.6 ppm/ºC ♦ Low Noise: 3 μVP-P (0.1Hz-10Hz) ♦ Low Thermal Hysterisis: 1 ppm Typical ♦ ±15mA Output Source and Sink Current ♦ Excellent Line Regulation: 5 ppm/V Typical ♦ Optional Noise Reduction and Voltage Trim ♦ Industry Standard Pinout: 8-pin Surface Mount Package The device provides ultrastable +5 V output with ±0.5 mV (.01%) initial accuracy and a temperature coefficient of 0.6 ppm/°C. This improvement in accuracy is made possible by a unique, patented multipoint laser compensation technique. Significant improvements have been made in other performance parameters as well, including initial accuracy, warm-up drift, line regulation, and long-term stability, making the VRE3050 series the most accurate reference available. APPLICATIONS The VRE3050 is recommended for use as a reference for 14, 16, or 18 bit data converters which require an external precision reference. The device is also ideal for calibrating scale factor on high resolution data converters. The VRE3050 offers superior performance over monolithic references. For enhanced performance, the VRE3050 has an external trim option for users who want less than 0.01% initial error. For ultra low noise applications, an external capacitor can be attached between the noise reduction pin and the ground pin. Figure 1. BLOCK DIAGRAM 8 2 + 6 - R1 R4 R2 5 R3 4 SELECTION GUIDE Model VRE3050A VRE3050B VRE3050C VRE3050J VRE3050K VRE3050L VRE3050DS Initial Error Temp. Coeff. (mV) (ppm/ºC) ±0.5 ±0.8 ±1.0 ±0.5 ±0.8 ±1.0 www.cirrus.com 0.6 1.0 2.0 0.6 1.0 2.0 Temp. Range (ºC) 0ºC to +70ºC 0ºC to +70ºC 0ºC to +70ºC -40ºC to +85ºC -40ºC to +85ºC -40ºC to +85ºC Copyright © Cirrus Logic, Inc. 2010 (All Rights Reserved) 8-pin Surface Mount Package Style GF FEB20101 APEX − VRE3050DSREVG ® VRE3050 Product Innovation From 1. CHARACTERISTICS AND SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Power Supply............................ -0.3V to +40V OUT, TRIM................................. -0.3V to +12V NR............................................... -0.3V to +6V Operating Temp. (A,B,C)............ 0ºC to +70ºC Operating Temp. (J,K,L).......... -40ºC to +85ºC ELECTRICAL SPECIFICATIONS Out Short Circuit to GND Duration (VIN< 12V)............ Continuous Out Short Circuit to GND Duration (VIN< 40V)......................5 sec Out Short Circuit to IN Duration (VIN< 12V)................ Continuous Continuous Power Dissipation (TA = +70ºC)..................... 300mW Storage Temperature.......................................... -65ºC to +150ºC Lead Temperature (soldering,10 sec)............................... +250ºC VPS =+15V, T = +25ºC, RL = 10KΩ Unless Otherwise Noted. Parameter Input Voltage Symbol Conditions Min Typ Max Units VRE3050A/J +36 V +4.9995 +5.0000 +5.0005 VRE3050B/K +4.9992 +5.0000 +5.0008 VRE3050C/L +4.9990 +5.0000 +5.0010 VRE3050A/J 0.3 0.6 VRE3050B/K 0.5 1.0 VRE3050C/L 1.0 2.0 VIN Output Voltage (Note 1) VOUT +8 V Output Voltage Temperature Coefficient (Note 2) TCVOUT Trim Adjustment Range ∆VOUT Figure 3 ±5.0 TON To 0.01% of final value 2.0 µs 0.1Hz < f < 10Hz 3.0 µVp-p 10Hz < f < 1kHz 2.5 Note 4 1 ppm 6 ppm/1000hrs. Turn-On Settling Time Output Noise Voltage en Temperature Hysterisis Long Term Stability Supply Current ∆VOUT/t IIN Load Regualtion (Note 3) ∆VOUT/ ∆IOUT Line Regulation (Note 3) ∆VOUT/ ∆VIN ppm/ºC mV 5.0 3.5 4.0 Sourcing: 0mA ≤ IOUT ≤ 15mA 8 12 Sinking: -15mA ≤ IOUT ≤ 0mA 8 12 8V ≤ VIN ≤ 10V 25 35 10V ≤ VIN ≤ 18V 5 10 µVRMS mA ppm/mA ppm/V NOTES: 1. The specified values are without external trim. 2. The temperature coefficient is determined by the box method. See discussion on temperature performance. 3. Line and load regulation are measured with pulses and do not include voltage changes due to temperature. 4. Hysterisis over the operating temperature range. 2 VRE3050DS ® VRE3050 Product Innovation From 2. TYPICAL PERFORMANCE CURVES VOUT vs. TEMPERATURE 1.00 1.00 1.00 0.75 0.75 0.50 0.50 0.50 0 -0.25 Low Loer wer Limi Lim itt Up per 0.25 0 -0.25 Lo wer -0.50 -0.75 Lim it 0 20 30 40 50 60 -1.00 70 0 20 Temperature (oC) VRE3050A VOUT vs. TEMPERATURE 30 40 50 70 -1.00 2.0 1.0 1.0 1.0 -1.5 -2.0 -50 -25 0 25 Lim it 50 75 100 Up per 0.5 0 -0.5 60 Lo wer Lim it -1.0 -1.5 -2.0 -50 -25 -1.5 -2.0 -50 -25 25 0 50 75 100 Up per Lim it Lo wer Lim it 70 0 0 25 50 75 100 Temperature (oC) VRE3050L QUIESCENT CURRENT VS. TEMP OUTPUT IMPEDIANCE VS. FREQUENCY Quiescent Current (mA) 5.0 4.0 3.0 Output Impediance ( Ω) 8.0 6.0 6.0 4.0 2.0 0 0 5 10 15 20 25 30 35 40 Supply Voltage (V) VRE3050DS 50 -0.5 Temperature (oC) VRE3050K SUPPLY CURRENT VS. SUPPLY VOLTAGE 40 0.5 -1.0 Temperature (oC) VRE3050J 0 Lim it ∆Vout (mV) ∆Vout (mV) Lo wer -1.0 30 VOUT vs. TEMPERATURE 1.5 -0.5 20 VOUT vs. TEMPERATURE 2.0 0 0 Temperature (oC) VRE3050C 1.5 Lim it Lim it Temperature (oC) VRE3050B 1.5 Up per Lo wer 0 2.0 0.5 Lim it -0.25 -0.50 60 Up per 0.25 -0.75 -0.75 -1.00 ∆Vout (mV) Lim it ∆Vout (mV) Uper per LiLim it Upp mit 0.25 -0.50 Supply Current (mA) VOUT vs. TEMPERATURE 0.75 ∆Vout (mV) ∆Vout (mV) VOUT vs. TEMPERATURE -50 0 50 Temperature (oC) 100 Frequency (Hz) 3 ® VRE3050 JUNCTION TEMP. RISE VS. OUTPUT CURRENT 30 20 V cc = 10 V 10 0 0 4 2 6 100 Ripple Rejection (dB) 40 Junction Temperature Rise Above Ambient (oC) Product Innovation From 8 RIPPLE REJECTION Vs. FREQUENCY(CNR=0µF) 0V 90 80 B 70 100 OUTPUT NOISE-VOLTAGE DENSITY vs. FREQUENCY 10k 1 µs/div CHANGE IN OUTPUT VOLTAGE VS. OUTPUT CURRENT 100 CHANGE IN OUTPUT VOLTAGE VS. INPUT VOLTAGE 400 60 40 1k 100 Frequency (Hz) 10k 60 300 50 200 40 Vout (ppm) 80 Vout (µV) Output Noise Density (nV/√Hz) 1k A: Vin, 10V/div B: Vout, 1V/div Frequency (Hz) Output Current (mA) 20 10 +10V A 60 10 10 TURN-ON AND TURN-OFF TRANSIENT RESPONSE 100 0 -100 30 20 10 -200 0 -300 -10 -400 0 2 4 6 8 10 12 14 16 Iout(mA) -20 0 9 10 11 12 13 14 15 16 Vin(V) ∆Vout, 1µV/Div 0.1Hz to 10Hz Noise 1 Sec/Div 4 VRE3050DS ® Product Innovation From VRE3050 3. THEORY OF OPERATION The following discussion refers to the block diagram in Figure 1. A FET current source is used to bias a 6.3 V zener diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninverting input of the operational amplifier which amplifies the voltage to produce a 5 V output. The gain is determined by the resistor networks R3 and R4: G=1 + R4/R3. The 6.3 V zener diode is used because it is the most stable diode over time and temperature. The current source provides a closely regulated zener current, which determines the slope of the references’ voltage vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide temperature ranges. A nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references. This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the slope, a very stable voltage is produced over wide temperature ranges. This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. The proper connection of the VRE3050 series voltage references with the optional trim resistor for initial error and the optional capacitor for noise reduction is shown below. EXTERNAL CONNECTIONS + VIN 2 Optional Noise Reduction Capacitor CN 1µF 8 6 + VOUT VRE3050 4 5 10kΩ Optional Fine Trim Adjustment PIN DESCRIPTION 1, 3, 7 N. C. Internally connected. Do not use 2 VIN Positive power supply input 4 GND Ground 5 TRIM External trim input. Leave open if not used. 6 OUT Voltage reference output 8 NR Noise Reduction 4. BASIC CIRCUIT CONNECTION To achieve the specified performance, pay careful attention to the layout. A low resistance star configuration will reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected to a single point to minimize interconnect resistances. VRE3050DS 5 ® VRE3050 Product Innovation From Figure 3. 10000 Reference TC (ppm/ºC 1000 100 8 BIT 10 10 BIT 12 BIT 1 14 BIT 16 BIT 0.1 18 BIT 0.01 20 BIT 1 10 100 Reference TC vs. ∆T change from 25°C for 1 LSB change 5. TEMPERATURE PERFORMANCE The VRE3050 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient less than 1 ppm/°C makes it possible to not perform a system temperature calibration, a slow and costly process. Of the three TC specification methods (slope, butterfly, and box), the box method is most commonly used. A box is formed by the min/max limits for the nominal output voltage over the operating temperature range. The equation follows: VMAX – VMIN T.C. = x 106 VNOMINAL x (TMAX – TMIN) This method corresponds more accurately to the method of test and provides a closer estimate of actual error than the other methods. The box method guarantees limits for the temperature error but does not specify the exact shape and slope of the device under test. A designer who needs a 14-bit accurate data acquisition system over the industrial temperature range (-40°C to +85°C), will need a voltage reference with a temperature coefficient (TC) of 1 ppm/°C if the reference is allowed to contribute an error equivalent to 1LSB. For 1/2LSB equivalent error from the reference you would need a voltage reference with a temperature coefficient of 0.5 ppm/°C. Figure 4 shows the required reference TC vs. delta T change from 25°C for resolution ranging from 8 bits to 20 bits. 6. THERMAL HYSTERISIS A change in output voltage as a result of a temperature change. When references experience a temperature change and return to the initial temperature, they do not always have the same initial voltage. Thermal hysterisis is difficult to correct and is a major error source in systems that experience temperature changes greater than 25°C. Reference vendors are starting to include this important specification in their datasheets. PIN CONFIGURATION 6 N/C 1 +VIN 2 N/C 3 GND 4 VRE3050 TOP VIEW 8 NOISE REDUCTION 7 N/C 6 VOUT 5 TRIM VRE3050DS