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APE12716

APE12716

  • 厂商:

    APLUS

  • 封装:

  • 描述:

    APE12716 - very low cost voice and melody synthesizer with 4-bits CPU - Aplus Intergrated Circuits

  • 数据手册
  • 价格&库存
APE12716 数据手册
A PLUS MAKE YOUR PRODUCTION A-PLUS APExx16 Series DATA SHEET APLUS INTEGRATED CIRCUITS INC. Sales E-mail: sales@aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115)台北市南港區成功路㆒段 32 號 3 樓之 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw APExx16 Series 1.0 General Description The APExx16 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices. With CMOS technology and halt function can minimize power dissipation. Their architectures are similar to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles). 2.0 Features (1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz. (2) Program ROM: 16k x 10 bits ( APE8416 /APE10616 /APE12716 are 64k x 10 bits ) (3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 19-bits VPR can access up to 512k x 10 bits voice data memory space. Product APE1016 APE1516 APE2016 APE3116 APE4116 APE6316 APE8416 APE10616 APE12716 (4) Data Registers: a). 128 x 4-bits data RAM (00-7Fh) b). Unbanked special function registers (SFR) range: 00h-2Fh (5) I/O Ports: a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control) b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option) c). PRC: 4-bits I/O Port C (14h) can be programmed to input/output individually. (Register control) d). PRD: 4-bits I/O Port D (15h) can be programmed to input/output individually. (Register control) (6) On-chip clock generator: Resistive Clock Drive (RM) or Crystal oscillator (HM) (7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter). (8) Stack: 2-level subroutine nesting. (9) Built-in 4 Level Volume Control can be programmed. 1 Rev 1.1 2003/9/2 Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bits) 10 15 20 31 41 63 84 106 127 15-bits 16-bits 16-bits 17-bits 17-bits 18-bits 18-bits 19-bits 19-bits 32k 48k 64k 96k 128k 192k 256k 320k 384k APExx16 Series (10) Built-in 8 Level DAC current output can be configured. (Mask option) (11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option) (12) External Reset: Port B[3] can be configured as reset pin. (Mask opton) (13) HALT and Release from HALT function to reduce power consumption (14) Watch Dog Timer (WDT) (15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles (16) Number of instruction: 27 (17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output). FIGURE 1 : ROM Map of APExx16 Series PC[13:0] 14-bit x 2 STACK 16-bit Data Pointer 19-bit Voice Pointer Reset Vector 00000h 000FEh 000FFh-00400h 00401h Reserved for Testing 00000h-03FFFh 00000h-0FFFFh Data ROM for Melody Program ROM 00000h-7FFFFh Voice ROM for Voice * APE8416 /APE10616 /APE12716 are 64k x 10 bits 2 Rev 1.1 2003/9/2 APExx16 Series 3.0 Pin Description Pad Name PWM2/Cout PWM1 Vdd1~3 PRA0~3 PRC0~3 PRD0~3 PRB0 / OSC2 Pin Attr. O O Power I/O Description PWM2 output, or Current Output of Audio. PWM1 output. Power supply during operation. I/O port can be programmed to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. I/O port can be configured to input/output individually or HM OSC pad. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. I/O port can be configured to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. Mask option selected as an IR Carrier Output with 38k / 56kHz I/O port can be configured to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. I/O port can be configured to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. Mask option selected as an external RESET pin with weak pull-low capability. RM/HM mode Oscillator input Ground Potential I/O PRB1 / IR I/O PRB2 I/O PRB3 / Reset I/O OSC1 GND1~4 I Power 4.0 DC Characteristics Symbol Vdd Isb Iop Iih Ioh Iol Cout dF/F dF/F Parameter Operating voltage Supply current Standby Operating Vdd 3 4.5 3 4.5 3 4.5 3 4.5 3 4.5 3 4.5 -5 -10 Min. 2.4 Typ. 3 Max. 5.5 1 1 Unit V uA mA uA Condition depending on Freq. 4MHz, RM, in HALT Mode 4MHz, RM, IO Floating Input ports with weak pull-low 4MHz, RM (IO ports) 4MHz, RM (Full scale) Fosc(3v- 2.4v) Fosc (3v) Vdd=3V, Rosc=180k, 4MHz Input current (Internal pull low) Output-high current Output-low current DAC output current (8-level option) Frequency stability Fosc lot variation 2 7 3 10 -3 -10 7 19 0.8 ~ 4.8 0.9 ~ 6.5 5 10 mA mA % % 3 Rev 1.1 2003/9/2 APExx16 Series FIGURE 2 : Frequency vs. Rosc (at 3V) Resistor (Rosc ohms) Frequency (MHz) 110k 14.84 200k 8.25 300k 5.54 430k 3.92 R o sc vs F re q. 20 Freq. (MHz) 15 10 5 0 0 100 1 4 .8 4 8 .25 5 .54 3 .92 200 300 400 500 R os c (k o h m ) 5.0 Application Circuit 4 Rev 1.1 2003/9/2 APExx16 Series 6.0 Bonding Diagram of APE1016 /APE1516 /APE2016 GND1 PRD0 PRD1 25 24 23 22 21 20 19 18 17 ROM PRD2 PRD3 PRC0 PRC1 Chip Size : 1432 um x 1650 um PRC2 Pad Size : 80 um x 80 um 1 Vdd3 * The IC substrate must be connected to GND. PRC3 PRB0 16 Y 2 PWM2/Cout OSC1 15 GND2 3 Vdd2 PWM1 4 (0,0) GND3 5 PRA3 6 PRA2 7 PRA1 8 PRA0 9 PRB3 PRB2 10 11 PRB1 12 14 Vdd1 13 X Pad # 1 2 3 4 5 6 7 8 9 10 11 12 13 Pad Name Vdd3 PWM2/Cout Vdd2 PWM1 GND3 PRA3 PRA2 PRA1 PRA0 PRB3/Reset PRB2 PRB1/IR Vdd1 X 56 58 58 145 293 413 533 653 773 893 1013 1133 1253 Y 647 466 182 58 58 87 87 87 87 87 87 87 87 Pad # 14 15 16 17 18 19 20 21 22 23 24 25 Pad Name GND2 OSC1 PRB0/OSC2 PRC3 PRC2 PRC1 PRC0 PRD3 PRD2 PRD1 PRD0 GND1 X 1261 1261 1261 1261 1261 1261 1261 1261 1261 1261 1261 1261 Y 235 350 465 580 695 810 925 1040 1155 1270 1385 1500 5 Rev 1.1 2003/9/2 APExx16 Series 6.1 Bonding Diagram of APE3116 /APE4116 /APE6316 GND1 25 PRD0 24 PRD1 23 ROM PRD2 22 PRD3 21 20 PRC0 PRC1 19 PRC2 18 Chip Size : 1408 um x 2556 um Pad Size : 80 um x 80 um * The IC substrate must be connected to GND. Y 1 Vdd3 PRC3 17 PRB0 16 OSC1 15 2 PWM2/Cout PRB1 14 GND2 3 Vdd2 PWM1 4 (0,0) GND3 5 PRA3 6 PRA2 7 PRA1 8 PRA0 9 PRB3 PRB2 10 11 13 Vdd1 12 X Pad # 1 2 3 4 5 6 7 8 9 10 11 12 13 Pad Name Vdd3 PWM2/Cout Vdd2 PWM1 GND3 PRA3 PRA2 PRA1 PRA0 PRB3/Reset PRB2 Vdd1 GND2 X 56 58 58 145 293 430 563 696 829 962 1095 1228 1248 Y 647 466 182 58 58 87 87 87 87 87 87 87 272 6 Pad # 14 15 16 17 18 19 20 21 22 23 24 25 Pad Name PRB1/IR OSC1 PRB0/OSC2 PRC3 PRC2 PRC1 PRC0 PRD3 PRD2 PRD1 PRD0 GND1 X 1248 1248 1248 1248 1248 1248 1248 1248 1248 1248 1248 1248 Y 405 570 733 896 1056 1218 1379 1540 1700 1861 2022 2310 Rev 1.1 2003/9/2 APExx16 Series 6.2 Bonding Diagram of APE8416 /APE10616 /APE12716 25 PRB3 23 PRC2 22 PRC1 21 PRC0 18 PRD1 17 PRD0 26 Vdd1 24 PRC3 20 PRD3 19 PRD2 16 GND1 ROM Chip Size : 2288 um x 2364 um Y Pad Size : 80 um x 80 um * The IC substrate must be connected to GND. 1 2 3 GND4 GND3 GND2 15 PWM1 Vdd3 4 Vdd2 PWM2/Cout 6 5 7 8 9 10 11 12 13 14 OSC1 PRB0 PRB1 PRB2 PRA0 PRA1 PRA2 PRA3 (0,0) X Pad # 1 2 3 4 5 6 7 8 9 10 11 12 13 Pad Name GND4 GND3 PWM1 Vdd3 PWM2/Cout Vdd2 OSC1 PRB0/OSC2 PRB1/IR PRB2 PRA0 PRA1 PRA2 X 76 59 59 183 467 815 976 1140 1304 1465 1626 1787 1948 Y 404 294 146 59 59 76 76 76 76 76 76 76 76 Pad # 14 15 16 17 18 19 20 21 22 23 24 25 26 Pad Name PRA3 GND2 GND1 PRD0 PRD1 PRD2 PRD3 PRC0 PRC1 PRC2 PRC3 PRB3/Reset Vdd1 X 2109 2128 1927 1765 1603 1441 1279 1117 955 739 631 469 307 Y 76 212 2204 2204 2204 2204 2204 2204 2204 2204 2204 2204 2204 7 Rev 1.1 2003/9/2
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