AT27C020-55JI

Features • Fast Read Access Time – 55 ns • Low-power CMOS Operation – 100 µA Max Standby – 25 mA Max Active at 5 MHz JEDEC Standard Packages – 32-lead PDIP – 32-lead PLCC – 32-lead TSOP 5V ± 10% Supply High-reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latch-up Immunity Rapid Programming Algorithm – 100 µs/Byte (Typical) CMOS- and TTL-compatible Inputs and Outputs Integrated Product Identification Code Industrial and Automotive Temperature Ranges Green (Pb/Halide-free) Packaging Option • • • • • • • • 2-megabit (256K x 8) OTP EPROM AT27C020 1. Description The AT27C020 is a low-power, high-performance, 2,097,152-bit, one-time programmable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states on highperformance microprocessor systems. In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current is typically less than 10 µA. The AT27C020 is available in a choice of industry-standard JEDEC-approved onetime programmable (OTP) plastic PDIP, PLCC and TSOP packages. All devices feature two-line control (CE , OE ) to give designers the flexibility to prevent bus contention. With 256K bytes storage capability, the AT27C020 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s AT27C020 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages. 0570G–EPROM–12/07 2. Pin Configurations Pin Name A0 - A17 O0 - O7 CE OE PGM Function Addresses Outputs Chip Enable Output Enable Program Strobe 2.1 32-lead PLCC Top View 2.3 32-lead TSOP (Type 1) Top View A12 A15 A16 VPP VCC PGM A17 2.2 32-lead PDIP Top View VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 01 02 GND 03 04 05 06 14 15 16 17 18 19 20 A7 A6 A5 A4 A3 A2 A1 A0 O0 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 A14 A13 A8 A9 A11 OE A10 CE 07 A11 A9 A8 A13 A14 A17 PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE 07 06 05 04 03 GND 02 01 O0 A0 A1 A2 A3 4 3 2 1 32 31 30 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM A17 A14 A13 A8 A9 A11 OE A10 CE 07 06 05 04 03 2 AT27C020 0570G–EPROM–12/07 AT27C020 3. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF highfrequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply-voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 4. Block Diagram 5. Absolute Maximum Ratings* Temperature under Bias ................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ......................................-2.0V to +14.0V(1) VPP Supply Voltage with Respect to Ground .......................................-2.0V to +14.0V(1) Note: 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20 ns. *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3 0570G–EPROM–12/07 6. Operating Modes Mode/Pin Read Output Disable Standby Rapid Program(2) PGM Verify PGM Inhibit Product Identification(4) Notes: 1. X can be VIL or VIH. 2. Refer to Programming Characteristics. 3. VH = 12.0 ± 0.5V. 4. Two identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH and A0, which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. CE VIL X VIH VIL VIL VIH VIL OE VIL VIH X VIH VIL X VIL PGM X(1) X X VIL VIH X X Ai Ai X X Ai Ai X A9 = A0 = VIH or VIL A1 - A17 = VIL VH(3) VPP X X X VPP VPP VPP X Outputs DOUT High-Z High-Z DIN DOUT High-Z Identification Code 7. DC and AC Operating Conditions for Read Operation AT27C020 -55 Ind. Operating Temperature (Case) Auto. VCC Power Supply 5V ± 10% -40° C - 85° C -90 -40° C - 85° C -40° C - 125° C 5V ± 10% 8. DC and Operating Characteristics for Read Operation Symbol ILI ILO IPP(2) ISB ICC VIL VIH VOL VOH Notes: Parameter Input Load Current Output Leakage Current VPP(1) Read/Standby Current VCC(1) Standby Current VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 2.1 mA IOH = -400 µA 2.4 Condition VIN = 0V to VCC (Com., Ind.) VOUT = 0V to VCC (Com., Ind.) VPP = VCC ISB1 (CMOS), CE = VCC ± 0.3V ISB2 (TTL), CE = 2.0 to VCC + 0.5V f = 5 MHz, IOUT = 0 mA, CE = VIL -0.6 2.0 Min Max ±1.0 ±5.0 ±10 100 1.0 25 0.8 VCC + 0.5 0.4 Units µA µA µA µA mA mA V V V V 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP. 4 AT27C020 0570G–EPROM–12/07 AT27C020 9. AC Characteristics for Read Operation AT27C020 -55 Symbol tACC(3) tCE(2) tOE(2)(3) tDF(4)(5) tOH Parameter Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, Whichever Occurred First Output Hold from Address, CE or OE, Whichever Occurred First 7 Condition CE = OE = VIL OE = VIL CE = VIL Min Max 55 55 20 18 0 Min -90 Max 90 90 35 20 Units ns ns ns ns ns 10. AC Waveforms for Read Operation(1) Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. 5 0570G–EPROM–12/07 11. Input Test Waveforms and Measurement Levels For -55 devices only: 3.0V AC DRIVING LEVELS 0.0V 1.5V AC MEASUREMENT LEVEL tR, tF < 5 ns (10% to 90%) For -90 devices only: tR, tF < 20 ns (10% to 90%) 12. Output Test Load Note: CL = 100 pF including jig capacitance except -55 devices, where CL = 30 pF. 13. Pin Capacitance f = 1 MHz, T = 25° C(1) Symbol CIN COUT Note: Typ 4 8 Max 8 12 Units pF pF Conditions VIN = 0V VOUT = 0V 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 6 AT27C020 0570G–EPROM–12/07 AT27C020 14. Programming Waveforms (1) Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients. 7 0570G–EPROM–12/07 15. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol ILI VIL VIH VOL VOH ICC2 IPP2 VID Parameter Input Load Current Input Low Level Input High Level Output Low Voltage Output High Voltage VCC Supply Current (Program and Verify) VPP Supply Current A9 Product Identification Voltage CE = PGM = VIL 11.5 IOL = 2.1 mA IOH = -400 µA 2.4 40 20 12.5 Test Conditions VIN = VIL, VIH -0.6 2.0 Min Max ±10 0.8 VCC + 1.0 0.4 Units µA V V V V mA mA V 16. AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V,VPP = 13.0 ± 0.25V Limits Symbol tAS tCES tOES tDS tAH tDH tDFP tVPS tVCS tPW tOE tPRT Notes: Parameter Address Setup Time CE Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay VPP Setup Time VCC Setup Time PGM Program Pulse Width Data Valid from OE VPP Pulse Rise Time During Programming (3) (2) Test Condition (1) Min 2 2 Max Units µs µs µs µs µs µs Input Rise and Fall Times: (10% to 90%) 20 ns Input Pulse Levels: 0.45V to 2.4V Input Timing Reference Level: 0.8V to 2.0V Output Timing Reference Level: 0.8V to 2.0V 2 2 0 2 0 2 2 95 105 150 50 130 ns µs µs µs ns ns 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven – see timing diagram. 3. Program Pulse width tolerance is 100 µs ± 5%. 17. Atmel’s AT27C020 Integrated Product Identification Code Pins Codes Manufacturer Device Type A0 0 1 O7 0 1 O6 0 0 O5 0 0 O4 1 0 O3 1 0 O2 1 1 O1 1 1 O0 0 0 Hex Data 1E 86 8 AT27C020 0570G–EPROM–12/07 AT27C020 18. Rapid Programming Algorithm A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. 9 0570G–EPROM–12/07 19. Ordering Information 19.1 Standard Package ICC (mA) Active 25 Standby 0.1 Ordering Code AT27C020-55JI AT27C020-55PI AT27C020-55TI AT27C020-90JI AT27C020-90PI AT27C020-90TI AT27C020-90JA AT27C020-90PA Package 32J 32P6 32T 32J 32P6 32T 32J 32P6 Operation Range Industrial (-40° C to 85° C) Industrial (-40° C to 85° C) Automotive (-40° C to 125° C) tACC (ns) 55 90 25 0.1 25 0.1 Note: Not recommended for new designs. Use Green package option. 19.2 Green Package (Pb/Halide-free) ICC (mA) Active 25 Standby 0.1 Ordering Code AT27C020-55JU AT27C020-55PU AT27C020-55TU AT27C020-90JU AT27C020-90PU AT27C020-90TU Package 32J 32P6 32T 32J 32P6 32T Operation Range Industrial (-40° C to 85° C) Industrial (-40° C to 85° C) tACC (ns) 55 90 25 0.1 Package Type 32J 32P6 32T 32-lead, Plastic J-leaded Chip Carrier (PLCC) 32-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32-lead, Plastic Thin Small Outline Package (TSOP) 10 AT27C020 0570G–EPROM–12/07 AT27C020 20. Packaging Information 20.1 32J – PLCC 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER 1.14(0.045) X 45˚ 0.318(0.0125) 0.191(0.0075) E1 B E B1 E2 e D1 D A A2 A1 0.51(0.020)MAX 45˚ MAX (3X) COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL D2 MIN 3.175 1.524 0.381 12.319 11.354 9.906 14.859 13.894 12.471 0.660 0.330 NOM – – – – – – – – – – – 1.270 TYP MAX 3.556 2.413 – 12.573 11.506 10.922 15.113 14.046 13.487 0.813 0.533 NOTE A A1 A2 D D1 D2 Note 2 Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. E E1 E2 B B1 e Note 2 10/04/01 2325 Orchard Parkway San Jose, CA 95131 TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING NO. 32J REV. B R 11 0570G–EPROM–12/07 20.2 32P6 – PDIP D PIN 1 E1 A SEATING PLANE L B1 e E B A1 C eB 0º ~ 15º REF SYMBOL A A1 D E E1 B COMMON DIMENSIONS (Unit of Measure = mm) MIN – 0.381 41.783 15.240 13.462 0.356 1.041 3.048 0.203 15.494 NOM – – – – – – – – – – 2.540 TYP MAX 4.826 – 42.291 15.875 13.970 0.559 1.651 3.556 0.381 17.526 Note 1 Note 1 NOTE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). B1 L C eB e 09/28/01 2325 Orchard Parkway San Jose, CA 95131 TITLE 32P6, 32-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) DRAWING NO. 32P6 REV. B R 12 AT27C020 0570G–EPROM–12/07 AT27C020 20.3 32T – TSOP PIN 1 0º ~ 8º c Pin 1 Identifier D1 D L e b L1 E A2 A SEATING PLANE GAGE PLANE A1 SYMBOL A A1 A2 Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. D D1 E L L1 b c e COMMON DIMENSIONS (Unit of Measure = mm) MIN – 0.05 0.95 19.80 18.30 7.90 0.50 NOM – – 1.00 20.00 18.40 8.00 0.60 0.25 BASIC 0.17 0.10 0.22 – 0.50 BASIC 0.27 0.21 MAX 1.20 0.15 1.05 20.20 18.50 8.10 0.70 Note 2 Note 2 NOTE 10/18/01 2325 Orchard Parkway San Jose, CA 95131 TITLE 32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline Package, Type I (TSOP) DRAWING NO. 32T REV. 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