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AT60142HT-DD17M-E

AT60142HT-DD17M-E

  • 厂商:

    ATMEL(爱特梅尔)

  • 封装:

  • 描述:

    AT60142HT-DD17M-E - Rad Hard 512K x 8 5V Tolerant Very Low Power CMOS SRAM - ATMEL Corporation

  • 数据手册
  • 价格&库存
AT60142HT-DD17M-E 数据手册
Features • Operating Voltage: 3.3V, 5V tolerant • Access Time: • • • • • • • • • • – 17 ns – 15 ns Very Low Power Consumption – Active: 610 mW (Max) @ 17 ns(1), 540 mW (Max) @ 25 ns – Standby: 3.3 mW (Typ) Wide Temperature Range: -55 to +125°C TTL-Compatible Inputs and Outputs Asynchronous Designed on 0.25 µm Radiation Hardened Process No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm2@125°C Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019 500 Mils Wide FP36 Package ESD better than 2000V Quality Grades: – QML-Q or V – ESCC 1. 650 mW (Max) @ 15 ns Note: Rad Hard 512K x 8 5V Tolerant Very Low Power CMOS SRAM AT60142HT Description The AT60142HT is a very low power CMOS static RAM organized as 512K x 8 bits. Atmel brings the solution to applications where fast computing is as mandatory as low consumption, such as aerospace electronics, portable instruments, or embarked systems. Utilizing an array of six transistors (6T) memory cells, the AT60142HT combines an extremely low standby supply current (Typical value = 1 mA) with a fast access time at 15 ns over the full military temperature range. The high stability of the 6T cell provides excellent protection against soft errors due to noise. The AT60142HT is processed according to the methods of the latest revision of the MIL PRF 38535 or ESCC 9000. It is produced on a radiation hardened 0.25 µm CMOS process. 7841A–AERO–10/09 1 AT60142HT Block Diagram Pin Configuration A0 A1 A2 A3 A4 CS I/O1 I/O2 Vcc GND I/O3 I/O4 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A18 A17 A16 A15 OE I/O8 I/O7 GND Vcc I/O6 I/O5 A14 A13 A12 A11 A10 NC Note: NC pins are not bonded internally. So, they can be connected to GND or Vcc. 36 - pin -Flatpack - 500 Mils 2 7841A–AERO–10/09 Pin Description Table 1. Pin Names Name A0 - A18 I/O1 - I/O8 CS WE OE Vcc GND Description Address Inputs Data Input/Output Chip Select Write Enable Output Enable Power Supply Ground Table 2. Truth Table(1) CS H L L L Note: WE X H L H OE X L X H Inputs/Outputs Z Data Out Data In Z Mode Deselect / Power-down Read Write Output Disable 1. L=low, H=high, X= L or H, Z=high impedance. 3 AT60142HT 7841A–AERO–10/09 AT60142HT Electrical Characteristics Absolute Maximum Ratings* Supply Voltage to GND Potential: ....................... -0.5V + 4.6V Voltage range on any input: ...................... GND -0.5V to 7.0V Voltage range on any ouput: ..................... GND -0.5V to 4.6V Storage Temperature: ................................. -65°C to + 150°C Output Current from Output Pins: ................................ 20 mA Electro Statics Discharge Voltage: ............................ > 2000V (MIL STD 883D Method 3015) *NOTE: Stresses beyond those listed under "Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure between recommended DC operating and absolute maximum rating conditions for extended periods may affect device reliability. Military Operating Range Operating Voltage 3.3 + 0.3V Operating Temperature -55⋅C to + 125⋅C Recommended DC Operating Conditions Parameter Vcc GND VIL VIH Note: Description Supply voltage Ground Input low voltage Input high voltage 1. 5.8V in transient conditions. Min 3.0 0.0 GND - 0.3 2.2 Typ 3.3 0.0 0.0 – Max 3.6 0.0 0.8 5.5(1) Unit V V V V Capacitance Parameter Cin(1) Cout(1) Note: Description Input capacitance Output capacitance Min – – Typ – – Max 12 12 Unit pF pF 1. Guaranteed but not tested. 4 7841A–AERO–10/09 DC Parameters DC Test Conditions TA = -55°C to + 125°C; Vss = 0V; VCC = 3.0V to 3.6V Parameter IIX (1) IOZ(1) IIH(2) at 5.5V IOZH(2) at 5.5V VOL(3) VOH(4) 1. Description Input leakage current Output leakage current Input Leakage Current Output Leakage Current Output low voltage Output high voltage Minimum -1 -1 – – – 2.4 Typical – – – – – – Maximum 1 1 2 1.5 0.4 – Unit μA μA μA μA V V GND < VIN < VCC, GND < VOUT < VCC Output Disabled. 2. 3. 4. VIN = 5.5V, VOUT = 5.5V, Output Disabled. VCC min. IOL = 6 mA VCC min. IOH = -4 mA. Consumption Symbol ICCSB (1) ICCSB1 (2) Description Standby Supply Current Standby Supply Current TAVAV/TAVAW Test Condition – – 15 ns 17 ns 25 ns 50 ns 1 µs 15 ns 17 ns 25 ns 50 ns 1 µs AT60142HT-17 2.5 2 170 150 75 10 145 130 120 100 AT60142HT-15 2.5 2 180 170 150 75 10 150 145 130 120 100 Unit mA mA Value max max ICCOP(3) Read Dynamic Operating Current mA max ICCOP(4) Write Dynamic Operating Current mA max 1. 2. 3. 4. CS >VIH CS > VCC - 0.3V F = 1/TAVAV, Iout = 0 mA, WE = OE = VIH, VIN = GND/VCC, VCC max. F = 1/TAVAW, Iout = 0 mA, WE = VIL, OE = VIH , VIN = GND/VCC, VCC max. 5 AT60142HT 7841A–AERO–10/09 AT60142HT Data Retention Mode Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules insure data retention: 1. During data retention chip select CS must be held high within VCC to VCC -0.2V. 2. Output Enable (OE) should be held high to keep the RAM outputs high impedance, minimizing power dissipation. 3. During power-up and power-down transitions CS and OE must be kept between VCC + 0.3V and 70% of VCC. 4. The RAM can begin operation > tR ns after VCC reaches the minimum operation voltages (3V). Figure 1. Data Retention Timing Data Retention Characteristics Typ TA = 25⋅C – – (1) Parameter Description VCCDR tCDR tR VCC for data retention Chip deselect to data retention time Operation recovery time Min 2.0 0.0 tAVAV Max – – – 1.5 (AT60142HT-15) 1.5 (AT60142HT-17) Unit V ns ns – ICCDR (2) Data retention current – 0.700 mA 1. 2. TAVAV = Read cycle time. CS = VCC, VIN = GND/VCC. 6 7841A–AERO–10/09 AC Characteristics Temperature Range:.................................................................................... -55 +125°C Supply Voltage:............................................................................................... 3.3 +0.3V Input Pulse Levels: .................................................................................... GND to 3.0V Input Rise and Fall Times:......................................................................3ns (10 - 90%) Input and Output Timing Reference Levels: ........................................................... 1.5V Output Loading IOL/IOH:..............................................................................See Figure 2 Figure 2. AC Test Loads Waveforms Write Cycle Symbol TAVAW TAVWL TAVWH TDVWH TELWH TWLQZ TWLWH TWHAX TWHDX TWHQX Parameter Write cycle time Address set-up time Address valid to end of write Data set-up time CS low to write end Write low to high Z Write pulse width Address hold from end of write Data hold time Write high to low Z (1) (1) AT60142HT-17 AT60142HT-15 17 0 8 7 12 7 8 0 0 3 15 0 8 7 10 6 8 0 0 3 Unit ns ns ns ns ns ns ns ns ns ns Value min min min min min max min min min min Notes: 1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.) 7 AT60142HT 7841A–AERO–10/09 AT60142HT Write Cycle 1. WE Controlled, OE High During Write E Write Cycle 2. WE Controlled, OE Low E Write Cycle 3. CS Controlled E Note: The internal write time of the memory is defined by the overlap of CS Low and W LOW. Both signals must be activated to initiate a write and either signal can terminate a write by going in active mode. The data input setup and hold timing should be referenced to the active edge of the signal that terminates the write. Data out is high impedance if OE= VIH. 8 7841A–AERO–10/09 Read Cycle Symbol TAVAV TAVQV TAVQX TELQV TELQX TEHQZ TGLQV TGLQX TGHQZ Note: Parameter Read cycle time Address access time Address valid to low Z Chip-select access time CS low to low Z(1) CS high to high Z(1) Output Enable access time OE low to low Z(1) OE high to high Z (1) AT60142HT-17 17 17 5 17 5 7 8 2 6 AT60142HT-15 15 15 5 15 5 6 6 2 5 Unit ns ns ns ns ns ns ns ns ns Value min max min max min max max min max 1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.) Read Cycle nb 1 Address Controlled (CS = OE = VIL, WE = VIH) Read Cycle nb 2 Chip Select Controlled (WE = VIH) 9 AT60142HT 7841A–AERO–10/09 AT60142HT Ordering Information Part Number AT60142HT-DS17M-E AT60142HT-DS17MMQ (2) Temperature Range 25°C -55° to +125°C -55° to +125°C -55° to +125°C -55° to +125°C 25⋅C -55⋅ to +125⋅C 25°C -55° to +125°C -55° to +125°C -55° to +125°C -55° to +125°C 25⋅C -55⋅ to +125⋅C Speed 17 ns/5V tol. 17 ns/5V tol. 17 ns/5V tol. 17 ns/5V tol. 17 ns/5V tol. 17 ns/5V tol. 17 ns/5V tol. 15 ns/5V tol. 15 ns/5V tol. 15 ns/5V tol. 15 ns/5V tol. 15 ns/5V tol. 15 ns/5V tol. 15 ns/5V tol. Package FP36.5 grounded lid FP36.5 grounded lid FP36.5 grounded lid FP36.5 grounded lid FP36.5 grounded lid Die Die FP36.5 grounded lid FP36.5 grounded lid FP36.5 grounded lid FP36.5 grounded lid FP36.5 grounded lid Die Die Flow Engineering Samples Mil Level B Space Level B Space Level B RHA ESCC Engineering Samples Space Level B Engineering Samples Mil Level B Space Level B Space Level B RHA ESCC Engineering Samples Space Level B AT60142HT-DS17MSV(2) AT60142HT-DS17MSR(2) AT60142HT-DS17ESCC AT60142HT-DD17M-E (1) (3) AT60142HT-DD17MSV(1) AT60142HT-DS15M-E(1) AT60142HT-DS15MMQ (1) (2) AT60142HT-DS15MSV(1) (2) AT60142HT-DS15MSR(1) (2) AT60142HT-DS15ESCC AT60142HT-DD15M-E Note: (1) (3) AT60142HT-DD15MSV(1) 1. Contact Atmel for availability. 2. Will be replaced by SMD part number when available. 3. Will be replaced by ESCC part number when available. 10 7841A–AERO–10/09 Package Drawing 36-lead Flat Pack (500 Mils) Document Revision History Creation from AT60142FT with the following changes : • • Package DC removed Update of parameters ICCSB, ICCSB1, ICCDR 11 AT60142HT 7841A–AERO–10/09 Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Product Contact Web Site www.atmel.com Technical Support Enter Product Line E-mail Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Disclaimer: T he information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. ©2009 Atmel Corporation. A ll rights reserved. A tmel ® a nd combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper. 7841A–AERO–10/09 /xM
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