AT88SC0808CA-SH

A tmel AT88SC0808CA Atmel CryptoMemory SUMMARY DATASHEET Features • • One of a family of devices with user memories from 1Kbit to 8Kbits 8Kbit (1Kbyte) EEPROM user memory • • • • Eight 1Kbit (128-byte) zones Self-timed write cycle Single byte or 16-byte page write mode Programmable access rights for each zone • • 2Kbit configuration zone • 37-byte OTP (One-Time Programmable) area for user-defined codes • 160-byte area for user-defined keys and passwords High security features • • • • • • • 64-bit mutual authentication protocol (under license of ELVA) Cryptographic Message Authentication Codes (MAC) Stream encryption Four key sets for authentication and encryption Eight sets of two 24-bit passwords Anti-tearing function Voltage and frequency monitors ISO 7816 Class B (3V) operation ISO 7816-3 asynchronous T=0 Protocol (Gemplus® Patent) * Multiple zones, key sets and passwords for multi-application use Synchronous two-wire serial interface for faster device initialization * Programmable 8-byte answer-to-reset register (ATR) ISO 7816-2 compliant modules Low voltage supply: 2.7V – 3.6V Secure nonvolatile storage for sensitive system or user information Two-wire serial interface (TWI, 5V compatible) 1.0MHz compatibility for fast operation Standard 8-lead plastic packages, green compliant (exceeds RoHS) Same pin configuration as Atmel® AT24CXXX Serial EEPROM in SOIC and PDIP packages • Smart card features • • • • • • • Embedded application features • • • • • • • High reliability This is a summary document. The complete document is available on the Atmel website at www.atmel.com. • Endurance: 100,000 cycles • Data retention: 10 years • ESD protection: 2,000V min * Note: Modules available with either T=0 / 2-wire modes or 2-wire mode only 5 204FS − CRYPTO − 12/11 Table 1. Pad VCC GND SCL/CLK SDA/IO RST Pin Assignments Description Supply Voltage Ground Serial Clock Input Serial Data Input/Output Reset Input ISO Module C1 C5 C3 C7 C2 TWI Module C1 C5 C3 C7 NC “SOIC, PDIP” 8 4 6 5 NC TSSOP 8 1 6 3 NC Mini-MAP 4 5 2 7 NC Figure 1. Pin Configuration ISO Smart Card Module VCC=C1 RST=C2 SCL/CLK=C3 NC=C4 C5=GND C6=NC C7=SDA/IO C8=NC 8-lead SOIC, PDIP NC NC NC GND 1 2 3 4 8 7 6 5 VCC NC SCL SDA 8-lead TSSOP GND NC SDA NC 1 2 3 4 8 7 6 5 VCC NC C LK NC 8-lead Ultra Thin Mini-MAP (MLP 2x3) 8 SDA 7 NC 6 GND 5 NC 1 2 3 4 NC CLK NC VCC Bottom View TWI Smart Card Module VCC=C1 NC=C2 SCL/CLK=C3 NC=C4 C5=GND C6=NC C7=SDA/IO C8=NC Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 2 1. Description The Atmel AT88SC0808CA member of the Atmel CryptoMemory® family is a high-performance secure memory providing 8Kbit of user memory with advanced security and cryptographic features built in. The user memory is divided into eight 128-byte zones, each of which may be individually set with different security access rights or effectively combined together to provide space for one to eight data files. The AT88SC0808CA features an enhanced command set that allows direct communication with microcontroller hardware two-wire interface thereby allowing for faster firmware development with reduced code space requirements. 1.1 Smart Card Applications The AT88SC0808CA provides high security, low cost, and ease of implementation without the need for a microprocessor operating system. The embedded cryptographic engine provides for dynamic, symmetric-mutual authentication between the device and host, as well as performing stream encryption for all data and passwords exchanged between the device and host. Up to four unique key sets may be used for these operations. The AT88SC0808CA offers the ability to communicate with virtually any smart card reader using the asynchronous T = 0 protocol (Gemplus Patent) defined in ISO 7816-3. 1.2 Embedded Applications Through dynamic, symmetric-mutual authentication, data encryption, and the use of cryptographic Message Authentication Codes (MAC), the AT88SC0808CA provides a secure place for storage of sensitive information within a system. With its tamper detection circuits, this information remains safe even under attack. A two-wire serial interface running at speeds up to 1.0MHz provides fast and efficient communications with up to 15 individually addressable devices. The AT88SC0808CA is available in industry standard 8-lead packages with the same familiar pin configuration as Atmel AT24CXXX Serial EEPROM devices. Note: Does not apply to either the TSSOP or the Ultra Thin Mini-Map pinouts Figure 1-1. Block Diagram VCC GND Power Management Authentication, Encryption and Certification Unit Random Generator Synchronous Interface Data Transfer SCL/CLK SDA/IO RST Asynchronous ISO Interface Password Verification EEPROM Reset Block Answer to Reset Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 3 2. Connection Diagram Figure 2-1. Connection Diagram 2.7v - 5.5v 2.7v - 3.6v Microprocessor CryptoMemory SDA SCL 3. 3.1 Pin Descriptions Supply Voltage (VCC) The VCC input is a 2.7V to 3.6V positive voltage supplied by the host. 3.2 Clock (SCL/CLK) When using the asynchronous T = 0 protocol, the CLK (SCL) input provides the device with a carrier frequency f. The nominal length of one bit emitted on I/O is defined as an “elementary time unit” (ETU) and is equal to 372/ f. When using the synchronous protocol, data clocking is done on the positive edge of the clock when writing to the device and on the negative edge of the clock when reading from the device. 3.3 Reset (RST) The AT88SC0808CA provides an ISO 7816-3 compliant asynchronous answer-to-reset (ATR) sequence. Upon activation of the reset sequence, the device outputs bytes contained in the 64-bit ATR register. An internal pull-up on the RST input pad allows the device to operate in synchronous mode without bonding RST. The AT88SC0808CA does not support an ATR sequence in the synchronous mode of operation. 3.4 Serial Data (SDA/IO) The SDA/IO pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wired with any number of other open-drain or open-collector devices. An external pull-up resistor should be connected between SDA/IO and VCC. The value of this resistor and the system capacitance loading the SDA/IO bus will determine the rise time of SDA/IO. This rise time will determine the maximum frequency during read operations. Low value pull-up resistors will allow higher frequency operations while drawing higher average power supply current. SDA/IO information applies to both asynchronous and synchronous protocols. Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 4 4. *Absolute Maximum Ratings Operating temperature.................... −40°C to +85°C Storage temperature ................... −65°C to + 150°C Voltage on any pin with respect to ground ...............− 0.7 to VCC +0.7V Maximum operating voltage ............................. 4.0V DC output current ......................................... 5.0mA *Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. Applicable over recommended operating range from VCC = +2.7 to 3.6V, TAC = -40°C to +85°C (unless otherwise noted) Table 4-1. DC Characteristics Symbol VCC(1) ICC ICC ICC ICC ISB VIL VIL VIL VIH(1) (1) VIH Parameter Test Conditions Min 2.7 Typ Max 3.6 5 5 5 5 100 Units V mA mA mA mA µA V V V V V V µA µA µA µA µA µA V V µA mA Supply Voltage Supply Current Supply Current Supply Current Supply Current Standby Current SDA/IO Input Low Voltage CLK Input Low Voltage RST Input Low Voltage SDA/IO Input High Voltage SCL/CLK Input High Voltage RST Input High Voltage SDA/IO Input Low Current SCL/CLK Input Low Current RST Input Low Current SDA/IO Input High Current SCL/CLK Input High Current RST Input High Current SDA/IO Output High Voltage SDA/IO Output Low Voltage SDA/IO Output High Current SDA/IO Output Low Current 1. 0 < VIL < VCC x 0.15 0 < VIL < VCC x 0.15 0 < VIL < VCC x 0.15 VCC x 0.7 < VIH < VCC VCC x 0.7 < VIH < VCC VCC x 0.7 < VIH < VCC 20K ohm external pull-up IOL = 1mA VOH VOL Async Read at 3.57MHz Async Write at 3.57MHz Synch Read at 1MHz Synch Write at 1MHz VIN = VCC or GND 0 0 0 VCC x 0.7 VCC x 0.7 VCC x 0.7 VCC x 0.2 VCC x 0.2 VCC x 0.2 5.5 5.5 5.5 15 15 50 20 100 150 VIH(1) IIL IIL IIL IIH IIH IIH VOH VOL IOH IOL Note: VCC x 0.7 0 VCC VCC x 0.15 20 10 To prevent latch up conditions from occurring during power up of the AT88SC0808CA, VCC must be turned on before applying VIH. For powering down, VIH must be removed before turning VCC off. Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 5 Applicable over recommended operating range from VCC = +2.7 to 3.6V, TAC = -40°C to +85°C, CL = 30pF Table 4-2. AC Characteristics (unless otherwise noted) Symbol fCLK fCLK Parameter Async Clock Frequency Synch Clock Frequency Clock Duty cycle Min 1 0 40 Max 4 1 60 1 1 9% x period 9% x period 250 Units MHz MHz % µS µS µS µS nS nS nS nS nS nS nS tR tF tR tF tAA tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO tDH tWR “Rise Time - SDA/IO, RST” “Fall Time - SDA/IO, RST” Rise Time - SCL/CLK Fall Time - SCL/CLK Clock Low to Data Out Valid Start Hold Time Start Set-up Time Data In Hold Time Data In Set-up Time Stop Set-up Time Data Out Hold Time Write Cycle Time 200 200 10 100 200 20 5 mS 5. 5.1 Device Operations for Synchronous Protocols Clock and Data Transitions The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 5-3 on page 8). Data changes during SCL high periods will indicate a start or stop condition as defined below. 5.1.1 Start condition A high-to-low transition of SDA with SCL high defines a start condition which must precede all commands (see Figure 5-4 on page 8). 5.1.2 Stop condition A low-to-high transition of SDA with SCL high defines a stop condition. After a read sequence, the stop condition will place the EEPROM in a standby power mode (see Figure 5-4 on page 8). 5.1.3 Acknowledge All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle (see Figure 5-5 on page 8). Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 6 5.2 Memory Reset After an interruption in communication due protocol errors, power loss or any reason, perform "Acknowledge Polling" to properly recover from the condition. Acknowledge polling consists of sending a start condition followed by a valid CryptoMemory command byte and determining if the device responded with an acknowledge. Figure 5-1. Bus Time for Two-wire Serial Communications SCL: Serial Clock, SDA: Serial Data I/O tHIGH tLOW tF tR SCL tSU.STA tHD.STA tLOW tHD.DAT tSU.DAT tSU.STO SDA IN tAA tDH tBUF SDA OUT Figure 5-2. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th BIT ACK WORDn twr STOP CONDITION (1) START CONDITION Note: The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 7 Figure 5-3. Data Validity SDA SCL DATA STABLE DATA CHANGE ALLOWED DATA STABLE Figure 5-4. START and STOP Definitions SDA SCL START STOP Figure 5-5. Output Acknowledge SCL 1 8 9 DATA IN DATA OUT START ACKNOWLEDGE Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 8 6. 6.1 Device Architecture User Zones The EEPROM user memory is divided into eight zones of 1Kbits each. Multiple zones allow for storage of different types of data or files in different zones. Access to user zones is permitted only after meeting proper security requirements. These security requirements are user definable in the configuration memory during device personalization. If the same security requirements are selected for multiple zones, then these zones may effectively be accessed as one larger zone. Figure 6-1. User Zones Zone $00 User 0 $78 User 1 User 8 $00 128 bytes $0 $1 $2 $3 $4 $5 $6 $7 $78 $00 User 2 $78 128 bytes 7. Control Logic Access to the user zones occur only through the control logic built into the device. This logic is configurable through access registers, key registers and keys programmed into the configuration memory during device personalization. Also implemented in the control logic is a cryptographic engine for performing the various higher-level security functions of the device. Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 9 8. Configuration Memory The configuration memory consists of 2048 bits of EEPROM memory used for storage of passwords, keys, codes, and also used for definition of security access rights for the user zones. Access rights to the configuration memory are defined in the control logic and are not alterable by the user after completion of personalization. Figure 8-1. Configuration Memory $0 $00 $08 $10 $18 $20 $28 $30 $38 $40 $48 $50 $58 $60 $68 $70 $78 $80 $88 $90 $98 $A0 $A8 $B0 $B8 $C0 $C8 $D0 $D8 $E0 $E8 $F0 $F8 PAC PAC PAC PAC PAC PAC PAC PAC Write 0 Write 1 Write 2 Write 3 Write 4 Write 5 Write 6 Write 7 PAC PAC PAC PAC PAC PAC PAC PAC Reserved Read 0 Read 1 Read 2 Read 3 Read 4 Read 5 Read 6 Read 7 Forbidden Password For Authentication and Encryption use Secret For Authentication and Encryption use Cryptography DCR AR0 AR4 PR0 PR4 AR1 AR5 Fab Code $1 $2 $3 $4 $5 $6 $7 Identifitcation Read Only Answer To Reset MTZ Lot History Code Identification Number Nc PR1 PR5 AR2 AR6 PR2 PR6 AR3 AR7 PR3 PR7 Card Manufacturer Code Reserved Access Control Issuer Code Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 10 9. Security Fuses There are three fuses on the device that must be blown during the device personalization process. Each fuse locks certain portions of the configuration zone as OTP (One-Time Programmable) memory. Fuses are designed for the module manufacturer, card manufacturer and card issuer and should be blown in sequence, although all programming of the device and blowing of the fuses may be performed at one final step. 10. Communication Security Modes Communications between the device and host operate in three basic modes. Standard mode is the default mode for the device after power-up. Authentication mode is activated by a successful authentication sequence. Encryption mode is activated by a successful encryption activation following a successful authentication. Table 10-1. Communication Security Modes(1) Mode Standard Authentication Encryption Note: 1. Configuration Data Clear Clear Clear User Data Clear Clear Encrypted Passwords Clear Encrypted Encrypted Data Integrity Check MDC(1) MAC(1) MAC(1) Configuration data include viewable areas of the configuration zone except the passwords:   MDC: Modification Detection Code MAC: Message Authentication Code 11. 11.1 Security Options Anti-Tearing In the event of a power loss during a write cycle, the integrity of the device’s stored data is recoverable. This function is optional: the host may choose to activate the anti-tearing function, depending on application requirements. When anti-tearing is active, write commands take longer to execute, since more write cycles are required to complete them, and data is limited to a maximum of eight bytes for each write request. Data is written first into a buffer zone in EEPROM instead of the intended destination address, but with the same access conditions. The data is then written in the required location. If this second write cycle is interrupted due to a power loss, the device will automatically recover the data from the system buffer zone at the next power-up. Non-volatile buffering of the data is done automatically by the device. During power-up in applications using anti-tearing, the host is required to perform ACK polling in the event that the device needs to carry out the data recovery process. 11.2 Write Lock If a user zone is configured in the write lock mode, the lowest address byte of an 8-byte page constitutes a write access byte for the bytes of that page. Example: The write lock byte at $080 controls the bytes from $081 to $087 Figure 11-1. Write Lock Example Address $080 $0 11011001 $1 xxxx xxxx locked $2 xxxx xxxx locked $3 xxxx xxxx $4 xxxx xxxx $5 xxxx xxxx locked $6 xxxx xxxx $7 xxxx xxxx Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 11 The write lock byte itself may be locked by writing its least significant (rightmost) bit to “0”. Moreover, when write lock mode is activated, the write lock byte can only be programmed – that is, bits written to “0” cannot return to “1”. In the write lock configuration, write operations are limited to writing only one byte at a time. Attempts to write more than one byte will result in writing of just the first byte into the device. 11.3 Password Verification Passwords may be used to protect read and/or write access of any user zone. When a valid password is presented, it is memorized and active until power is turned off, unless a new password is presented or RST becomes active. There are eight password sets that may be used to protect any user zone. Only one password is active at a time. Presenting the correct write password also grants read access privileges. 11.4 Authentication Protocol The access to a user zone may be protected by an authentication protocol. Any one of four keys may be selected to use with a user zone. Authentication success is memorized and active as long as the chip is powered, unless a new authentication is initialized or RST becomes active. If the new authentication request is not validated, the card loses its previous authentication which must be presented again to gain access. Only the latest request is memorized. Figure 11-2. Password and Authentication Operations Device (Card) AUTHENTICATION Card Number VERIFY A COMPUTE Challenge B Challenge B READ ACCESS VERIFY RPW DATA Checksum (CS) VERIFY WPW VERIFY CS Write DATA WRITE ACCESS Host (Reader) COMPUTE Challenge A Challenge A VERIFY B Read Password (RPW) VERIFY CS Write Password (WPW) DATA CS Note: Authentication and password verification may be attempted at any time and in any order. Exceeding corresponding authentication or password attempts trial limit renders subsequent authentication or password verification attempts futile. Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 12 11.5 Cryptographic Message Authentication Codes AT88SC0808CA implements a data validity check function in the standard, authentication or encryption modes of operation. In the standard mode, data validity check is done through a Modification Detection Code (MDC), in which the host may read an MDC from the device in order to verify that the data sent was received correctly. In authentication and encryption modes, the data validity check becomes more powerful since it provides a bidirectional data integrity check and data origin authentication capability in the form of a Message Authentication Codes (MAC). Only the host/device that carried out a valid authentication is capable of computing a valid MAC. While operating in the authentication or encryption modes, the use of MAC is required. For an ingoing command, if the device calculates a MAC different from the MAC transmitted by the host, not only is the command abandoned but the security privilege is revoked. A new authentication and/or encryption activation will be required to reactivate the MAC. 11.6 Encryption The data exchanged between the device and the host during read, write and verify password commands may be encrypted to ensure data confidentiality. The issuer may choose to require encryption for a user zone by settings made in the configuration memory. Any one of four keys may be selected for use with a user zone. In this case, activation of the encryption mode is required in order to read/write data in the zone and only encrypted data will be transmitted. Even if not required, the host may still elect to activate encryption provided the proper keys are known. 11.7 Supervisor Mode Enabling this feature allows the holder of one specific password to gain full access to all eight password sets, including the ability to change passwords. 11.8 Modify Forbidden No write access is allowed in a user zone protected with this feature at any time. The user zone must be written during device personalization prior to blowing the security fuses. 11.9 Program Only For a user zones protected by this feature, data can only be programmed (bits change from a “1” to a “0”), but not erased (bits change from a “0” to a “1”). Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 13 12. Protocol Selection The AT88SC0808CA supports two different communication protocols. • • Smartcard Applications: Smartcard applications use ISO 7816-B protocol in asynchronous T = 0 mode for compatibility and interoperability with industry standard smartcard readers. Embedded Applications: A two-wire serial interface provides fast and efficient connectivity with other logic devices or microcontrollers. The power-up sequence determines establishes the communication protocol for use within that power cycle. Protocol selection is allowed only during power-up. 12.1 Synchronous Two-wire Serial Interface The synchronous mode is the default mode after power up. This is due to the presence of an internal pull-up on RST. For embedded applications using CryptoMemory in standard plastic packages, this is the only available communication protocol. • • • Power-up VCC, RST goes high also After stable VCC, SCL(CLK) and SDA(I/O) may be driven Once synchronous mode has been selected, it is not possible to switch to asynchronous mode without first powering off the device Figure 12-1. Synchronous Two-wire Protocol Vcc I/O-SDA RST CLK-SCL 1 2 3 4 5 Note: Five clock pulses must be sent before the first command is issued. Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 14 12.2 Asynchronous T = 0 Protocol This power-up sequence complies to ISO 7816-3 for a cold reset in smart card applications. • • • • VCC goes high; RST, I/O (SDA) and CLK (SCL) are low Set I/O (SDA) in receive mode Provide a clock signal to CLK (SCL) RST goes high after 400 clock cycles The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory density within the CryptoMemory family. Once asynchronous mode has been selected, it is not possible to switch to synchronous mode without first powering off the device. Figure 12-2. Asynchronous T = 0 Protocol (Gemplus Patent) Vcc I/O-SDA RST CLK-SCL ATR 13. Initial Device Programming Enabling the security features of CryptoMemory requires prior personalization. Personalization entails setting up of desired access rights by zones, passwords and key values, programming these values into the configuration memory with verification using simple write and read commands, and then blowing fuses to lock this information in place. Gaining access to the configuration memory requires successful presentation of a secure (or transport) code. The initial signature of the secure (transport) code for the AT88SC0808CA device is $22 E8 3F. This is the same as the Write 7 password. The user may elect to change the signature of the secure code anytime after successful presentation. After writing and verifying data in the configuration memory, the security fuses must be blown to lock this information in the device. For additional information on personalizing CryptoMemory, please see the application notes Programming CryptoMemory for Embedded Applications and Initializing CryptoMemory for Smart Card Applications from the product page at www.atmel.com/products/securemem. Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 15 14. Ordering Information Atmel Ordering Code AT88SC0808CA-MJ AT88SC0808CA-MP AT88SC0808CA-MJTG AT88SC0808CA-MPTG AT88SC0808CA-PU AT88SC0808CA-SH AT88SC0808CA-TH AT88SC0808CA-Y6H-T AT88SC0808CA-WI Package M2 – J Module- ISO M2 – P Module- ISO M2 – J Module -TWI M2 – P Module -TWI 8P3 8S1 8A2 8Y6 7 mil wafer Voltage Range Temperature Range 2.7V–3.6V Commercial (0°C to 70°C) 2.7V–3.6V Green compliant (exceeds RoHS) / Industrial(−40°C to 85°C) Industrial (−40°C to 85°C) 2.7V–3.6V Package Type(1) (2) M2 – J Module: ISO or TWI M2 – P Module: ISO or TWI 8P3 8S1 8X 8MA2 Note: 1. 2. Description M2 ISO 7816 smart card module M2 ISO 7816 smart card module with Atmel® logo 8-lead, 0.300” wide, Plastic Dual Inline (PDIP) 8-lead, 0.150” wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP) 8-lead, 2.0 x 3.0mm body, 0.50mm pitch, Ultra Thin Mini-Map, Dual No Lead (DFN), (MLP 2x3) Formal drawings may be obtained from an Atmel sales office Both the J and P module packages are used for either ISO (T=0 / 2-wire mode) or TWI (2-wire mode only) Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 16 15. Package Information Ordering Code: MJ or MJTG Module Size: Dimension*: Glob Top: Thickness: Pitch: M2 12.6 x 11.4 [mm] 0.58 [mm] 14.25mm Round - ∅ 8.5 [mm] Ordering Code: MP or MPTG Module Size: Dimension*: Glob Top: Thickness: Pitch: M2 12.6 x 11.4 [mm] Square - 8.8 x 8.8 [mm] 0.58 [mm] 14.25mm Note: *The module dimensions listed refer to the dimensions of the exposed metal contact area. The actual dimensions of the module after excise or punching from the carrier tape are generally 0.4mm greater in both directions (i.e., a punched M2 module will yield 13.0 x 11.8mm). Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 17 15.1 Ordering Code: SH 8S1 – 8-lead SOIC C 1 E E1 N L Ø TOP VIEW END VIEW e b A A1 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A 1.35 A1 b C D E1 E e L 0.40 0° 0.10 0.31 0.17 4.80 3.81 5.79 NOM – – – – – – – 1.27 BSC – – 1.27 8° MAX 1.75 0.25 0.51 0.25 5.05 3.99 6.20 NOTE D SIDE VIEW Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 6/22/11 TITLE Package Drawing Contact: 8S1, 8-lead (0.150” Wide Body), Plastic Gull packagedrawings@atmel.com Wing Small Outline (JEDEC SOIC) GPC SWB DRAWING NO. 8S1 REV. G Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 18 15.2 Ordering Code: PU 8P3 – 8-lead PDIP 1 E E1 N Top View c eA End View COMMON DIMENSIONS (Unit of Measure = inches) D e D1 A2 A SYMBOL A A2 b b2 b3 c D MIN NOM MAX 0.210 NOTE 2 0.115 0.014 0.045 0.030 0.008 0.355 0.005 0.300 0.240 0.130 0.018 0.060 0.039 0.010 0.365 0.195 0.022 0.070 0.045 0.014 0.400 3 3 5 6 6 b2 b3 4 PLCS L D1 E E1 e eA L b 0.310 0.250 0.100 BSC 0.300 BSC 0.325 0.280 4 3 Side View 4 0.150 2 0.115 0.130 Notes: 1. 2. 3. 4. 5. 6. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 06/21/11 TITLE Package Drawing Contact: packagedrawings@atmel.com GPC DRAWING NO. 8P3 REV. D 8P3, 8-lead, 0.300” Wide Body, Plastic Dual In-line Package (PDIP) PTC Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 19 15.3 Ordering Code: TH 8X – 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View b A A1 End View e D A2 SYMBOL A COMMON DIMENSIONS (Unit of Measure = mm) MIN 0.05 0.80 2.90 NOM 1.00 3.00 6.40 BSC 4.30 0.19 4.40 – 0.65 BSC 0.45 0.60 1.00 REF 0.09 0.20 0.75 4.50 0.30 3, 5 4 MAX 1.20 0.15 1.05 3.10 2, 5 NOTE Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. A1 A2 D E E1 b e L L1 C 6/22/11 TITLE GPC DRAWING NO. 8X REV. D Package Drawing Contact: 8X, 8-lead 4.4mm Body, Plastic Thin packagedrawings@atmel.com Shrink Small Outline Package (TSSOP) TNR Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 20 15.4 Ordering Code: Y6H-T 8MA2 – 8-lead Ultra Thin Mini-Map E 1 8 Pin 1 ID 2 3 4 7 D 6 5 C A2 A1 A E2 b (8x) SYMBOL 8 7 1 2 D E COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM 2.00 BSC 3.00 BSC 1.40 1.20 0.50 0.0 – 1.50 1.30 0.55 0.02 – 0.152 REF 0.30 0.35 0.50 BSC 0.18 0.20 0.25 – 0.30 – 3 0.40 1.60 1.40 0.60 0.05 0.55 MAX NOTE Pin#1 ID 6 5 3 4 D2 D2 E2 A A1 A2 e (6x) L (8x) K C L e b K 7/15/11 Package Drawing Contact: packagedrawings@atmel.com TITLE 8MA2, 8-pad, 2 x 3 x 0.6 mm Body, Thermally Enhanced Plastic Ultra Thin Dual Flat No Lead Package (UDFN) GPC YNZ DRAWING NO. 8MA2 REV. B Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 21 16. Revision History Doc. Rev. 5204FS Date 12/2011 Comments Update Template Update package drawings and - Replace 8A2 with 8X - Replace 8Y6 with 8MA2 Change AT88SC0808CA-SU to AT88SC0808CA-SH Minor edits and TWI module update Minor updates to package drawing information and ordering information. Added Mini-MAP column to Table 1-1 and Mini-MAP pin-out drawing. Connection Diagram inserted; DC Characteristics table updated. Initial document release. 5204ES 5204DS 5204CS 5204BS 5204AS 07/2009 07/2009 05/2009 02/2009 07/2008 Atmel AT88SC0808CA [Summary DATASHEET] 5204FS−CRYPTO−12/11 22 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan G.K. 16F Shin-Osaki Kangyo Bldg. 1-6-4 Osaki, Shinagawa-ku Tokyo 141-0032 JAPAN Tel: (+81)(3) 6417-0300 Fax: (+81)(3) 6417-0370 © 2011 Atmel Corporation. All rights reserved. / Rev.: 5204FS−CRYPTO−12/11 Atmel®, Atmel logos and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. 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