AT90S2323-10PC

Features • Utilizes the AVR® RISC Architecture • AVR – High-performance and Low-power RISC Architecture – 118 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General-purpose Working Registers – Up to 10 MIPS Throughput at 10 MHz Data and Nonvolatile Program Memory – 2K Bytes of In-System Programmable Flash Endurance: 1,000 Write/Erase Cycles – 128 Bytes Internal RAM – 128 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial Interface for In-System Programming Special Microcontroller Features – Low-power Idle and Power-down Modes – External and Internal Interrupt Sources – Power-on Reset Circuit – Selectable On-chip RC Oscillator Specifications – Low-power, High-speed CMOS Process Technology – Fully Static Operation Power Consumption at 4 MHz, 3V, 25°C – Active: 2.4 mA – Idle Mode: 0.5 mA – Power-down Mode: 2 MCU clock cycles High: > 2 MCU clock cycles Low-voltage Serial Programming Algorithm When writing serial data to the AT90S2323/2343, data is clocked on the rising edge of SCK. When reading data from the AT90S2323/2343, data is clocked on the falling edge of SCK. See Figure 36, Figure 37 and Table 20 for timing details. To program and verify the AT90S2323/2343 in the low-voltage Serial Programming mode, the following sequence is recommended (see 4-byte instruction formats in Table 19): 1. Power-up sequence: Apply power between VCC and GND while RESET and SCK are set to “0”. (If the programmer cannot guarantee that SCK is held low during power-up, RESET must be given a positive pulse after SCK has been set to “ 0 ” .) If the device is programmed for external clocking, apply a 0 - 8 MHz clock to the XTAL1/PB3 pin. If the internal RC oscillator is selected as the clock source, no external clock source needs to be applied (AT90S/LS2343 only). 2. Wait for at least 20 ms and enable serial programming by sending the Programming Enable serial instruction to the MOSI (PB0) pin. Refer to the above section for minimum low and high periods for the serial clock input, SCK. 3. The serial programming instructions will not work if the communication is out of synchronization. When in sync, the second byte ($53) will echo back when issuing the third byte of the Programming Enable instruction. Whether the echo is correct or not, all four bytes of the instruction must be transmitted. If the $53 did not echo back, give SCK a positive pulse and issue a new Programming Enable instruction. If the $53 is not seen within 32 attempts, there is no functional device connected. 4. If a Chip Erase is performed (must be done to erase the Flash), wait tWD_ERASE after the instruction, give RESET a positive pulse and start over from step 2. See Table 21 on page 46 for tWD_ERASE value. 5. The Flash or EEPROM array is programmed one byte at a time by supplying the address and data together with the appropriate Write instruction. An EEPROM memory location is first automatically erased before new data is written. Use Data Polling to detect when the next byte in the Flash or EEPROM can be written. If polling is not used, wait tWD_PROG before transmitting the next instruction. See Table 22 on page 46 for tWD_PROG value. In an erased device, no $FFs in the data file(s) need to be programmed. 6. Any memory location can be verified by using the Read instruction, which returns the content at the selected address at the serial output MISO (PB1) pin. 43 1004D–09/01 7. At the end of the programming session, RESET can be set high to commence normal operation. 8. Power-off sequence (if needed): Set CLOCK/XTAL1 to “0”. Set RESET to “1”. Turn VCC power off. Data Polling EEPROM When a byte is being programmed into the EEPROM, reading the address location being programmed will give the value P1 until the auto-erase is finished, and then the value P2 will be given. See Table 18 for P1 and P2 values. At the time the device is ready for a new EEPROM byte, the programmed value will read correctly. This is used to determine when the next byte can be written. This will not work for the values P1 and P2, so when programming these values, the user will have to wait for at least the prescribed time tWD_PROG before programming the next byte. See Table 22 for tWD_PROG value. As a chip-erased device contains $FF in all locations, programming of addresses that are meant to contain $FF can be skipped. This does not apply if the EEPROM is reprogrammed without first chip-erasing the device. Table 18. Read Back Value during EEPROM Polling Part AT90S2323 AT90S2343 P1 $00 $00 P2 $FF $FF Data Polling Flash When a byte is being programmed into the Flash, reading the address location being programmed will give the value $FF. At the time the device is ready for a new byte, the programmed value will read correctly. This is used to determine when the next byte can be written. This will not work for the value $FF, so when programming this value, the user will have to wait for at least tWD_PROG before programming the next byte. As a chiperased device contains $FF in all locations, programming of addresses that are meant to contain $FF can be skipped. Figure 36. Low-voltage Serial Downloading Waveforms SERIAL DATA INPUT PB0(MOSI) SERIAL DATA OUTPUT PB1(MISO) SERIAL CLOCK INPUT PB2(SCK) MSB LSB MSB LSB 44 AT90S/LS2323/2343 1004D–09/01 AT90S/LS2323/2343 Table 19. Low-voltage Serial Programming Instruction Set AT90S2323/2343 Instruction Format Instruction Programming Enable Chip Erase Read Program Memory Write Program Memory Read EEPROM Memory Write EEPROM Memory Read Lock and Fuse Bits (AT90S/LS2323) Read Lock and Fuse Bits (AT90S/LS2343) Write Lock Bits Write FSTRT Bit (AT90S/LS2323) Write RCEN Bit (AT90S/LS2343) Read Signature Bytes Notes: Byte 1 1010 1100 1010 1100 0010 H000 Byte 2 0101 0011 100x xxxx 0000 00aa Byte 3 xxxx xxxx xxxx xxxx bbbb bbbb Byte 4 xxxx xxxx xxxx xxxx oooo oooo Operation Enable Serial programming while RESET is low. Chip erase both Flash and EEPROM memory arrays. Read H (high or low) data o from program memory at word address a:b. Write H (high or low) data i to program memory at word address a:b. Read data o from EEPROM memory at address b. Write data i to EEPROM memory at address b. Read Lock and Fuse bits. “0” = programmed, “1” = unprogrammed Read Lock and Fuse bits. “0” = programmed, “1” = unprogrammed Write Lock bits. Set bits 1,2 = “0” to program Lock bits. Write FSTRT fuse. Set bit F = “0” to program, “1” to unprogram.(2) Write RCEN Fuse. Set bit R = ‘0’ to program, ‘1’ to unprogram.(2) Read signature byte o from address b.(3) 0100 H000 0000 00aa bbbb bbbb iiii iiii 1010 0000 1100 0000 0101 1000 0000 0000 0000 0000 xxxx xxxx xbbb bbbb xbbb bbbb xxxx xxxx oooo oooo iiii iiii 12Sx xxxF 0101 1000 xxxx xxxx xxxx xxxx 12Sx xxxR 1010 1100 1010 1100 1010 1100 0011 0000 1111 1211 1011 111F 1011 111R xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxbb xxxx xxxx xxxx xxxx xxxx xxxx oooo oooo 1. a = address high bits b = address low bits H = 0 – Low byte, 1 – High byte o = data out i = data in x = don’t care 1 = lock bit 1 2 = lock bit 2 F = FSTRT Fuse R = RCEN Fuse S = SPIEN Fuse 2. When the state of the RCEN/FSTRT bit is changed, the device must be power cycled for the changes to have any effect. 3. The signature bytes are not readable in Lock mode 3, i.e., both Lock bits programmed. 45 1004D–09/01 Low-voltage Serial Programming Characteristics Figure 37. Low-voltage Serial Programming Timing MOSI tOVSH SCK MISO tSLIV tSHSL tSHOX tSLSH Table 20. Low-voltage Serial Programming Characteristics, TA = -40°C to 85°C, VCC = 2.7 - 6.0V (unless otherwise noted) Symbol 1/tCLCL tCLCL 1/tCLCL tCLCL tSHSL tSLSH tOVSH tSHOX tSLIV Parameter Oscillator Frequency (VCC = 2.7 - 4.0V) Oscillator Period (VCC = 2.7 - 4.0V) Oscillator Frequency (VCC = 4.0 - 6.0V) Oscillator Period (VCC = 4.0 - 6.0V) SCK Pulse Width High SCK Pulse Width Low MOSI Setup to SCK High MOSI Hold after SCK High SCK Low to MISO Valid Min 0 250.0 0 125.0 2.0 tCLCL 2.0 tCLCL tCLCL 2.0 tCLCL 10.0 16.0 32.0 8.0 Typ Max 4.0 Units MHz ns MHz ns ns ns ns ns ns Table 21. Minimum Wait Delay after the Chip Erase Instruction Symbol tWD_ERASE 3.2V 18 ms 3.6V 14 ms 4.0V 12 ms 5.0V 8 ms Table 22. Minimum Wait Delay after Writing a Flash or EEPROM Location Symbol tWD_PROG 3.2V 9 ms 3.6V 7 ms 4.0V 6 ms 5.0V 4 ms 46 AT90S/LS2323/2343 1004D–09/01 AT90S/LS2323/2343 Electrical Characteristics Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin except RESET with respect to Ground ..............................-1.0V to VCC + 0.5V Voltage on RESET with Respect to Ground ....-1.0V to +13.0V Maximum Operating Voltage ............................................ 6.6V DC Current per I/O Pin ............................................... 40.0 mA DC Current VCC and GND Pins................................ 200.0 mA *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Characteristics TA = -40°C to 85°C, VCC = 2.7V to 6.0V (unless otherwise noted) Symbol VIL VIL1 VIH VIH1 VIH2 VOL VOH IIL IIH RRST RI/O Parameter Input Low Voltage Input Low Voltage Input High Voltage Input High Voltage Input High Voltage Output Low Voltage Ports B Output High Voltage Ports B Input Leakage Current I/O Pin Input Leakage Current I/O Pin Reset Pull-up I/O Pin Pull-up Active 4 MHz, VCC = 3V Idle 4 MHz, VCC = 3V Power Supply Current AT90S2343 Power-down 4 MHz , VCC = 3V WDT Enabled Power-down 4 MHz(3), VCC = 3V WDT Disabled Active 4 MHz, VCC = 3V Idle 4 MHz, VCC = 3V Power Supply Current AT90S2323 Power-down , VCC = 3V WDT Enabled Power-down(3), VCC = 3V WDT Disabled (3) (3) Condition (Except XTAL) XTAL (Except XTAL, RESET) XTAL RESET IOL = 20 mA, VCC = 5V IOL = 10 mA, VCC = 3V IOH = -3 mA, VCC = 5V IOH = -1.5 mA, VCC = 3V VCC = 6V, Pin Low (absolute value) VCC = 6V, Pin High (absolute value) Min -0.5 -0.5 0.6 VCC(2) 0.7 VCC (2) (2) Typ Max 0.3 VCC 0.1 (1) (1) Units V V V V V V V V V VCC + 0.5 VCC + 0.5 VCC + 0.5 0.5 0.4 0.85 VCC 4.2 2.4 8.0 8.0 100.0 30.0 500.0 150.0 3.0 1.1 25.0 20.0 4.0 1.0 9.0