AT93C86A_08

1. Features • Medium-voltage and Standard-voltage Operation – 2.7 (VCC = 2.7V to 5.5V) • Automotive Temperature Range –40°C to +125°C • User Selectable Internal Organization • • • • • • – 16K: 2048 x 8 or 1024 x 16 3-wire Serial Interface Sequential Read Operation Schmitt Trigger, Filtered Inputs for Noise Suppression 2 MHz Clock Rate (5V) Compatibility Self-timed Write Cycle (10 ms max) High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Lead-Free/Halogen-Free Devices Available 8-lead JEDEC SOIC and 8-lead TSSOP Packages • • Three-wire Automotive Temperature Serial EEPROM 16K (2048 x 8 or 1024 x 16) 2. Description The AT93C86A provides 16384 bits of serial electrically erasable programmable read only memory (EEPROM), organized as 1024 words of 16 bits each when the ORG pin is connected to VCC and 2048 words of 8 bits each when it is tied to ground. The device is optimized for use in many automotive applications where low-power and low-voltage operations are essential. The AT93C86A is available in space saving 8lead JEDEC SOIC and 8-lead TSSOP packages. Table 2-1. Pin Name CS SK DI DO GND VCC ORG DC AT93C86A Pin Configuration Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Internal Organization Don’t Connect 8-lead SOIC CS SK DI DO 1 2 3 4 8 7 6 5 VCC DC ORG GND 8-lead TSSOP CS SK DI DO 1 2 3 4 8 7 6 5 VCC DC ORG GND The AT93C86A is enabled through the Chip Select pin (CS), and accessed via a three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The write cycle is completely self-timed and no separate erase cycle is required before Write. The write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought “high” following the initiation of a write cycle, the DO pin outputs the Ready/Busy status of the part. The AT93C86A is available in a 2.7V to 5.5V version. Rev. 5096E–SEEPR–1/08 Absolute Maximum Ratings* Operating Temperature..................................–55°C to +125°C Storage Temperature .....................................–65°C to +150°C Voltage on any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 2-1. Block Diagram Vcc GND MEMORY ARRAY ORG 2048 x 8 OR 1024 x 16 ADDRESS DECODER DATA REGISTER DI MODE DECODE LOGIC OUTPUT BUFFER CS SK CLOCK GENERATOR DO Note: When the ORG pin is connected to Vcc, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then the x 16 organization is selected. Table 2-2. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted) Symbol COUT CIN Note: Test Conditions Output Capacitance (DO) Input Capacitance (CS, SK, DI) 1. This parameter is characterized and is not 100% tested. Max 5 5 Units pF pF Conditions VOUT = 0V VIN = 0V 2 AT93C86A 5096E–SEEPR–1/08 AT93C86A Table 2-3. DC Characteristics Applicable over recommended operating range from: TA = –40°C to +125°C, VCC = +2.7V to +5.5V (unless otherwise noted) Symbol VCC1 VCC2 ICC ISB1 ISB2 IIL IOL VIL1 VIH1(1) VOL1 VOH1 Note: (1) Parameter Supply Voltage Supply Voltage Supply Current Standby Current Standby Current Input Leakage Output Leakage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Test Condition Min 2.7 4.5 Typ Max 5.5 5.5 Unit V V mA mA µA µA µA µA V V V V VCC = 5.0V VCC = 2.7V VCC = 5.0V VIN = 0V to VCC VIN = 0V to VCC 2.7V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V READ at 1.0 MHz WRITE at 1.0 MHz CS = 0V CS = 0V 0.5 0.5 6.0 10.0 0.1 0.1 −−−−0.6 2.0 2.0 2.0 10.0 15.0 3.0 3.0 0.8 VCC + 1 0.4 IOL = 2.1 mA IOH = –0.4 mA 2.4 1. VIL min and VIH max are reference only and are not tested. Table 2-4. AC Characteristics Applicable over recommended operating range from TA = –40°C to +125°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted) Symbol fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 Parameter SK Clock Frequency SK High Time SK Low Time Minimum CS Low Time CS Setup Time DI Setup Time CS Hold Time DI Hold Time Output Delay to ‘1’ Output Delay to ‘0’ Test Condition 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V Relative to SK Relative to SK Relative to SK Relative to SK AC Test AC Test 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V Min 0 0 250 250 250 250 250 250 50 50 100 100 0 100 100 250 500 250 500 Typ Max 2 1 Units MHz ns ns ns ns ns ns ns ns ns 3 5096E–SEEPR–1/08 Table 2-4. AC Characteristics (Continued) Applicable over recommended operating range from TA = –40°C to +125°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted) Symbol tSV tDF tWP Endurance (1) Parameter CS to Status Valid CS to DO in High Impedance Write Cycle Time 5.0V, 25°C Test Condition AC Test AC Test CS = VIL 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V Min Typ Max 250 250 100 150 Units ns ns ms Write Cycles 0.1 1M 4 10 Note: 1. This parameter is characterized and is not 100% tested. Table 2-5. Instruction READ EWEN ERASE WRITE ERAL WRAL Instruction Set for the AT93C86A Address SB 1 1 1 1 1 1 Op Code 10 00 11 01 00 00 x8 A10 – A0 11XXXXXXXXX A10 – A0 A10 – A0 10XXXXXXXXX 01XXXXXXXXX x 16 A9 – A0 11XXXXXXXX A9 – A0 A9 – A0 10XXXXXXXX 01XXXXXXXX D7 – D0 D15 – D0 D7 – D0 D15 – D0 x8 Data x 16 Comments Reads data stored in memory, at specified address. Write enable must precede all programming modes. Erases memory location An – A0. Writes memory location An – A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. Writes all memory locations. Valid when VCC = 4.5V to 5.5V and Disable Register cleared. Disables all programming instructions. EWDS 1 00 00XXXXXXXXX 00XXXXXXXX 4 AT93C86A 5096E–SEEPR–1/08 AT93C86A 3. Functional Description The AT93C86A is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A v alid instruction starts with a rising edge of CS and consists of a Start Bit (logic “1”) followed by the appropriate Op Code and the desired memory address location. READ (READ): The Read (READ) instruction contains the address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. The AT93C86A supports sequential read operations. The device will automatically increment the internal address pointer and clock out the next memory location as long as CS is held high. In this case, the dummy bit (logic “0”) will not be clocked out between memory locations, thus allowing for a continuous stream of data to be read. ERASE/WRITE (EWEN): T o assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the EWEN state, programming remains enabled until an EWDS instruction is executed or VCC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The self-timed erase cycle starts once the Erase instruction and address are decoded. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “1” at pin DO indicates that the selected memory location has been erased, and the part is ready for another instruction. WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle tWP starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “0” at DO indicates that programming is still in progress. A logic “1” indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A R eady/Busy status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle tWP. ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the logic “1” state and is primarily used for testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The Eral instruction is valid only at VCC = 5.0V ± 10%. WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The Wral instruction is valid only at VCC = 5.0V ± 10%. E RASE/WRITE DISABLE (EWDS): T o protect against accidental data disturbance, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the Read instruction is independent of both the Ewen and Ewds instructions and can be executed at any time. 5 5096E–SEEPR–1/08 4. Timing Diagrams Figure 4-1. Synchronous Data Timing Note: 1. This is the minimum SK period. Table 4-1. Organization Key for Timing Diagrams AT93C86A (16K) I/O AN DN x8 A10 D7 x 16 A9 D15 Figure 4-2. READ Timing 6 AT93C86A 5096E–SEEPR–1/08 AT93C86A Figure 4-3. EWEN Timing tCS CS SK DI 1 0 0 1 1 ... Figure 4-4. EWDS Timing CS tCS SK DI 1 0 0 0 0 ... Figure 4-5. WRITE Timing CS tCS SK DI 1 0 1 AN ... A0 DN ... D0 DO HIGH IMPEDANCE BUSY READY tWP 7 5096E–SEEPR–1/08 Figure 4-6. WRAL Timing(1) CS tCS SK DI 1 0 0 0 1 ... DN ... D0 DO HIGH IMPEDANCE BUSY READY tWP Note: 1. Valid only at VCC = 4.5V to 5.5V. Figure 4-7. ERASE Timing tCS CS CHECK STATUS STANDBY SK DI 1 1 1 AN AN-1 AN-2 ... A0 tSV tDF HIGH IMPEDANCE READY DO HIGH IMPEDANCE BUSY tWP 8 AT93C86A 5096E–SEEPR–1/08 AT93C86A Figure 4-8. ERAL Timing(1) D Note: 1. Valid only at VCC = 4.5V to 5.5V. 9 5096E–SEEPR–1/08 5. AT93C86A Ordering Information Ordering Code AT93C86A-10SQ-2.7 AT93C86A-10TQ-2.7 Package 8S1 8A2 Operation Range Lead-free/Halogen-free Automotive Temperature (−40°C to 125°C) Package Type 8S1 8A2 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options −2.7 Low Voltage (2.7V to 5.5V) 10 AT93C86A 5096E–SEEPR–1/08 AT93C86A 6. Packaging Information 6.1 8S1 – JEDEC SOIC C 1 E E1 N L Ø TOP VIEW END VIEW e b A A1 SYMBOL A A1 b C COMMON DIMENSIONS (Unit of Measure = mm) MIN 1.35 0.10 0.31 0.17 4.80 3.81 5.79 NOM – – – – – – – 1.27 BSC 0.40 0° – – 1.27 8° MAX 1.75 0.25 0.51 0.25 5.05 3.99 6.20 NOTE D D E1 SIDE VIEW E e L θ Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 3/17/05 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) DRAWING NO. 8S1 REV. C R 11 5096E–SEEPR–1/08 6.2 8A2 – TSSOP 3 21 Pin 1 indicator this corner E1 E L1 N L Top View End View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN 2.90 NOM 3.00 6.40 BSC 4.30 – 0.80 0.19 4.40 – 1.00 – 0.65 BSC 0.45 0.60 1.00 REF 0.75 4.50 1.20 1.05 0.30 4 3, 5 MAX 3.10 NOTE 2, 5 b A D E E1 A e D A2 A2 b e Side View L L1 Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and E1 to be determined at Datum Plane H. 5/30/02 R 2325 Orchard Parkway San Jose, CA 95131 TITLE 8A2, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) DRAWING NO. 8A2 REV. B 12 AT93C86A 5096E–SEEPR–1/08 AT93C86A 7. Revision History Doc. Rev. 5096E 5096D 5096C Date 1/2008 2/2007 9/2006 Comments Moved to new template Replaced Table 5 with correct version Removed PDIP package offering Removed Pb’d part numbers Revision history implemented; Removed ‘Preliminary’ status from datasheet. 13 5096E–SEEPR–1/08 Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Product Contact Web Site www.atmel.com Technical Support s_eeprom@atmel.com Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Disclaimer: T he information in this document is provided in connection with Atmel products. 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