ATF22V10CZ-15JC

Features • • • • • Industry-standard Architecture 12ns Maximum Pin-to-pin Delay Zero Power – 100µA Maximum Standby Power (Input Transition Detection) CMOS and TTL Compatible Inputs and Outputs Advanced Electrically ErasableTechnology – Reprogrammable – 100% Tested Latch Feature Holds Inputs to Previous Logic State High-reliability CMOS Process – 20 Year Data Retention – 100 Erase/Write Cycles – 2,000V ESD Protection – 200mA Latchup Immunity Industrial Temperature Ranges Dual-in-line and Surface Mount Standard Pinouts PCI Compliant Green Package Options (Pb/Halide-free/RoHS Compliant) Available • • • • • • High-performance Electrically Erasable Programmable Logic Device Atmel ATF22V10CZ Atmel ATF22V10CQZ 1. Description The Atmel® ATF22V10CZ/CQZ is a high-performance CMOS (electrically erasable) programmable logic device (PLD) which utilizes The Atmel proven electrically erasable Flash memory technology. Speeds down to 12ns with zero standby power dissipation are offered. All speed ranges are specified over the full 5V ±10% range for industrial temperature ranges; 5V ±5% for commercial range 5-volt devices. The ATF22V10CZ/CQZ provides a low voltage and edge-sensing “zero” power CMOS PLD solution with “zero” standby power (5µA typical). The ATF22V10CZ/CQZ provides a “zero” power CMOS PLD solution with 5V operating voltages, powering down automatically to the zero power-mode through The Atmel patented Input Transition Detection (ITD) circuitry when the device is idle, offering “zero” (100µA worst case) standby power. This feature allows the user to manage total system power to meet specific application requirements and enhance reliability. Pin “keeper” circuits on input and output pins eliminate static power consumed by pull-up resistors. The “CQZ” combines the low high-frequency ICC of the “Q” design with the “Z” feature. The ATF22V10CZ/CQZ incorporates a superset of the generic architectures, which allows direct replacement of the 22V10 family and most 24-pin combinatorial PLDs. Ten outputs are each allocated 8 to 16 product terms. Three different modes of operation, configured automatically with software, allow highly complex logic functions to be realized. 0778L–PLD–8/10 Figure 1-1. Block Diagram 2. Pin Configurations Table 2-1. Pin Name CLK IN I/O VCC Pin Configurations (All Pinouts Top View) Function Clock Logic Inputs Bi-directional Buffers +5V Supply Figure 2-1. CLK/IN IN IN IN IN IN IN IN IN IN IN GND TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN Figure 2-2. DIP/SOIC CLK/IN IN IN IN IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN Figure 2-3. PLCC IN IN CLK/IN VCC* VCC I/O I/O 4 3 2 1 28 27 26 Note: For PLCC, P1, P8, P15 and P22 can be left unconnected. For superior performance, connect VCC to pin 1 and GND to 8, 15, and 22 2 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 IN IN GND GND* IN I/O I/O 12 13 14 15 16 17 18 IN IN IN GND* IN IN IN 5 6 7 8 9 10 11 25 24 23 22 21 20 19 I/O I/O I/O GND* I/O I/O I/O Atmel ATF22V10C(Q)Z 3. Absolute Maximum Ratings* *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Temperature Under Bias .................. -40°C to +85°C Storage Temperature...................... -65°C to +150°C Voltage on Any Pin with Respect to Ground...........................-2.0V to +7.0V(1) Voltage on Input Pins with Respect to Ground During Programming......................-2.0V to +14.0V(1) Programming Voltage with Respect to Ground.........................-2.0V to +14.0V(1) Note: 1. Minimum voltage is -0.6V DC, which may undershoot to 2.0V for pulses of less than 20ns. Maximum output pin voltage is VCC + 0.75V DC, which may overshoot to 7.0V for pulses of less than 20ns. 4. DC and AC Operating Conditions Commercial Industrial -40⋅C - 85⋅C 5V ± 10% 0⋅C - 70⋅C 5V ± 5% Operating Temperature (Ambient) VCC Power Supply 4.1 DC Characteristics Parameter Input or I/O Low Leakage Current Input or I/O High Leakage Current Condition 0 ≤ VIN ≤ VIL (Max) 3.5 ≤ VIN ≤ VCC CZ-12, 15 Com Ind Com Ind Com Ind Com Ind 90 90 40 40 5 5 5 5 Min Typ Max -10 10 150 180 60 80 100 120 100 120 -130 -0.5 2.0 VIN = VIH or VIL VCC = Min, IOL = 16mA VIN = VIH or VIL VCCIO = Min, IOH = -4.0mA 2.4 0.8 VCC + 0.75 0.5 Units µA µA mA mA mA mA µA µA µA µA mA V V V Symbol IIL IIH ICC Clocked Power Supply Current VCC = Max Outputs Open, f = 15MHz CZ-15 CQZ-20 CQZ-20 CZ-12, 15 ISB Power Supply Current, Standby VCC = Max VIN = MAX Outputs Open CZ-15 CQZ-20 CQZ-20 IOS(1) VIL VIH VOL Output Short Circuit Current Input Low Voltage Input High Voltage Output Low Voltage VOUT = 0.5V VOH Note: Output High Voltage V 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec 3 0778L–PLD–8/10 4.2 AC Waveforms INPUTS, I/O REG. FEEDBACK SYNCH. PRESET tS tH tW tW CP tP tAW ASYNCH. RESET tCO REGISTERED OUTPUTS tPD COMBINATORIAL OUTPUTS VALID VALID tAP VALID tER VALID tER tEA OUTPUT DISABLED tEA OUTPUT DISABLED VALID VALID tAR 4.3 AC Characteristics(1) -12 -15 Max 12 6 2 10 0 6 55.5 62 83.3 3 2 2 2 3 10 7 5 10 12 15 12 15 10 3 3 2 2 3 10 8 6 10 8 2 10 0 6 55.5 69 83.3 15 15 15 15 15 Min 3 Max 15 4.5 8 2 14 0 10 38.5 45.5 50.0 3 3 2 2 3 14 20 20 14 20 20 20 20 22 Min 3 -20 Max 20 8 12 Units ns ns ns ns ns ns MHz MHz MHz ns ns ns ns ns ns ns ns ns Parameter Input or Feedback to Non-registered Output Clock to Feedback Clock to Output Input or Feedback Setup Time Input Hold Time Clock Width External Feedback 1/(tS + tCO) Internal Feedback 1/(tS + tCF) No Feedback 1/(tP) Input to Output Enable - Product Term Input to Output Disable - Product Term OE Pin to Output Enable OE Pin to Output Disable Input or I/O to Asynchronous Reset of Register Setup Time, Synchronous Preset Asynchronous Reset Width Asynchronous Reset Recovery Time Synchronous Preset to Clock Recovery Time 1. See ordering information for valid part numbers Min 3 Symbol tPD tCF tCO tS tH tW fMAX tEA tER tPZX tPXZ tAP tSP tAW tAR tSPR Note: 4 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z 4.4 4.4.1 Input Test Waveforms Input Test Waveforms and Measurement Levels 4.4.2 Output Test Loads Note: Similar competitors devices are specified with slightly different loads. These load differences may affect output signals’ delay and slew rate. Atmel devices are tested with sufficient margins to meet compatible device specification conditions. 4.5 Pin Capacitance Table 4-1. Pin Capacitance (f = 1MHz, T = 25C(1) Typ CIN CI/O 8 8 Max 10 10 Units pF pF Conditions VIN = 0V; f = 1.0MHz VOUT = 0V; f = 1.0MHz Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested 4.6 Power-up Reset The registers in the Atmel® ATF22V10CZ/CQZ are designed to reset during power-up. At a point delayed slightly from VCC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the buffer. This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the uncertainty of how VCC actually rises in the system, the following conditions are required: 1. The VCC rise must be monotonic and start below 0.7V 2. The clock must remain stable during TPR 3. After TPR occurs, all input and feedback setup times must be met before driving the clock pin high 4.7 Preload of Register Outputs The ATF22V10CZ/CQZ’s registers are provided with circuitry to allow loading of each register with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC file preload sequence will be done automatically by most of the approved programmers after the programming. 5 0778L–PLD–8/10 5. Electronic Signature Word There are 64-bits of programmable memory that are always available to the user, even if the device is secured. These bits can be used for user-specific data. 6. Security Fuse Usage A single fuse is provided to prevent unauthorized copying of the Atmel® ATF22V10CZ/CQZ fuse patterns. Once programmed, fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible. The security fuse should be programmed last, as its effect is immediate. 7. Programming/Erasing Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming Hardware and Software Support for information on software/programming. Figure 7-1. Programming/Erasing Timing VRST POWER t PR REGISTERED OUTPUTS tW CLOCK tS Table 7-1. Parameter TPR VRST Programming/Erasing Description Power-up Reset Time Power-up Reset Voltage Typ 600 3.8 Max 1000 4.5 Units ns V 6 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z 8. Input and I/O Pull-ups All Atmel® ATF22V10CZ/CQZ family members have internal input and I/O pin-keeper circuits. Therefore, whenever inputs or I/Os are not being driven externally, they will maintain their last driven state. This ensures that all logic array inputs and device outputs are at known states. These are relatively weak active circuits that can be easily overridden by TTL-compatible drivers (see input and I/O diagrams below). Figure 8-1. Input Diagram VCC 100K INPUT ESD PROTECTION CIRCUIT Figure 8-2. I/O Diagram VCC OE DA A T VCC I/O INPUT 100K 7 0778L–PLD–8/10 9. Compiler Mode Selection Table 9-1. Compiler Mode Selection PAL Mode (5828 Fuses) Synario WINCUPL Atmel ATF22V10C (DIP) Atmel ATF22V10C (PLCC) P22V10 P22V10LCC GAL Mode (5892 Fuses) Atmel ATF22V10C DIP (UES) Atmel ATF22V10C PLCC (UES) G22V10 G22V10LCC 10. Functional Logic Diagram Description The Functional Logic Diagram describes the Atmel® ATF22V10CZ/CQZ architecture. The ATF22V10CZ/CQZ has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into one of four output configurations: active high/low, registered/combinatorial output.The universal architecture of the ATF22V10CZ/CQZ can be programmed to emulate most 24-pin PAL devices. Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse, when programmed, protects the contents of the ATF22V10CZ/CQZ. Eight bytes (64-fuses) of User Signature are accessible to the user for purposes such as storing project name, part number, revision or date. The User Signature is accessible regardless of the state of the security fuse. 8 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z Figure 10-1. Functional Logic Diagram 9 0778L–PLD–8/10 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 4.5 ATMEL ATF22V10CZ/CQZ STAND-BY ICC vs. SUPPLY VOLTAGE (TA = 25°C) NORMALIZED ICC NORMALIZED ICC VS. TEMP 1.4 1.2 1.0 0.8 0.6 0.4 -40.0 0.0 25.0 TEMPERATURE (C) 75.0 ICC (µA) 4.8 5.0 SUPPLY VOLTAGE (V) 5.3 5.5 140.000 120.000 ATMEL ATF22V10CZ SUPPLY CURRENT vs. INPUT FREQUENCY (VCC = 5.0V, TA = 25°C) 50.000 40.000 I CC (mA) 30.000 20.000 10.000 0.000 0.0 ATMEL ATF22V10CQZ SUPPLY CURRENT VS. INPUT FREQUENCY (VCC = 5V, TA = 25°C) 100.000 I CC (mA) 80.000 60.000 40.000 20.000 0.000 0.0 0.5 2.5 5.0 7.5 10.0 FREQUENCY (MHz) 25.0 37.5 50.0 0.5 2.5 5.0 7.5 10.0 FREQUENCY (MHz) 25.0 37.5 50.0 ATMEL ATF22V10CZ/CQZ OUTPUT SOURCE CURRENT VS SUPPLY VOLTAGE (VOH = 2.4V) 0 -10 I OH (mA) -20 -30 -40 -50 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 5.5 6.0 0.0 -10.0 -20.0 -30.0 ATMEL ATF22V10CZ/CQZ OUTPUT SOURCE CURRENT VS. OUTPUT VOLTAGE (VCC = 5V, TA = 25°C) I OH (mA) -40.0 -50.0 -60.0 -70.0 -80.0 -90.0 0.00 0.50 1.00 1.50 2.00 2.50 VOH (V) 3.00 3.50 4.00 4.50 5.00 ATMEL ATF22V10CZ/CQZ OUTPUT SINK CURRENT vs. SUPPLY VOLTAGE (VOL = 0.5V) 48 46 I OL (mA) ATMEL ATF22V10CZ/CQZ OUTPUT SINK CURRENT VS. SUPPLY VOLTAGE (VOL = 0.5V) 140.0 120.0 100.0 80.0 60.0 40.0 20.0 0.0 44 I OL (mA) 42 40 38 36 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 6.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 10 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z ATMEL ATF22V10CZ/CQZ INPUT CLAMP CURRENT VS INPUT VOLTAGE (VCC = 5V, TA = 35°C) INPUT CURRENT (mA) 0 ATMEL ATF22V10CZ/CQZ INPUT CURRENT VS INPUT VOLTAGE (VCC = 5V, TA = 25°C) 40 INPUT CURRENT (uA) -20 -40 -60 -80 -100 -120 0.0 -0.2 -0.4 -0.6 INPUT VOLTAGE (V) -0.8 -1.0 30 20 10 0 -10 -20 -30 0.0 1.0 2.0 3.0 4.0 INPUT VOLTAGE (V) 5.0 6.0 NORMALIZED TPD vs. VCC 1.2 NORMALIZED TPD 1.1 1.0 0.9 0.8 4.5 4.8 5.0 5.3 SUPPLY VOLTAGE (V) 5.5 1.1 NORMALIZED TPD NORMALIZED TPD vs. TEMP 1.0 0.9 0.8 -40.0 0.0 25.0 TEMPERATURE (C) 75.0 1.3 NORMALIZED TCO 1.2 1.1 1.0 0.9 0.8 4.5 NORMALIZED TCO vs. VCC 1.1 NORMALIZED TCO NORMALIZED TCO VS TEMP 1.0 0.9 0.8 4.8 5.0 SUPPLY VOLTAGE (V) 5.3 5.5 -40.0 0.0 25.0 75.0 TEMPERATURE (V) NORMALIZED TSU VS VCC 1.2 NORMALIZED TSU 1.1 1.0 0.9 0.8 4.5 4.8 5.0 SUPPLY VOLTAGE (V) 5.3 5.5 NORMALIZED TSU vs. TEMP 1.2 NORMALIZED TSU 1.1 1.0 0.9 0.8 -40.0 0.0 25.0 75.0 TEMPERATURE (C) 11 0778L–PLD–8/10 ATMEL ATF22V10C DELTA TPD vs. OUTPUT LOADING 8 8.00 7.00 ATMEL ATF22V10C DELTA TCO VS. OUTPUT LOADING DELTA TCO (ns) DELTA TPD (ns) 6 4 2 0 -2 6.00 5.00 4.00 3.00 2.00 1.00 0.00 0 50 100 150 200 250 300 50 100 150 200 250 300 OUTPUT LOADING (PF) NUMBER OF OUTPUTS LOADING DELTA TPD vs. # OF OUTPUT SWITCHING 0.0 DELTA TCO (ns) 0.0 -0.1 -0.1 -0.2 -0.2 -0.3 DELTA TCO vs. # OF OUTPUT SWITCHING DELTA TPD (ns) -0.1 -0.2 -0.3 -0.4 -0.5 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 NUMBER OF OUTPUTS SWITCHING 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 NUMBER OF OUTPUTS SWITCHING 12 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z 11. 11.1 Ordering Information Standard Package Options tPD (ns) tS (ns) tCO (ns) Ordering Code ATF22V10CZ-12JC ATF22V10CZ-12PC ATF22V10CZ-12SC ATF22V10CZ-12XC ATF22V10CZ-15JC ATF22V10CZ-15PC ATF22V10CZ-15SC ATF22V10CZ-15JI ATF22V10CZ-15PI ATF22V10CZ-15SI ATF22V10CQZ-20JC ATF22V10CQZ-20PC ATF22V10CQZ-20SC ATF22V10CQZ-20XC ATF22V10CQZ-20JI ATF22V10CQZ-20PI ATF22V10CQZ-20SI ATF22V10CQZ-20XI Package 28J 24P3 24S 24X 28J 24P3 24S 28J 24P3 24S 28J 24P3 24S 24X 28J 24P3 24S 24X Operation Range Commercial (0⋅C to 70⋅C) Commercial (0⋅C to 70⋅C) Industrial (-40⋅C to +85⋅C) Commercial (0⋅C to 70⋅C) 12 10 8 15 10 8 20 14 12 Industrial (-40⋅C to +85⋅C) Note: Shaded parts are being obsoleted and are not recommended for new designs. Customers should transition to ROHS offering 11.2 Atmel ATF22V10CQZ Green Package Options (Pb/Halide-free/RoHS Compliant) tPD (ns) tS (ns) tCO (ns) Ordering Code ATF22V10CQZ-20JU ATF22V10CQZ-20PU ATF22V10CQZ-20SU ATF22V10CQZ-20XU Package 28J 24P3 24S 24X Operation Range Industrial (-40⋅C to +85⋅C) 20 14 12 11.3 Using “C” Product for Industrial To use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to the “C” device (7ns “C” = 10ns “I”) and de-rate power by 30%. Package Type 28J 24P3 24S 24X 28-lead, Plastic J-leaded Chip Carrier (PLCC) 24-pin, 0.300", Plastic Dual Inline Package (PDIP) 24-lead, 0.300" Wide, Plastic Gull-Wing Small Outline (SOIC) 24-lead, 4.4mm Wide, Plastic Thin Shrink Small Outline (TSSOP) 13 0778L–PLD–8/10 12. 12.1 Packaging Information 28J – PLCC 1.14(0.045) X 45° PIN NO. 1 IDENTIFIER 1.14(0.045) X 45° 0.318(0.0125) 0.191(0.0075) E1 B E B1 D2/E2 e D1 D A A2 A1 0.51(0.020)MAX 45° MAX (3X) COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL A A1 A2 D D1 E Notes: 1. This package conforms to JEDEC reference MS-018, Variation AB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102mm) maximum. E1 D2/E2 B B1 e MIN 4.191 2.286 0.508 12.319 11.430 12.319 11.430 9.906 0.660 0.330 NOM – – – – – – – – – – 1.270 TYP MAX 4.572 3.048 – 12.573 11.582 12.573 11.582 10.922 0.813 0.533 Note 2 Note 2 NOTE 10/04/01 Package Drawing Contact: packagedrawings@atmel.com TITLE 28J, 28-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING NO. 28J REV. B 14 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z 12.2 24P3 – PDIP D PIN 1 E1 A SEATING PLANE L B1 e E B A1 C eC eB SYMBOL A A1 D E E1 B Notes: 1. 2. This package conforms to JEDEC reference MS-001, Variation AF. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25mm (0.010"). B1 L C eB eC e COMMON DIMENSIONS (Unit of Measure = mm) MIN – 0.381 31.623 7.620 6.096 0.356 1.270 2.921 0.203 – 0.000 NOM – – – – – – – – – – – MAX 5.334 – 32.131 8.255 7.112 0.559 1.651 3.810 0.356 10.922 1.524 Note 2 Note 2 NOTE 2.540 TYP 6/1/04 Package Drawing Contact: packagedrawings@atmel.com TITLE 24P3, 24-lead (0.300"/7.62mm Wide) Plastic Dual Inline Package (PDIP) DRAWING NO. 24P3 REV. D 15 0778L–PLD–8/10 12.3 24S – SOIC B D1 PIN 1 ID PIN 1 D e E A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN – 0.10 10.00 7.40 15.20 0.33 0.40 0.23 NOM – – – – – – – – 1.27 BSC MAX 2.65 0.30 10.65 7.60 15.60 0.51 1.27 0.32 NOTE A1 A A1 D D1 0 8 L1 E B L L L1 e 06/17/2002 Package Drawing Contact: packagedrawings@atmel.com TITLE 24S, 24-lead (0.300" body) Plastic Gull Wing Small Outline (SOIC) DRAWING NO. 24S REV. B 16 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Atmel ATF22V10C(Q)Z 12.4 24X – TSSOP Dimensions in Millimeter and (Inches)* JEDEC STANDARD MO-153 AD Controlling dimension: millimeters 0.30(0.012) 0.19(0.007) 4.48(0.176) 4.30(0.169) 6.50(0.256) 6.25(0.246) PIN 1 0.65(0.0256)BSC 7.90(0.311) 7.70(0.303) 1.20(0.047)MAX 0.15(0.006) 0.05(0.002) 0 8 0.20(0.008) 0.09(0.004) 0.75(0.030) 0.45(0.018) 04/11/2001 Package Drawing Contact: packagedrawings@atmel.com TITLE 24X, 24-lead (4.4mm body width) Plastic Thin Shrink Small Outline Package (TSSOP) DRAWING NO. 24X REV. A 17 0778L–PLD–8/10 13. Revision History Doc. Rev. 0778L 0778K Date 08/2010 07/2010 Comments Change tS (ns) from 4.5 to 10 in Standard Package Options Remove Commercial Temperature Range For ISB, change 25µA Max to 100µA max for commercial grade parts and 50µA Max to 120µA for Industrial grade parts Shade Standard Package Options and add note, “Shaded parts are not recommended for new designs. Customers should transition to ROHS offering” Remove Atmel ATF22V10CZ-15XC and Atmel ATF22V10CZ-15XI from Standard Package Options Add Green Package options 0778J 11/2005 18 Atmel ATF22V10C(Q)Z 0778L–PLD–8/10 Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com International Atmel Asia Limited Unit 01-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81) 3-3523-3551 Fax: (+81) 3-3523-7581 Product Contact Technical Support pld@atmel.com Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. 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