Features
• Utilizes the AVR® RISC Architecture • AVR - High-performance and Low-power RISC Architecture
– 118 Powerful Instructions - Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 1MIPS Throughput at 1MHz Data and Nonvolatile Program Memory – 2K Bytes of In-System Programmable Flash Endurance 1,000 Write/Erase Cycles – 128 Bytes of internal SRAM – 128 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial Interface for In-System Programming Special Microcontroller Features – Low-power Idle and Power Down Modes – External and Internal Interrupt Sources – Power-on Reset Circuit – On-chip RC Oscillator Specifications – Low-power, High-speed CMOS Process Technology – Fully Static Operation Power Consumption at 3V, 25°C – Active: 1.5 mA – Idle Mode: 100 µA – Power Down Mode:
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