AVR125

AVR125: ADC of tinyAVR in Single Ended Mode Features • • • • • Up to 10bit resolution Up to 15kSPS Auto triggered and single conversion mode Optional left adjustment for ADC result readout Driver source code included for ATtiny88 - ATtiny88 ADC in Single Conversion Mode - ATtiny88 ADC in free running mode - ATtiny88 ADC for temperature measurement - ATtiny88 ADC for bandgap measurement 8-bit Microcontrollers Application Note 1 Introduction ATtiny devices have a successive approximation Analog-to-Digital Converter (ADC) capable of conversion rates up to 15kSPS with a resolution of 10 bits. It features a flexible multiplexer, which allows the ADC to measure the voltage at multiple single ended input pins and two internal channel from internal temperature sensor and bandgap reference in the device. Single ended input channels are referred to ground. This application note describes the basic functionality of the ADC in Atmel® tinyAVR® devices in Single ended mode with code examples on Atmel ATtiny88 to get started. The code examples are written in assembly language and C language. Rev. 8352A-AVR-01/12 2 Module overview This section provides an overview of the functionality and basic configuration options of the ADC. Section 3 then walks you through the basic steps to get you up and running, with register descriptions and configuration details. 2.1 ADC operation To make use of the ADC, the PRADC bit in the Power Reduction Register must be disabled. This is done by clearing the PRADC bit. ADC module must be disabled before disabling in PRR. The ADC module converts the analog input voltage to a 10bit digital value. The minimum value represents GND and maximum value denotes the reference voltage used. The Reference voltage is chosen by the REFS0 bit in the ADMUX register. The possible reference voltages are internal 1.1V and AVcc. The analog input channel for conversion is selected by the bits in the ADMUX register. This includes the ADC input pins along with internal voltage from temperature sensor, GND and fixed bandgap reference voltage. To enable the ADC, ADEN bit in the ADCSRA register must be set. The channels selected for conversion will not go into effect until this ADEN bit is set. Before entering Sleep mode, the ADC module can be disabled by clearing ADEN bit. This reduces the power consumption caused by ADC. The 10-bit digital value after conversion is stored in ADCH and ADCL. ADCH holds the higher byte and ADCL holds the lower byte. Optionally left adjustment of the result can be done by setting the ADLAR bit in the ADMUX register if necessary. If ADLAR is enabled and the application needs only 8 bit accuracy then ADCH alone can be read. Otherwise ADCL must be read first followed by ADCH, to ensure that the content of the Data Registers belong to the same conversion. Access to ADC is blocked, once ADCL is read. It is re-enabled only after ADCH is read. ADC module owns one interrupt which is triggered once a conversion is complete. If an interrupt occurs between reading ADCL and ADCH, it will get triggered and the result will be lost. 2 AVR125 8352A-AVR-01/12 AVR125 Figure 2-1. Analog to digital converter block schematic operation. ADC CONVERSION COMPLETE IRQ 8-BIT DATA BUS ADIF ADIE 15 ADC DATA REGISTER (ADCH/ADCL) ADPS0 ADC[9:0] 0 ADC MULTIPLEXER SELECT (ADMUX) ADLAR MUX3 REFS0 MUX2 MUX1 MUX0 ADC CTRL. & STATUS REGISTER (ADCSRA) ADPS2 ADPS1 ADEN ADSC ADFR MUX DECODER PRESCALER CHANNEL SELECTION ADIF CONVERSION LOGIC AVCC INTERNAL 1.1V REFERENCE 10-BIT DAC SAMPLE & HOLD COMPARATOR + GND BANDGAP REFERENCE TEMPERATURE SENSOR ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 INPUT MUX ADC MULTIPLEXER OUTPUT 2.2 Input sources The input sources for the ADC are the analog voltage inputs that the ADC can measure and convert. Two types of measurements can be selected: • Single ended input • Internal input 3 8352A-AVR-01/12 2.2.1 Single ended input For single ended measurements all analog input pins can be used as inputs. All single ended channels are referred to GND. The analog input voltages cannot be more then the reference voltage selected for ADC. 2.2.2 Internal inputs Two internal analog signals can be selected as input and measured by the ADC. • Temperature sensor • Bandgap voltage The voltage output from an internal temperature reference can be measured with the ADC and the voltage output will give an ADC result presenting the current temperature in the microcontroller. The bandgap voltage is an accurate voltage reference inside the microcontroller that is the source for other internal voltage reference. 2.3 Starting a conversion In single conversion mode, for starting a conversion, the ADSC bit in the ADCSRA register must be written a logical one. This bit remains at high logic till the conversion is complete and is cleared by the hardware, once the conversion is complete. In auto triggered mode, conversion is triggered automatically by various sources. To enable auto triggering, the ADATE bit in the ADCSRA register must be set. The source of trigger can be selected with the help of ADC Trigger Select bits, ADTS in ADCSRB. The Interrupt Flag will be set even if the specific interrupt or global interrupts are disabled. Thus a conversion can be triggered using ADIF flag without causing an interrupt. The ADC then operates in Free Running mode, in which next conversion is triggered once the previous conversion completes and sets the ADIF. Note that ADIF must be cleared manually in order to trigger at next interrupt event in auto triggered mode. For free running mode, the ADC will perform successive conversions independent of whether ADIF is cleared or not. The first conversion must be started by setting ADSC bit. 2.4 ADC clock and conversion timing The ADC can prescale the system clock to provide an ADC clock that is between 50kHz and 200kHz to get maximum resolution. It is not recommended to use ADC clock with a frequency higher than 1MHz. If ADC resolution of less than 10 bits required, then the ADC clock frequency can be higher than 200kHz. The prescalar value is selected with ADPS bits in ADCSRA. At 1MHz we can expect maximum 8 bits of resolution. When initiating a single ended conversion by setting the ADSC bit in ADCSRA, the conversion starts at the following rising edge of the ADC clock cycle. A normal conversion takes 13 ADC clock cycles. The first conversion after the ADC is switched on (ADEN in ADCSRA is set) takes 25 ADC clock cycles in order to initialize the analog circuitry. 4 AVR125 8352A-AVR-01/12 AVR125 2.5 Changing channel or reference selection Bits MUXn and REFS0 in the ADMUX register are single buffered through a temporary register to which CPU has random access. If Auto Triggering is used, then ADMUX can be safely updated: • When ADATE or ADEN is cleared • During conversion, minimum one ADC clock cycle after the trigger event • After a conversion, before the Interrupt Flag used as trigger source is cleared In these ways, the new settings will affect the next ADC conversion. In single conversion mode, the channel must be selected before starting the conversion. The channel can be changed one clock cycle after setting ADSC bit, but it is better to wait till the conversion completes and then change the channel. In Free running mode, select the channel before starting the first conversion. It can be changed one clock cycle after setting ADSC bit. It is better to wait till first conversion is complete and then change the channel selection. But since the next conversion has already started automatically, the changes will be reflected in the next following conversion. 2.6 ADC noise canceller The Atmel ATtiny ADC has a noise canceller that enables conversion during sleep mode which reduces the noise induced from CPU core and other peripherals. This feature is available in ADC Noise Reduction and Idle mode. • Make sure that the ADC is enabled and is not busy converting. Single Conversion mode must be selected and the ADC conversion complete interrupt must be enabled • Enter ADC Noise Reduction mode (or idle mode). The ADC will start a conversion once the CPU has been halted • If no other interrupts occur before the ADC conversion completes, the ADC interrupt will wake up the CPU and execute the ADC Conversion Complete interrupt routine. If another interrupt wakes up the CPU before the ADC conversion is complete, that interrupt will be executed, and an ADC Conversion Complete interrupt request will be generated when the ADC conversion completes. The CPU will remain in active mode until a new sleep command is executed 2.7 Conversion result Once the ADC completes conversion, the 10 bit result will be available in the ADCH and ADCL registers and ADC Interrupt Flag will be set. For single conversion, the result is: ADC = V IN .1024 REF V where VIN represents analog input voltage and VREF represents the selected reference voltage. 0x000 represents GND and 0x3FF represents the reference voltage minus one LSB. 5 8352A-AVR-01/12 2.8 Temperature measurement The temperature measurement is done by an on chip temperature sensor. It is internally coupled to ADC input channel 8. Internal 1.1V reference must be selected for temperature measurement and ADC8 must be selected with MUX3:0 bits in ADMUX register as “1000”. The temperature sensor has an approximate sensitivity of 1 LSB/˚C and the accuracy depends on the method of user calibration. Using single temperature calibration, the measurement accuracy is ±10˚C, assuming calibration at room temperature. Better accuracies are achieved by using two temperature points for calibration. Table 2-1. Temperature vs. sensor output volyage (typical case). Temperature ADC -40°C 230 LSB +25°C 300 LSB +85°C 370 LSB The values depicted are typical values. More accurate results can be achieved with software calibration using the formula: T = k * [ (ADCH