Features
• • • • • •
35 dBm Output Power in CW Mode High Power Added Efficiency (PAE) Single Supply Operation (No Negative Rail) Simple Analog Power Ramp Control Low Current Consumption in Power-down Mode (Typically ≤15 µA) Small SMD Package (PSSOP28 with Heat Slug)
Applications
• • • •
Professional Phones Hands-free Sets ISM Band Application Wireless Infrastructure Preamplifiers
Description
The T0905 is a monolithic integrated power amplifier IC manufactured with Atmel’s Silicon-Germanium (SiGe) process. Due to its open architecture, the device can be used either as a two or three-stage amplifier. Every stage can be matched individually, thus allowing applications in a wide frequency range. The T0905 can be used from 135 MHz up to 600 MHz in both linear and non-linear (saturated) mode. The power gain can be set dynamically by means of an analog control input optionally for each single stage or for the entire power amplifier. Constant gain mode is also possible. The T0905 is suited for CW mode up to 35 dBm. These features, including wide power ramp control, make the T0905 a very flexible power amplifier for many different applications. Apart from telephone applications, the T0905 can also be used for car identification systems and several other wireless communication systems. The single supply voltage operation at +3.5 V and a negligible leakage current in power-down mode enable a remarkable simplification of the application’s power management. Figure 1. Block Diagram
VCTL1
Generalpurpose VHF/UHF Power Amplifier (135 to 600 MHz) T0905 Preliminary
GAIN1 16
VCTL2 GAIN2
VCTL3 GAIN3 15
Buf3
13
14
Buf2
17
18 19 VBIAS3
11 BGOUT VCTL VCC_CTL 12 10
BG
Buf1
9 8 20
VBIAS2 VB2_DC VB3_DC RFOUT/VCC3
7 RFIN1 21 GND3
Match RF1 Match RF2 Match RF3
22-25
6
5
4
3
28
27 VB3
26 GND3
GND1 VCC1 GND2 VCC2 RFIN2
Rev. 4751D–SIGE–05/04
Pin Configuration
Figure 2. Pinning PSSOP28
NC GND2 GND2 RFin2 VCC1 GND1 RFIN1 VB2_DC VBIAS2 VCC_CTL BGOUT VCTL VCTL1 VCTL2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC2 VB3 GND3 RFOUT/VCC3 RFOUT/VCC3 RFOUT/VCC3 RFOUT/VCC3 GND3 VB3_DC VBIAS3 GAIN3 GAIN2 GAIN1 VCTL3
Pin Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol NC GND2 GND2 RFIN2 VCC1 GND1 RFIN1 VB2_DC VBIAS2 VCC_CTL BGOUT VCTL VCTL1 VCTL2 VCTL3 GAIN1 GAIN2 GAIN3 VBIAS3 VB3_DC GND3 RFOUT/VCC3 RFOUT/VCC3 RFOUT/VCC3 Function Not connected Ground Ground RF input (2-stage operation) Supply voltage, first stage Ground RF input (3-stage operation) Input for gain setting, second stage Output Buf2 Supply voltage control block Output band gap Control voltage input Control voltage input, first stage Control voltage input, second stage Control voltage input, third stage Gain setting Buf1 Gain setting Buf2 Gain setting Buf3 Output Buf3 Input for gain setting, third stage Ground RF output/supply voltage, third stage RF output/supply voltage, third stage RF output/supply voltage, third stage
2
T0905 [Preliminary]
4751D–SIGE–05/04
T0905 [Preliminary]
Pin Description (Continued)
Pin 25 26 27 28 Symbol RFOUT/VCC3 GND3 VB3 VCC2 Function RF output/supply voltage, third stage Ground Pin to extend the input capacity of stage 3 Supply voltage second stage
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Supply voltage VCC, no RF Input power Gain control voltage(1) Operating case temperature Storage temperature Maximum output power Note: Symbol VCC1, VCC2, VCC3 PRFin Vctl Tc Tstg PRFout Value 0 to +5.5 10 0 to +2.5 -40 to 100 -40 to +150 36 Unit V dBm V °C °C dBm
1. The part may not survive all maximums applied simultaneously
Thermal Resistance
Parameters Junction case Symbol RthJC Value 19 Unit K/W
Operating Range
All voltages are referred to GND
Parameters Supply voltage Ambient temperature Input frequency Symbol VCC Tamb fRfin Value 2.7 to 5.0 -40 to +85 135 to 600 Unit V °C MHz
3
4751D–SIGE–05/04
Electrical Characteristics
Test conditions (if not otherwise specified): VCC = +3.5 V, Tamb = +25°C, 50 Ω input and 50 Ω output match
No. 1 1.1 2 2.1 Parameters Power Supply Current consumption power down mode (leakage current) Frequency range Output power normal conditions VCC = 3.5 V Tamb = +25°C PRFin = 3 dBm RL = RG = 50 Ω VCC = 2.4 V Tamb = +85°C PRFin = 3 dBm RL = RG = 50 Ω VCC = 3.5 V PRFout = 35.0 dBm PRFout = 35 dBm PRFin = 0 to 8 dBm PRFout = 31.0 dBm PRFout = 31.0 dBm VCC = 4.6 V Vctlx ≤0.2 V 10, 22 25, 28 I 15 25 µA A Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
150-MHz Amplifier Mode fRfin150 22 - 25 PRFout150 135 178 MHz C
2.2
34.0
35.0
dBm
C
2.3
Extreme conditions
22 - 25
PRFout150 PRFin150 PAE150 I150 VSWR150 VSWR150 2fo150 3fo150 4fo..8fo150 PRFout150
32.0
33.0
dBm
C
2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11
Input power Power added efficiency Current consumption active mode Input VSWR Stability/load mismatch 2nd harmonic distortion 3rd harmonic distortion 4th to 8th harmonic distortion Isolation between input and output PRfin150 = 8 dBm Vctl ≤0.2 V (power down)
4 10, 22 25, 28 10, 22 25, 28 4 22 - 25 22 - 25 22 - 25 22 - 25 4, 22 - 25
3 50 55 1.64
10
dBm % A
C C C C C
2:1 8:1 -35 -35 -35 dBc dBc dBc
C C C
2.12 3 3.1
-30
dBm
C
450-MHz Amplifier Mode Frequency range Output power normal conditions VCC = 3.5 V Tamb = +25°C PRFin = 3 dBm RL = RG = 50 Ω VCC = 2.4 V Tamb = +85°C PRFin = 3 dBm RL = RG = 50 Ω fRfin450 22 - 25 PRFout450 380 520 MHz A
3.2
34.0
35.0
dBm
A
3.3
Extreme conditions
22 - 25
PRFout450 PRFin450
32.0
33.0
dBm
C
3.4
Input power
4
3
10
dBm
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
4
T0905 [Preliminary]
4751D–SIGE–05/04
T0905 [Preliminary]
Electrical Characteristics (Continued)
Test conditions (if not otherwise specified): VCC = +3.5 V, Tamb = +25°C, 50 Ω input and 50 Ω output match
No. 3.5 3.6 3.7 3.8 3.9 3.10 3.11 Parameters Power added efficiency Current consumption active mode Input VSWR Stability/load mismatch 2nd harmonic distortion 3rd harmonic distortion 4th to 8th harmonic distortion Isolation between input and output Power Control Control curve slope Power control range Control voltage range Control current PRFin = 0 to 8 dBm Vctl = 0 to 2.0 V PRFout ≥ 5 dBm PRFout ≥ 25 dBm Vctl = 0 to 2.5 V 22 - 25 22 - 25 12 - 14 12 - 14 Sctl Gctl Vctl Ictll 60 0.5 2.0 200 300 120 350 150 dB/V dB/V dB V µA C C C A PRfin150 = 8 dBm Vctl ≤0.2 V (power down) Test Conditions VCC = 3.5 V PRFout = 35.0 dBm PRFout = 35 dBm PAE = 55% PRfin450 = 0 to 8 dBm PRFout = 31.0 dBm PRFout450 = 31.0 dBm VCC = 4.6 V Pin 10, 22 25, 28 10, 22 25, 28 4 22 - 25 22 - 25 22 - 25 22 - 25 4, 22 - 25 Symbol PAE450 I450 VSWR450 VSWR450 2fo450 3fo450 4fo..8fo450 PRFout450 Min. 50 Typ. 55 1.64 2:1 8:1 -35 -35 -35 dBc dBc dBc Max. Unit % A Type* A A C C A A C
3.12 4 4.1 4.2 4.3 4.4
-30
dBm
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
5
4751D–SIGE–05/04
Figure 3. Application Example for 450-MHz PA with Variable Gain
VCTL R3 VCTL1 13 GAIN1 VCTL2 16 14 R7 GAIN2 VCTL3 17 15 R11 GAIN3 18 19 Buf3 9 BG 8 20 7 22-25 Match RF1 Match RF2 28 VCC2
MS6
R14
BGOUT C4
11
Buf1
Buf2
VBIAS3
VCTL 12
VBIAS2 VB2_DC L1 VB3_DC MS3 RFOUT/ VCC3 L3 C24 R13 L5 L13 L8 MS4 C20 C21 C8 RFOUT C7 C19 C1 L2 C2
C5 VCC_CTL 10 VCC_CTL C18 L9 RFIN L4 21 GND3 C3 MS5 RFIN1
Match
RF3 27 VB3 26 GND3
6 GND1
5
4
3
GND2 VCC1 RFin2 MS7
MS1
Micro strip lines length/mm width/mm MS1 2.5 1 MS2 2 1 MS3 2.5 1.6 MS4 5 0.43 MS5 4 0.43 MS6 3 0.63 MS7 2 0.3 MS8 2 0.3 MS9 4 0.63 Board material: Epsilon(r): 4.3; metal Cu: 35 µm; distance 1. layer - RF ground: 240 µm
MS8
C28
MS9
C26
MS2
R15
L7
C27
C14
L10
C11
L11
C17
C12 C16
C13
C9
C10
C15
VCC1
VCC2
VCC3
6
T0905 [Preliminary]
4751D–SIGE–05/04
T0905 [Preliminary]
Figure 4. Recommended Package Footprint Extract from the PCB Showing a Part of the Core Application (Without Components)
• • • •
Only ground signal traces are recommended directly under the package. Maximum density of ground vias guarantees an optimum connection of the ground layers and the best diversion of the heat. Heat slug must be soldered to GND. Plugging of the ground vias under the heat slug is recommended to avoid soldering problems.
7
4751D–SIGE–05/04
Ordering Information
Extended Type Number T0905-TSPH Package PSSOP28 Remarks Lead-free
Package Information
Package PSSOP28
Dimensions in mm
9.98 9.80 1.60 1.45 0.25 0.64 8.32 28 15 0.10 0.00 3.91 6.02
0.2
2.21 1.80
technical drawings according to DIN specifications
1
7.29 6.88
14
8
T0905 [Preliminary]
4751D–SIGE–05/04
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4751D–SIGE–05/04