T7026-PGP

Features • • • • • • • • Single 3-V Supply Voltage High-power-added Efficient Power Amplifier (Pout Typically 28 dBm) Ramp-controlled Output Power Low-noise Preamplifier (NF Typically 2.1 dB) Biasing for External PIN Diode T/R Switch Current-saving Standby Mode Few External Components Package: QFN20 ISM 2.4 GHz Front End IC T7026 1. Description The T7026 is a monolithic SiGe transmit/receive front-end IC with power amplifier, low-noise amplifier and T/R switch driver. It is especially designed for operation in TDMA systems like DECT, IEEE 802.11 FHSS WLAN, home RF and ISM proprietary radios. Due to the ramp-control feature and a very low quiescent current, an external switch transistor for VS is not required. Electrostatic sensitive device. Observe precautions for handling. Figure 1-1. Block Diagram LNA_OUT RX_ON V2_PA V2_PA V1_PA RAMP GND PA_IN GND TX/RX standby control TX PU GND LNA PA SiGe FE T7026 SWITCH_OUT_RX SWITCH_OUT_TX R_SWITCH GND V3_PA_OUT V3_PA_OUT V3_PA_OUT VS_LNA LNA_IN Rev. 4563E–ISM–07/05 2. Pin Configuration Figure 2-1. Pinning QFN20 V3_PA_OUT V3_PA_OUT V3_PA_OUT GND_LNA2 LNA_IN 10 9 8 7 6 5 4 V2_PA V2_PA GND V1_PA NC 11 12 13 14 15 16 17 18 19 20 T7026 3 2 1 GND_LNA1 SWITCH_OUT_TX SWITCH_OUT_RX R_SWITCH RX_ON Figure 2-2. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Slug Pin Description Symbol RX_ON R_SWITCH SWITCH_OUT_RX SWITCH_OUT_TX GND_LNA1 LNA_IN GND_LNA2 V3_PA_OUT V3_PA_OUT V3_PA_OUT V2_PA V2_PA GND V1_PA NC RAMP PA_IN VS_LNA LNA_OUT PU GND Function RX active high Resistor to GND sets the PIN diode current Switched current output for PIN diode (active in RX mode) Switched current output for PIN diode (active in TX mode) Ground Low-noise amplifier input Ground Inductor to power supply and matching network for power amplifier output Inductor to power supply and matching network for power amplifier output Inductor to power supply and matching network for power amplifier output Inductor to power supply for power amplifier Inductor to power supply for power amplifier Ground Supply voltage for power amplifier Not connected Power ramping control input Power amplifier input Supply voltage input for low-noise amplifier Low-noise amplifier output Power-up active high Ground 2 T7026 4563E–ISM–07/05 RAMP PA_IN VS_LNA LNA_OUT PU T7026 3. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. All voltages are referred to ground (pins GND and slug) Parameters Supply voltage Pins VS_LNA, V1_PA, V2_PA and V3_PA_OUT, no RF Junction temperature Storage temperature RF input power LNA RF input power PA Symbol VS Tj Tstg PinLNA PinPA Value 5 150 –40 to +125 5 10 Unit V °C °C dBm dBm 4. Thermal Resistance Parameters Junction ambient QFN20, slug soldered on PCB Symbol RthJA Value 27 Unit K/W 5. Operating Range All voltages are referred to ground (pins GND and slug). Power supply points are VS_LNA, V1_PA, V2_PA, V3_PA_OUT. The following table represents the sum of all supply currents depending on the TX/RX mode. Parameters Supply voltage Pins V1_PA, V2_PA and V3_PA_OUT Supply voltage Pin VS_LNA Supply current TX RX Standby current PU = 0 Ambient temperature Symbol VS VS IS IS IS Tamb –25 Min. 2.7 2.7 Typ. 3.6 3.0 470 8 10 +25 +70 Max. 4.6 5.5 Unit V V mA mA µA °C 3 4563E–ISM–07/05 6. Electrical Characteristics Test conditions (unless otherwise specified): VS = 3.6 V, Tamb = 25°C Parameters Power Amplifier Supply voltage Supply current Standby current Frequency range Gain-control range Power gain maximum Power gain minimum Ramping voltage maximum Ramping voltage minimum Ramping current maximum Power-added efficiency Saturated output power Input matching(2) Output matching(2) Harmonics at P 1dBCP Harmonics at P 1dBCP (1) Test Conditions Pins V1_PA, V2_PA and V3_PA_OUT TX RX (PA off), VRAMP ≤ 0.1 V Standby for VRAMP ≤ 0.1 V TX TX TX Pin PA_IN to V3_PA_OUT TX, power gain (max), pin RAMP TX, power gain (min), pin RAMP TX, VRAMP = 1.75 V, pin RAMP TX TX, input power = 0 dBm referred to pins V3_PA_OUT TX pin PA_IN TX pins V3_PA_OUT TX pins V3_PA_OUT TX pins V3_PA_OUT Standby, pin SWITCH_OUT RX TX at 100 Ω TX at 1.2 kΩ TX at 33 kΩ TX at R switch open Symbol Min. Typ. Max. Unit VS IS_TX IS_RX IS_standby f ∆Gp Gp Gp VRAMP max VRAMP min IRAMP max PAE Psat Load VSWR Load VSWR 2 fo 3 fo IS_O_standby IS_O_RX IS_O_100 IS_O_1k2 IS_O_33k IS_O_R 2.7 3.6 470 4.6 V mA 10 10 2.4 60 28 –40 1.6 1.65 1 0.1 33 27 37 28 < 1.5:1 < 1.5:1 –30 –30 1 1 1.7 7 17 19 7 29 42 33 34 –17 1.7 2.5 µA µA GHz dB dB dB V V mA % dBm dBc dBc µA µA mA mA mA mA mA V mA mA µA T/R-switch Driver (Current Programming by External Resistor from R_SWITCH to GND) Switch-out current output I_Switch_Out_RX maximum Low-noise Amplifier Supply voltage Supply current Supply current (LNA and control logic) Standby current (3) All, pin VS_LNA RX TX (control logic active) pin VS_LNA Standby, pin VS_LNA VS IS IS IS_standby 2.7 3.0 8 5 10 0.5 1 10 Frequency range RX f 2.4 2.5 GHz Notes: 1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true cw operation, maximum load mismatch and duration: VSWR = 8:1 (all phases) 10 s, ZG = 50 Ω, VS = 3.6 V. 2. With external matching network, load impedance 50 Ω. 3. Low-noise amplifier shall be unconditionally stable. 4. With external matching components. 4 T7026 4563E–ISM–07/05 T7026 6. Electrical Characteristics (Continued) Test conditions (unless otherwise specified): VS = 3.6 V, Tamb = 25°C Parameters Power gain Noise figure Gain compression Third-order input interception point Input matching (4) (4) Test Conditions RX, pin LNA_IN to LNA_OUT RX RX, referred to pin LNA_OUT RX RX, pin LNA_IN RX, pin LNA_OUT = 1, pins RX_ON and PU =0 = 1, ViH = 2.4 V Symbol Gp NF O1dB IIP3 VSWRin VSWRout ViH ViL IiH Min. 15 –9 –16 Typ. 16 2.1 –7 –14 < 2:1 < 2:1 Max. 19 2.3 –6 –13 Unit dB dB dBm dBm Output matching High input level Low input level Logic Input Levels (RX_ON, PU) 2.4 0 40 VS, LNA 0.5 60 V V µA High input current 0.2 µA Low input current =0 IiL Notes: 1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true cw operation, maximum load mismatch and duration: VSWR = 8:1 (all phases) 10 s, ZG = 50 Ω, VS = 3.6 V. 2. With external matching network, load impedance 50 Ω. 3. Low-noise amplifier shall be unconditionally stable. 4. With external matching components. 7. Control Logic for LNA and T/R-switch Driver Operation Mode Standby TX RX PU 0 1 1 RX_ON 0 0 1 5 4563E–ISM–07/05 8. Input/Output Circuits Figure 8-1. Internal Circuitry; PA_IN, V1_PA V1_PA PA_IN GND Figure 8-2. Internal Circuitry; RAMP, V1_PA V1_PA RAMP Figure 8-3. Internal Circuitry V2_PA V2_PA GND 6 T7026 4563E–ISM–07/05 T7026 Figure 8-4. Internal Circuitry V3_PA_OUT V3_PA_OUT GND Figure 8-5. Internal Circuitry SWITCH_OUT_RX, SWITCH_OUT_TX, R_SWITCH, V1_PA V1_PA SWITCH_OUT_RX/ SWITCH_OUT_TX R_SWITCH GND Figure 8-6. Internal Circuitry LNA_IN, VS_LNA VS_LNA LNA_IN GND 7 4563E–ISM–07/05 Figure 8-7. Internal Circuitry PU, RX_ON, VS_LNA VS_LNA RX_ON/ PU Figure 8-8. Internal Circuitry LNA_OUT, VS_LNA VS_LNA LNA_OUT GND 8 T7026 4563E–ISM–07/05 T7026 9. Ordering Information Extended Type Number T7026-PGQ T7026-PGP T7026-PGQW T7026-PGPW Package QFN20 QFN20 QFN20, Pb-free, halogen-free QFN20, Pb-free, halogen-free Remarks Taped and reeled Taped and reeled Taped and reeled Taped and reeled MOQ 6,000 1,500 6,000 1,500 10. Package Information 9 4563E–ISM–07/05 A tmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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