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U2102B

U2102B

  • 厂商:

    ATMEL(爱特梅尔)

  • 封装:

  • 描述:

    U2102B - Multifunction Timer IC - ATMEL Corporation

  • 数据手册
  • 价格&库存
U2102B 数据手册
Features • Integrated Reverse Phase Control • Mode Selection: – Zero-voltage Switch with Static Output – Two-stage Reverse Phase Control with Switch-off – Two-stage Reverse Phase Control with Dimming Function Current Monitoring: – High-speed Short-circuit Monitoring with Output – High-current Monitoring with Integrating Buffer Integrated Chip Temperature Monitoring Adjustable and Retriggerable Tracking Time External Window Adjustment for Sensor Input Enable Input for Triggering • • • • • Multifunction Timer IC U2102B Applications • • • • • • Two- or Three-wire Applications Motion Detectors Time-delay Relays Dimmers Reverse Phase Controls Timers 1. Description The timer control circuit U2102B is based on bipolar technology. The output stage can switch either a MOSFET or an IGBT. Two sensor inputs and the retriggerable and adjustable tracking time useful for a wide range of applications. By using the reverse phase-control technique, the resistive load can be dimmed without the need of a compensation inductance. The integrated current monitoring function provides a very fast switch-off in case of a short-circuit condition. No additional fuse is needed. Rev. 4767B–INDCO–10/05 Figure 1-1. Block Diagram 1 VRef Voltage monitoring 16 Synchronization 2 3 4 Reverse phase control 15 Voltage limitation 13 5 RC oscillator Control Divider logic Push pull 14 12 6 Programing Current monitoring 11 Triggering with buffers 7 8 9 Temperature monitoring Test logic 10 2 U2102B 4767B–INDCO–10/05 U2102B 2. Pin Configuration Figure 2-1. Pinning DIP16/SO16 VREF 1 CRAMP 2 RRAMP 3 CONTROL OSC PROG EN TRIGGER 4 16 SYNC 15 14 13 +VS VO GND IOFF II TEST V9 U2102B 5 6 7 8 12 11 10 9 Pin Description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol VREF CRAMP RRAMP CONTROL OSC PROG EN TRIGGER V9 TEST II IOFF GND VO +VS SYNC Function Reference voltage 5 V Ramp capacitance Current setting for ramp Control voltage RC oscillator Tri-state programming Enable input Trigger input (window) Window adjustment Test output Input current monitoring Fast output current monitoring Ground Output voltage Supply voltage Synchronization input 3 4767B–INDCO–10/05 Figure 2-2. 4 R1 33 kΩ/2 W Vmains 230 V ~ 68 kΩ Load 47 µF/25 V C1 14 3 Phase + 4 12 13 100 Ω 1 kΩ + Current monitoring + 100 mV Test mode (spikeEnable filter) 0.55 × VRef + 0.2 V9 1 VRef 1 kΩ +VS 15 Push pull IGBT RG Temp monitoring GND Rsh 2 Ramp Voltage limitation Clock Synchronization 16 U2102B Clock generator Reverse Control 5 RC oscillator Divider Control VRef Stat. ZVS logic 2 stage/out 2 stage Buffer 120 ms Clock Test logic Clock 10 6 +VS GND 0.02 × VRef 10 nF R2 1 MΩ C3 22 kΩ 820 kΩ R3 Control 100 kΩ QQ RS 500 mV 11 POR CRef Voltage monitoring C2 Block Diagram with Typical Circuit for DC Loads 1 µF 220 nF VRef +VS 1 nF GND Enable 0.1/0.4 0.5 × VRef 7 Buffer VRef + 8 Trigger window + 0.45 × VRef - 0.2 V9 Trigger signal Window adjustment 9 NTC 4767B–INDCO–10/05 U2102B 3. Power Supply, Synchronization Pins 15 and 16 The U2102B’s voltage limitation circuit enables the power supply via the dropping resistor R1. In the case of DC loads, the entire supply current flows into pin 16 and is supplied via an internal diode to pin 15, where the resultant supply voltage is limited and smoothed by C1. The pull-down resistor at pin 16 is necessary in order to guarantee reliable synchronization. As a result, the rectified and divided line voltage appears at pin 16, where the amplitude is limited. The power supply for the circuit can be realized in all modes for DC loads as shown in Figure 2-2 on page 4. The voltage at pin 16 is used to synchronize the circuit with the mains and generate the system clock required for the buffers. The circuit detects a “zero crossing” when the voltage at pin 16 falls below an internal threshold of approximately 8 V. Figure 3-1. Power Supply for DC Loads (R1 is Identical with Rsync) Vmains R1 = Rsync Sync. 16 +VS 15 Voltage limitation Push pull 14 Temp. monit. GND 13 C1 IGBT RG Load Rsh R1 is calculated as follows: V Nmin – V S R 1max = 0.85 × --------------------------I tot where: VNmin = Vmains – 15% VS Itot = Supply voltage = ISmax + Ix ISmax = Maximum current consumption of the IC Ix = Current consumption of the external components 5 4767B–INDCO–10/05 In the case of AC loads, it is necessary to distinguish the power supply purposes of the individual operating modes. In reverse phase control mode (see Figure 3-1 on page 5), pin 15 must be additionally supplied with power via a dropping resistor, since no current flows in pin 16 when the power switch is switched on. Here, the dropping resistor, R1, is connected to the AC line and has therefore only one mains half-wave. R1 is then calculated as follows: V Nmin – V S R 1max = 0.85 × --------------------------2 × I tot Figure 3-2. Power Supply in Reverse Phase Control Mode for AC Loads Load Vmains Rsyn Sync. 16 R1 +VS 15 Voltage limitation Push pull 14 Temp. monit. GND 13 C1 IGBT RG Rsh D1 In two-wire systems, the additional power supply at pin 15 is not possible (see Figure 3-1 on page 5, by omitting R1 and diode D1). In this case, the resistor Rsync is identical with R1 and should be as low as the power dissipation allows it. A sufficiently large residual phase angle must remain in this case to guarantee the device’s supply. The power supply is simplified if the device is operated as a static zero-voltage switch for AC loads (see Figure 3-2). All delay times are then twice as long, since the synchronization of the module is connected directly to the AC line. 6 U2102B 4767B–INDCO–10/05 U2102B Figure 3-3. Power Supply as Static Zero-voltage Switch for AC Loads Load R1 = Rsync Sync 16 Vmains +VS 15 Voltage limitation Push pull 14 Temp. monit. GND 13 C1 IGBT RG Rsh 4. Voltage Monitoring The internal voltage monitoring circuit surpresses uncontrolled conditions or output pulses of insufficient amplitude which may occur while the operating voltage is being built up or reduced. All latches in the circuit, the divider and the control logic are reset. When the supply voltage is applied, the enable threshold (clamp voltage) of approximately 16 V must be reached so that the circuit is enabled. The circuit is reset at approximately 11 V if the supply voltage breaks down. A further threshold is activated in reverse phase control mode. If the supply voltage breaks down in this mode, after the circuit has been enabled, the output stage is switched off at approximately 12.5 V, while the other parts of the circuit are not affected. The output stage can then be switched on again in the following half-wave. As a result, the residual phase angle remains just large enough, (e.g., in two-wire systems), so that the circuit can still be properly supplied with power. In all operating modes, a single operating cycle is started after the supply voltage is applied, independently of the trigger inputs, in order to immediately demonstrate the overall function. 5. Chip Temperature Monitoring The U2102B includes a chip temperature monitoring circuit which disables the output stage when a temperature of approximately 140°C is reached. The circuit will only be enabled again after cooling down and when the operating voltage has been additionally switched off and on. 7 4767B–INDCO–10/05 6. Reverse Phase Control In the case of normal phase controls, e.g., with a triac, the load current will only be switched on at a certain phase angle after the zero crossing of the mains voltage. In the following zero crossing of the current, the triac gets extinguished (switched-off) automatically. Reverse phase control differs from this in that the load current is always switched on by a semiconductor switch (for example, IBGT) at the zero crossing of the mains voltage and then switched back off again after a certain phase angle α. This has the advantage that the load current always rises with the mains voltage in a defined manner and thus keeps the required interference suppression to a minimum. The charging current for the capacitor C3 at pin 2 is set with the resistor R3 at pin 3. When the synchronization circuit recognizes a zero crossing, an increased charging current of I2 ≈ 4 × I3 is enabled which then charges C3 up to ≈ 0.45 V. The output stage is switched on at this value and the charging current for C3 is reduced to I2 = I3. Since the actual zero crossing of the supply voltage occurs later than recognized by the circuit, the load current starts to flow quite close to the exact zero crossing of the supply voltage. While the output stage is switched on, C3 is charged until the control voltage, set externally at pin 4, is reached. When this condition is reached, the output stage is switched off and C3 is charged again with the increased current (I2 ≈ 4 × I3) to V2 ≈ 5.5 V. The charging current is switched off at this point and C3 is discharged internally. The whole process then starts again when the circuit recognizes another zero crossing (Figure 3-3 on page 7). Figure 6-1. Signal Characteristics of Reverse Phase Control Vmains t V2 1.1 V × VRef 0.09 V × VRef V4 t V14 t 8 U2102B 4767B–INDCO–10/05 U2102B 7. Programming Three operating modes can be programmed with the tri-state input pin 6: • Zero-voltage switch (ZVS) with static output (V6 = V1 = VRef): The reverse phase control is inactive here. The output stage is statically switched on after triggering by the timer and switched off again after the running down of the time (at the zero crossing of the supply voltage in each case). This operating mode is not possible in two-wire systems. • Reverse phase control with two-stage switch-off (V6 = V15 = VS): The maximum current flow angle, αmax, is set when the timer has enabled the output stage. Switchover to the phase angle α, which can be set arbitrarily at pin 4, takes place after expiry of 3/4 of the tracking time set at pin 5. The output stage switches off after expiry of the whole tracking time. • Two-stage reverse phase control with dimming function (V6 = V13 = GND): The output stage switches to the maximum current flow angle, αmax, (adjustable) if the trigger condition for both inputs (pins 7, 8) is satisfied. Switchover to the current flow angle, α, set at pin 4 takes place after expiry of 3/4 of the tracking time set at pin 5. The whole process is repeated from the beginning if renewed triggering takes place at pin 8. The lamp is switched-off in the following half-wave of the mains voltage if the trigger condition at pin 7 disappears. In this mode, the output stage is switched-on even if only pin 7 is in the ON state. The current flow angle is then determined by V4 (e.g., house number illumination, twilight switch). 8. Trigger Inputs The trigger condition of the timer is determined by the two inputs at pins 7 and 8. A Light Dependent Resistor (LDR) can be connected to pin 7, for example, and an IR sensor to pin 8. Since both inputs are equal and AND-gated they must both be in the ON state to initiate triggering. In the operating mode “2-stage reverse phase control”, the output stage can additionally be switched on and switched off by pin 7 alone and independently of the timer. The enable input pin 7 is implemented as a comparator with hysteresis. The enable threshold is approximately 2.5 V. The blocking threshold is switched by the control logic in order to avoid faults as a result of load switching. This threshold is approximately 2 V in switched off condition and also during the second current flow angle, α, in two-stage reverse phase control mode. Otherwise, the blocking or switch-off threshold is 0.5 V. The input pin 8 is designed as a window discriminator, its window is set at pin 9. The minimum window of approximately 250 mV is set with V9 = V13, and the maximum window of approximately 1.25 V with V9 = Vl. The window discriminator is in the OFF state when the voltage at pin 8 lies within the window set at pin 9. If a resistor divider with an NTC resistor is connected to pin 9, for example, it is possible to compensate the temperature dependence of the IR sensor, i.e., the range is made independent of temperature. Noise suppression for tON = 40 ms guarantees that there are no peak noise signals at the inputs which could trigger the circuit. Equally, renewed triggering is prevented for tOFF = 640 ms after load switch-off to avoid any self interference. 9 4767B–INDCO–10/05 Figure 8-1. Trigger Condition Pin 7 V7 VRef 0.5 × VRef 0.1/0.4 × VRef OFF 0 ON Hysteresis Figure 8-2. Trigger Condition Pin 8 V8 VRef ON 0.5 × VRef 0.05 × VRef + 0.2 × V9 0.05 × VRef + 0.2 × V9 OFF ON 0 9. RC Oscillator An internal RC oscillator with following divider stage 1:211 permits a very long and reproducible tracking time. The RC values for a certain tracking time, tt, are calculated as follows: t t (s)10 R 2 (k Ω) = ------------------------------------------------1.4 × 2048 C 2 (µF) 3 t t (s)10 C 2 (µF) = -------------------------------------------------1.4 × 2048 R 2 (k Ω) 3 In reverse phase control mode, switchover from maximum current flow angle to the value set at pin 4 takes place after expiry of 3/4 of the total tracking time tt. 10 U2102B 4767B–INDCO–10/05 U2102B 10. Current Monitoring The U2102B’s current monitoring circuit represents a double electronic fuse. The circuit measures the current flowing through the power switch by means of the voltage drop across the shunt resistor Rsh. This voltage is supplied to pin 11. If this voltage exceeds a value of 500 mV due to a high load current (e.g., short circuit), the switch-off latch is set and the switching output pin 11 closes immediately. Pin 11 can be connected to the gate via a resistor or network, depending on load conditions, thus allowing the switch-off behavior to be adapted to the respective requirements. The short-circuit current is reduced to a problem-free value by this procedure. There is a second threshold at 100 mV. Without exceeding the switch-off threshold of 500 mV, the output stage is also disabled in the voltage at pin 11 exceeds the value of 100 mV for ≥ 120 ms at one half-wave. To prevent the occurrence of high-voltage peaks in the over current condition due to the line and leakage inductances, the output stage is not switched off immediately. It is disabled during the next half-wave. 11. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Reference point pin 13, unless otherwise specified. Parameters Power supply Current t < 10 µs Synchronization Input current t ≤10 µs Reference voltage source Output current Push-pull output stage Output current t ≤2 ms Pin 15 Symbol IS is II ii - IRef ±IO ±io -II II -II ± II II VI VI Tstg Tj Tamb Value 20 60 20 60 10 10 60 1 8 0.2 1 20 0 to V1 0 to V15 -40 to +125 +125 -10 to +100 Unit mA mA mA mA mA mA mA mA mA mA mA mA V V °C °C °C 16 1 14 14 2 2 3 10 12 4, 5, 7, 8, 9, 11 6 and 12 Input currents Input voltage Storage temperature range Junction temperature Ambient temperature 11 4767B–INDCO–10/05 12. Thermal Resistance Parameters DIP16 Junction ambient SO16 on PC board SO16 on ceramic Symbol RthJA RthJA RthJA Value 120 180 100 Unit K/W K/W K/W 13. Electrical Characteristics VS = 15.0 V, fmains = 50 Hz, Tamb = 25°C, reference point pin 13, unless otherwise specified. Parameters Supply Voltage Limitation Current Consumption Voltage Monitoring Switch-on threshold Switch-off threshold Undervoltage threshold Reference Voltage Synchronization Voltage limitation Input current Zero crossing switch-on threshold Zero crossing switch-off threshold Reverse Phase Control Ramp current setting Input current Input voltage Ramp Charging current 1 Charging current 2 Discharge impedance Switch-on threshold, output stage Discharge threshold voltage Control Voltage Input voltage Input current Programming, Tri-state Input Input current Operating mode: Static zero-voltage switch 2-stage reverse phase control with switch-off 2-stage reverse phase control RC Oscillator Input current Upper threshold Lower threshold Discharge impedance V13 ≤V5 < 3.6 V 5 ±II VTU VTL Rdis 3.6 0.9 4 1 1 500 4.4 1.1 nA V V kΩ V13 ≤V6 ≤V15 V13 ≤V4 ≤Vl 6 ±II 1 VRef + 1 0 1 VRef + 0.3 VS 0.3 µA I16 = 2 mA V16 = 0 V 15, 16 16 16 16 3 -II V3 2 -Ich1 -Ich2 Rdis VTON Vdis VI ±II 9 37 410 10 40 1 450 600 11 43 490 µA µA kΩ mV mV V nA 50 5.3 µA V Vlimit - II VTON VTOFF 0.8 100 7.7 8.3 V µA V V -I1 = 0 to 5 mA 1 Test Conditions IS = 2 mA IS = 5 mA VS = 15 V Pin 15 15 15 VSON VSOFF V15 VRef 14.8 10.4 11.7 4.75 11 12.5 5 16.5 11.6 13.3 5.25 V V V V Symbol VS VS IS Min. 15 15.2 Typ. Max. 17 17.2 2 Unit V V mA 7.3 7.9 8.1 8.7 I3 = -10 µA I3 = -10 µA 4.7 5 1, 2 4 0 VRef 500 VI VI V V 12 U2102B 4767B–INDCO–10/05 U2102B 13. Electrical Characteristics (Continued) VS = 15.0 V, fmains = 50 Hz, Tamb = 25°C, reference point pin 13, unless otherwise specified. Parameters Window Discriminator Input current Upper threshold Lower threshold Input current window adjustment Minimum window: Lower threshold Upper threshold Maximum window: Lower threshold Upper threshold Enable Schmitt Trigger Input current Enable threshold Blocking threshold: Output stage OFF Output stage ON, except in the case of two-stage reverse phase control in second stage (α) Threshold for test mode Current Monitoring Input current Switch-off threshold 1 Switch-off threshold 2 Switching Output Leakage current Saturation voltage Push-pull Output Stage Upper saturation voltage, ON state Lower saturation voltage, OFF state Output current I14 = -10 mA I14 = 10 mA ON state OFF state 14, 15 14 14 -VSat VSatL -IO IO 50 50 2.4 1.2 V V mA mA V11 < 450 mV, V12 ≤V15 V11 > 550 mV I12 = 0.5 mA I12 = 10 mA 0 V ≤V11 ≤V1 11 ±Ii VT1 VT2 12 Ilkg VSat VSat 1 1.0 1.2 µA V V 80 450 100 500 500 120 550 nA mV mV 0 V ≤V7 ≤Vl 0 V ≤V9 ≤V1 V9 = V13 0 V ≤V8 ≤Vl 8 8, 9 9 8 ±II VTU VTL ±Ii VTL1 VTU1 VTL2 VTU2 ±Ii VT VT VT 2.3 1.8 0.45 2.5 2 0.5 2.05 2.55 1.1 3.4 2.75 3.75 1.25 3.75 500 0.55 × VRef + (0.2 × V9) 0.45 × VRef - (0.2 × V9) 500 2.45 2.95 1.4 4.1 500 2.7 2.2 0.55 nA V V nA V V V V nA V V V Test Conditions Pin Symbol Min. Typ. Max. Unit V9 = V1 8 7 VT 85 100 115 mV 13 4767B–INDCO–10/05 Figure 13-1. House Number or Staircase Illumination for AC Loads House Number Illumination: V6 = V13 Staircase Illumination: V6 = V15 Vmains 230 V ~ Load GND Rsh 1 nF 1 kΩ 22 kΩ/2 W R1 1N4007 C1 47 µF/ 25 V IGBT 100 Ω RG VRef NTC Rsync 220 kΩ 100 kΩ VS 16 15 14 13 12 11 10 9 U2102B 1 C3 10 nF 2 3 R3 820 kΩ 4 5 6 7 8 Control VS GND 220 nF Enable 100 kΩ 1 MΩ R2 22 kΩ C2 Trigger signal 1 µF CRef 14 U2102B 4767B–INDCO–10/05 U2102B Figure 13-2. Zero-voltage Switch Mode for AC Loads Vmains 230 V ~ Load GND Rsh 1 nF 1 kΩ IGBT 100 Ω R1 = Rsync 18 kΩ/2 W 1N4007 VS 16 15 14 68 kΩ C1 47 µF/25 V RG VRef NTC 13 12 11 10 9 U2102B 1 C3 22 nF 2 3 R3 750 kΩ 4 5 6 7 8 C2 220 nF 1 MΩ 22 kΩ Enable Trigger signal R2 CRef 1 µF 15 4767B–INDCO–10/05 Figure 13-3. Reverse Phase Control for AC Loads Vmains 230 V ~ Load Rsh 1 nF 1 kΩ R1 22 kΩ/2 W IGBT 100 Ω VS 1N4007 C1 47 µF/ 25V RG 100 kΩ Rsync = 220 kΩ 100 kΩ VS 16 15 14 13 12 11 10 9 U2102B 1 C3 10 nF 2 3 100 kΩ 4 5 6 7 8 100 kΩ R3 1 MΩ Control 100 kΩ CRef = 1 µF VS 16 U2102B 4767B–INDCO–10/05 U2102B 14. Ordering Information Extended Type Number U2102B-xY U2102B-xFPY U2102B-xFPG3Y Package DIP16 SO16 SO16 Remarks Tube, Pb-free Tube, Pb-free Taped and reeled, Pb-free 15. Package Information Package DIP16 Dimensions in mm 20.0 max 7.82 7.42 4.8 max 6.4 max 0.5 min 3.3 1.64 1.44 Alternative 16 0.58 0.48 17.78 9 0.39 max 9.75 8.15 2.54 technical drawings according to DIN specifications 1 8 17 4767B–INDCO–10/05 Package SO16 Dimensions in mm 10.0 9.85 5.2 4.8 3.7 1.4 0.4 1.27 8.89 16 9 0.25 0.10 0.2 3.8 6.15 5.85 technical drawings according to DIN specifications 1 8 16. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4767B-INDCO-08/05 History • Put datasheet in a new template • First page: Pb-free logo added • Page 17: Ordering Information changed 18 U2102B 4767B–INDCO–10/05 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Literature Requests www.atmel.com/literature Disclaimer: T he information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. A tmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2005 . A ll rights reserved. Atmel ®, logo and combinations thereof, Everywhere You Are ® a nd others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Printed on recycled paper. 4767B–INDCO–10/05
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