U2741B_05

Features • Very High Transmitting Frequency Accuracy Compared to SAW Solutions (Enables Receivers at Lower Bandwidth than with SAW Resonators) • Lower Cost than the Usual Discrete Solutions Using SAW and Transistors • Supply Voltage 2.0V to 5.5V in the Temperature Range –20°C to +70°C Supply Voltage 2.2 V to 5.5 V in the Temperature Range –40°C to +85°C • XTO Output for Clocking the Microcontroller, Thereby Together with the ATAR090 or ATAR890 Results in the Optimum System Cost-effectiveness One-chip Solution with Minimum External Circuitry Very Small SSO16 Package, Pitch 0.635, 150 mil “Single-ended Open-collector” Output (Same Antennas as in Discrete Solutions Can Be Used, Simpler Adaptation of Magnetic Loop Antennas) Very Large FSK Frequency Deviation Achievable by ±100 ppm Pulling of the Reference Crystal Enables Receivers at Lower Bandwidth than with SAW Resonators ESD Protection According to MIL-STD.883 (4 KV HBM) Except Pins XTO1/ 2, ANT and LF UHF ASK/FSK Transmitter U2741B • • • • • • Electrostatic sensitive device. Observe precautions for handling. 1. Description The U2741B is a PLL transmitter IC which has been especially developed for the demands of RF low-cost data transmission systems at data rates up to 20 kBaud. The transmitting frequency range is 300 MHz to 450 MHz. The device can be used in both FSK and ASK systems. Rev. 4733B–RKE–09/05 Figure 1-1. System Block Diagram UHF ASK/FSK Remote control transmitter UHF ASK/FSK Remote control receiver 1 Li cell U2741B Encoder ATARx9x XTO U3741BM Demod. PLL IF Amp Microcontroller Control 1...3 Keys Antenna Antenna VCO PLL XTO Power amp. LNA VCO Figure 1-2. Block Diagram ASK OR DIVC FSK PWRSET Power up VCC PWRVCC VCO CLK PA ANT GND f 64 PWRGND1 LFVCC f n PWRGND2 XTO XTO1 LFGND LF U2741B XTO2 2 U2741B 4733B–RKE–09/05 U2741B 2. Pin Configuration Figure 2-1. Pinning SSO16 DIVIC ASK 1 16 FSK 2 15 PWRSET VCC 3 14 PWRVCC CLK 4 13 ANT U2741B GND 5 12 PWRGND1 LFVCC 6 11 PWRGND2 LFGND 7 10 XTO1 LF 8 9 XTO2 Table 2-1. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Description Symbol ASK FSK VCC CLK GND LFVCC LFGND LF XTO2 XTO1 PWRGND2 PWRGND1 ANT PWRVCC PWRSET DIVIC Function Modulation input ASK Modulation input FSK Supply voltage Clock output Ground Supply voltage VCO VCO ground Circuit PLL loop FM modulation output Connection for crystal Power GND2 Power GND1 RF output Supply voltage power amplifier Applied to VCC Pitch factor setting for crystal L: high crystal frequency H: low crystal frequency 3 4733B–RKE–09/05 3. General Description The fully integrated VCO and the “single-ended open-collector” output allow particularly simple, low-cost RF miniature transmitters to be assembled. The single-ended output enables a considerably simplified adaptation of both a magnetic loop antenna of any form or a λ/4 antenna. This is because the load impedance must not be balanced as would be the case with a differential output. The XTO’s frequency can be selected at either 13.56 MHz (USA 9.844 MHz) or 6.78 MHz (USA 4.9219 MHz). Thus, it is possible to use not only exceptionally small SMD crystals at 13.56 MHz but also very low-cost 6.78 MHz crystals in a wired metal package (e.g., in the HC49S housing). The frequency is selected by connecting pin 16 (DIVC) to either GND or VS. At high frequencies, crystals have a very fast start-up time (< 1.5 ms at 13.56 MHz, < 3 ms at 6.78 MHz), whereby a wait time of 5 to 10 ms is required until the transmitter IC is locked. This means that the processor does not need to poll a lock detect output. 4. Functional Description The IC can be switched on at both the FSK and the ASK input. The IC's ChipSelect is performed by the logical OR operation of ASK and FSK input. In the case of VFSK, VASK ≤0.3V, the powerdown supply current is ISoff < 0.35 µA. The ASK input activates the power amplifier and the PLL. The FSK input only activates the PLL and, if capacitor C3 is installed, pulls the crystal to the lower frequency, whereby the transmitter is FSK modulated. After switching on at FSK, the VCO locks onto the 32 or 64 times higher frequency of the crystal oscillator. 4.1 FSK Transmission The U2741B is switched on by VFSK = VS. 5 ms later, VS is applied to VASK. The output can then be modulated by means of pin FSK. This is done by connecting capacitor C3 in parallel to the load capacitor C4. 4.2 ASK Transmission The U2741B is activated by VFSK = VS. VASK remains 0V for 5 ms, then the output power can be modulated by means of pin ASK. In this case, VFSK remains = VS during the message, the capacitor C3 is not mounted. 4.3 Take-over of the Clock Pulse in the Microcontroller The clock of the crystal oscillator can be used for clocking the microcontroller. The ATAR090 and ATAR890 have the special feature of starting with an integrated RC oscillator to switch on the U2741B with VFSK = VS. 5 ms later, the 3.39-MHz clock frequency is present, so that the message can be sent with crystal accuracy. 4 U2741B 4733B–RKE–09/05 U2741B 5. Application Circuit The following component values are recommendations for a typical application. C5, C6, and C7 are block capacitors. The values of these capacitors depend on the board layout. C5 = 1 nF, C6 = 1 nF, and C7 = 22 nF are typically used here. For C5, the impedance between f = 100 MHz and f = 1 GHz should be as low as possible. C3 is not needed in ASK transmitter applications. In the case of FSK, C3 is selected in such a way that the desired transmission frequency deviation is achieved (typical ±30 kHz). The capacitance here depends upon the crystal's load capacity (C4) recommended by the manufacturer of the crystal. C2 = 3.9 nF, C1 = 15 nF, and R4 = 220Ω. CLoop1 and CLoop2 are selected so that the antenna oscillates in resonance and the adaptation to the appropriate impedance transformation is possible. LFeed is an inductor for the antenna's DC current supply. A typical value is LFeed = 220 nH. LFeed can be either printed on the PC board or be a discrete component. 5.1 Output Power Measurement The output network [as shown in Figure 5-1] can be used for output power evaluation, the exact values of L10 and C10 depend on the layout. L10 and C10 form the transformation network to adopt the output impedance of the IC to 50Ω. Table 5-1 shows the values for an output power of 2 mW and an RPWRSET = 1.2 kΩ. Table 5-1. f/MHz 315 433.92 Transformation Network C10/pF 2.7 1.8 L10/nH 56 33 ZLoad_opt/Ω 260 + j330 185 + j268 Figure 5-1. Measurement Output Network VS PWRVCC L10 ANT C10 50 Ω ZLoad-opt 5 4733B–RKE–09/05 Figure 5-2. Application Circuit +VS = 2.0 ... 5.5 V ASK ASK 1 DIVC OR Power up VCO PA 16 PWRSET 15 PWRVCC 14 ANT 13 C5 LFeed CLoop1 RPWRSET CLoop2 FSK FSK 2 VCC C7 3 CLK 4 CLK 3.39 MHz GND 5 LFVCC C6 6 LFGND 7 R4 C1 LF 8 C2 f 64 f n PWRGND1 12 PWRGND2 11 XTO XTO1 10 13.56 MHz U2741B XTO2 9 C3 C4 Antenna 6 U2741B 4733B–RKE–09/05 U2741B 6. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Supply voltage Power dissipation Junction temperature Storage temperature Ambient temperature Symbol VS Ptot Tj Tstg Tamb –55 –40 Min. Max. 6 250 150 125 105 Unit V mW °C °C °C 7. Thermal Resistance Parameters Junction ambient Symbol RthJA Value 180 Unit K/W 8. Electrical Characteristics All parameters are referred to GND (pin 5). The possible operating ranges refer to different circuit conditions: VS = 2.0V to 5.5V at Tamb = –20°C to +70°C, VS = 2.2V to 5.5V at Tamb = –40°C to +85°C (typically 25°C, 3V) Parameters Supply current (power down) Test Conditions VASK, VFSK ≤ 0.3V, VS < 3.6V Symbol ISoff ISon IStransmit PRef PRef ∆PRef ∆PRef ∆PRef 1.5 –0.5 4.7 10 3 1 Min. Typ. Max. 0.35 6.2 12.5 5 3 –1.5 –4.0 Unit µA mA mA dBm dBm dB dB Supply current (power up, output OFF) VASK = GND, VFSK = VS, Vs = 3V Supply current (power up, output ON) VASK = VS, VS = 3V, RPWRSET = 1.2 kΩ Output power VS = 3V, Tamb = 25°C, f = 433.92 MHz RPWRSET = 1.2 kΩ RPWRSET = 1.8 kΩ Tamb = –40°C to +85°C, f = 433.92 MHz, VS = 3.0V VS = 2.4V Tamb = –20°C to +85°C, f = 433.92 MHz, VS = 2.0V Pout = PRef + ∆PRef f = 315 MHz Pout = PRef + ∆PRef at Pout = 2.0 mW, the load impedance must be selected to meet the Vout maximum requirement the supply current is not dependent on the load impedance tolerance at Tamb = 25°C fo ±(n × fPC) where fPC = 6.78 MHz Load capacitance at CLK ≤ 3 pF f = 230 MHz to 470 MHz f < 230 MHz, f > 470 MHz Output power variation for the full temperature range –5.5 dB Output power variation for f = 315 MHz compared to f = 433.92 MHz ∆PRef 1.5 dB Maximum peak output antenna voltage Voutmax VS – 0.7V V(peak) Spurious emission Em Em –40 –58 dBC dBC 7 4733B–RKE–09/05 8. Electrical Characteristics (Continued) All parameters are referred to GND (pin 5). The possible operating ranges refer to different circuit conditions: VS = 2.0V to 5.5V at Tamb = –20°C to +70°C, VS = 2.2V to 5.5V at Tamb = –40°C to +85°C (typically 25°C, 3V) Parameters Test Conditions M-version: at Tamb = 25°C N-version: full temperature range (monitoring) Crystal frequency = 13.56 MHz Oscillator frequency XTO Crystal frequency = 6.78 MHz Load capacity of the crystal must be selected accordingly Loop bandwidth For best LO noise Loop filter components: C2 = 3.9 nF, C1 = 15 nF, R4 = 220Ω Referring to the phase comparator fPC = 6.78 MHz at 1 MHz at 36 MHz BLoop PNPLL PNVCO PNVCO fVCO Clkout CCLK fXTO = 13.56 MHz fXTO = 9.84 MHz fXTO = 6.78 MHz fXTO = 4.90 MHz Duty cycle of the modulation signal = 50% Duty cycle of the modulation signal = 50% VCLK = 0.2 × VCLK = 0.3 × VCLK = 0.8 × VCLK = 0.7 × VS VS VS VS Rs Rs Rs Rs fmodFSK fmodASK Iol Iol Ioh Ioh VASKl VASKh IASKh VFSKl VFSKh IFSKh 0 0 300 fout/128 10 80 100 150 225 20 20 100 kHz fXTO Symbol Min. Typ. Max. Unit fXTO 13.56 – 30 ppm 6.78 – 30 ppm 13.56 13.56 + 30 ppm 6.78 + 30 ppm MHz 6.78 MHz Phase noise PLL Phase noise VCO Frequency range of the VCO Clock output (CMOS microcontroller compatible) Load capacitance at CLK –111 –91 –123 –105 –87 –119 450 dBC/Hz dBC/Hz MHz MHz pF Ω Series resonance R of the crystal FSK modulation frequency rate ASK modulation frequency rate CLK output - Output current Low - Output current Low - Output current High - Output current High ASK input - Low level input voltage - High level input voltage - Input current High FSK input - Low level input voltage - High level input voltage - Input current High kHz kHz 150 200 –150 –200 +100 0.3 µA µA µA µA V V µA V V µA 1.7 140 0.3 1.7 140 8 U2741B 4733B–RKE–09/05 U2741B 9. Ordering Information Extended Type Number U2741B-NFBY U2741B-NFBG3Y Package SSO16 SSO16 Remarks Tube, optimized power-supply rejection, value of C4 differs from M-version, enhanced XTO stability, Pb-free Taped and reeled, see above, Pb-free 10. Package Information 5 max. 4.9±0.1 1.4 0.6 0.2 1.7 max. 0.1+0.15 0.25 3.95 max. 5±0.2 0.635 nom. 7 x 0.635 = 4.445 nom. 6±0.2 16 9 Dimensions in mm technical drawings according to DIN specifications 1 Drawing-No.: 6.543-5060.01-4 Issue: 2; 05.02.99 8 Drawing refers to following types: SSO16 Package acc. JEDEC MO 137 AB 9 4733B–RKE–09/05 11. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4733B-RKE-09/05 History • Put datasheet in a new template • Pb-free Logo on page 1 added • Ordering Information on page 9 changed 10 U2741B 4733B–RKE–09/05 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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