U2793B-NFSG3H

Features • • • • • • • • • Supply Voltage: 5V Low Power Consumption: 15 mA/5V Output Level and Spurious Products Adjustable (Optional) Excellent Sideband Suppression by Means of Duty Cycle Regeneration of the LO Input Signal Phase-control Loop for Precise 90° Phase Shifting Power-down Mode Low LO Input Level: -15 dBm 50-Ω Single-ended LO and RF Port LO Frequency Range of 30 MHz to 300 MHz Benefits • Low Current Consumption • Few External Components Result in Cost and Board Space Saving • Adjustment Free Hence Saves Time 300-MHz Quadrature Modulator U2793B Electrostatic sensitive device. Observe precautions for handling. 1. Description The IC U2793B is a 300-MHz quadrature modulator that uses Atmel®’s advanced UHF process. It features low current consumption, single-ended RF ports and adjustment-free application, which makes the device suitable for all digital radio systems, e.g., GSM, PCN, JDC and WLAN. As an option, output level and spurious products are adjustable at pins 19 and 20. In conjunction with Atmel’s U2795B mixer, an up-converter up to 2 GHz can be realized. Figure 1-1. Block Diagram SPD BBAi BBAi 10 9 8 PU 1 LOi LOi 14 Duty cycle 15 regenerator Frequency doubler 0° 90° 90° control loop Σ Power 6,7 VS up VRef 13 19 LP2 LP1 20 RFo 4 BBBi BBBi 11 12 3,16,17,18 GND 2 5 ACGND ACGND 4651E–CELL–07/06 2. Pin Configuration Figure 2-1. Pinning SSO20 PU ACGND GND RFO ACGND VS VS SPU BBAI BBAI 1 2 3 4 5 U2793B 6 7 8 9 10 15 14 13 12 11 LOI LOI VREF BBBI BBBI 20 19 18 17 16 LP1 LP2 GND GND GND 2 U2793B 4651E–CELL–07/06 U2793B Table 2-1. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Description Symbol PU ACGND GND RFO ACGND VS VS SPU BBAI BBAI BBBI BBBI VREF LOI LOI GND GND GND LP2 LP1 Function Power-up input AC ground Ground RF output AC ground Supply voltage Supply voltage Settling time power-up Baseband input A Baseband input A inverse Baseband input B Baseband input B inverse Reference voltage (2.5V) Input LO Input LO inverse, typically grounded Ground Ground Ground Output low pass and power control Output low pass and power control 3 4651E–CELL–07/06 3. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Supply voltage Input voltage Junction temperature Storage temperature range Symbol VS Vi Tj TStg Value 6 0 to VS 125 –55 to +125 Unit V V °C °C 4. Thermal Resistance Parameters Junction ambient SSO20 Symbol RthJA Value 140 Unit K/W 5. Operating Range Parameters Supply voltage Ambient temperature range Symbol VS Tamb Value 4.5 to 5.5 –40 to +85 Unit V °C 6. Electrical Characteristics Test conditions (unless otherwise specified); VS = 5V, Tamb = 25°C, referred to test circuit. System impedance Zo = 50Ω, fLO =150 MHz, PLO = -15 dBm, VBBi = 1.0 Vpp, differential No. 1.1 1.2 2 2.1 2.2 2.3 2.4 3 3.1 3.2 3.3 3.4 Parameters Supply voltage range Supply current Baseband Inputs, Pin 9-10, 11-12 Input-voltage range (differential) Input impedance Input-frequency range Input voltage, common mode LO Input, Pins 14 and 15 Frequency range Input level (1) Test Conditions Pin 6, 7 6, 7 Symbol VS IS VBBi ZBBi fBBi Min. 4.5 Typ. 5 15 1000 30 Max. 5.5 Unit V mA Type* A A D D D 1500 50 mVpp kΩ MHz V 0 2.5 fLOi PLOi ZiLO VSWRLO DCRLO 30 –15 (2) 3.5 0.4 300 –5 MHz dBm Ω D D D D D Input impedance Voltage standing wave ratio 3.5 Duty-cycle range Notes: 1. Required LO level is a function of the LO frequency. 0.6 2. The LO input impedance is consisting of a 50 Ω resistor in series with a 15 pF capacitor. 3. With the pins 19 and 20 spurious performance especially for low frequency application can be improved by adding a chip capacitor between LP1 and LP2. In conjunction with a parallel resistor the output level can be adjusted to the following mixer stage without degration of LO suppression and noise performance which would decrease if the I/Q input level is reduced. 4. For Tamb = –40°C to +85°C and VS = 4.5V to 5.5V 4 U2793B 4651E–CELL–07/06 U2793B 6. Electrical Characteristics (Continued) Test conditions (unless otherwise specified); VS = 5V, Tamb = 25°C, referred to test circuit. System impedance Zo = 50Ω, fLO =150 MHz, PLO = -15 dBm, VBBi = 1.0 Vpp, differential (Continued) No. 4 Parameters RF Output, Pin 4 fLO = 150 MHz VBBi = 1 Vpp, differential fLO = 50 MHz VBBi = 0.3 Vpp, differential PLO = –20 dBM (3) Test Conditions Pin Symbol Min. –3 Typ. –1 0 Max. +2 Unit Type* 4.1 Output level PRFo LORFO VSWRRF SBSRFo Pe Ae 35 32 dBm A/B 4.2 4.3 4.4 4.5 4.6 4.7 5 5.1 5.2 6 6.1 7 7.1 LO suppression Voltage standing wave ratio Sideband suppression Phase error (4) 45 1.4 45