U4083B

Features • • • • • • • • Wide Operating Voltage Range: 2V to 16V Low Current Consumption: 2.7 mA Typically Chip Disable Input to Power Down the Integrated Circuit Low Power-down Quiescent Current Drives a Wide Range of Speaker Loads Output Power Po = 250 mW at RL = 32Ω (Speaker) Low Harmonic Distortion (0.5% Typically) Wide Gain Range: 0 dB to 46 dB Benefits • Low Number of External Components • Low Current Consumption 1. Description The integrated circuit U4083B is a low-power audio amplifier for telephone loudspeakers. It has differential speaker outputs to maximize the output swing at low supply voltages. There is no need for coupler capacitors. The U4083B has an open-loop gain of 80 dB where the closed-loop gain is adjusted with two external resistors. A chip disable pin permits powering down and/or muting the input signal. Figure 1-1. Block Diagram Low-power Audio Amplifier for Telephone Applications U4083B 6 Vi FC3 4 3 Amp1 4k 4k 5 VS VO1 50k FC2 2 50k 125k Amp2 8 VO2 U4083B Bias circuit 7 GND 1 CD Rev. 4655C–CORD–03/06 2. Pin Configuration Figure 2-1. Pinning SO8 CD 1 8 VO2 FC2 2 7 GND FC1 3 6 VS Vi 4 5 VO1 Table 2-1. Pin 1 2 3 4 5 6 7 8 Pin Description Symbol CD FC2 FC1 Vi VO1 VS GND VO2 Function Chip disable Filtering, power supply rejection Filtering, power supply rejection Amplifier input Amplifier output 1 Voltage supply Ground Amplifier output 2 2 U4083B 4655C–CORD–03/06 U4083B 3. Functional Description Including External Circuitry 3.1 Pin 1: Chip Disable Digital Input (CD) Pin 1 (chip disable) is used to power down the IC to conserve power or mute the IC or both. Input impedance at Pin 1 is typically 90 kΩ. • Logic 0 < 0.8V • Logic 1 > 2V IC enabled (normal operation) IC disabled Figure 8-15 on page 12 shows the power supply current diagram. The change in differential gain from normal operation to muted operation (muting) is more than 70 dB. Switching characteristics are as follows: • Turn-on time • Turn-off time ton = 12 ms to 15 ms toff ≤2 µs They are independent of C1, C2 and VS. Voltages at Pins 2 and 3 are supplied from VS and, therefore, do not change when the U4083B is disabled. The outputs, VO1 (Pin 5) and VO2 (Pin 8), turn to a high impedance condition by removing the signal from the speaker. When signals are applied from an external source to the outputs (disabled), they must not exceed the range between the supply voltage, VS, and ground. 3.2 Pins 2 and 3: Filtering, Power Supply Rejection Power supply rejection is provided by capacitors C1 and C2 at Pin 3 and Pin 2, respectively. C1 is dominant at high frequencies whereas C2 is dominant at low frequencies (Figure 8-4 on page 8 to Figure 8-7 on page 9). The values of C1 and C2 depend on the conditions of each application. For example, a line-powered speakerphone (telephone amplifier) will require more filtering than a system powered by regulated power supply. The amount of rejection is a function of the capacitors and the equivalent impedance at Pin 3 and Pin 2 (see electrical characteristic equivalent resistance, R). Apart from filtering, capacitors C1 and C2 also influence the turn-on time of the circuit at power up, since the capacitors are charged up through the internal resistors (50 kΩ and 125 kΩ) as shown in the block diagram. Figure 8-1 on page 7 shows the turn-on time versus C2 at VS = 6V, for two different C1 values. The turn-on time is 60% longer when VS = 3V and 20% shorter when VS = 9V. The turn-off time is less than 10 µs. 3 4655C–CORD–03/06 3.3 Pin 4: Amplifier Input Vi, Pin 5: Amplifier Output 1 VO1, Pin 8: Amplifier Output 2 VO2 There are two identical operational amplifiers. Amplifier 1 has an open-loop gain ≥ 80 dB at 100Hz (Figure 8-2 on page 7), whereas the closed-loop gain is set by external resistors, Rf and Ri (Figure 8-3 on page 8). The amplifier is unity gain stable, and has a unity gain frequency of approximately 1.5 MHz. A closed-loop gain of 46 dB is recommended for a frequency range of 300Hz to 3400Hz (voice band). Amplifier 2 is internally set to a gain of –1.0 dB (0 dB). The outputs of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. Output voltage swing is between 0.4V and VS – 1.3V at maximum current (Figure 8-18 on page 13 and Figure 8-19 on page 13). The output DC offset voltage between Pins 5 and 8 (VO1 – VO2) is mainly a function of the feedback resistor, Rf, because the input offset voltages of the two amplifiers neutralize each other. Bias current of Amplifier 1 which is constant with respect to V s , flows out of Pin 4 (Vi ) and through Rf, forcing VO1 to shift negative by an amount equal to RfIIB and VO2 positive to an equal amount. The output offset voltage specified in the electrical characteristics is measured with the feedback resistor (Rf = 75 kΩ) shown in the typical application circuit, Figure 8-20 on page 14. It takes into account the bias current as well as internal offset voltages of the amplifiers. 3.4 Pin 6: Supply and Power Dissipation Power dissipation is shown in Figure 8-8 on page 9 to Figure 8-10 on page 10 for different loads. Distortion characteristics are given in Figure 8-11 on page 10 to Figure 8-13 on page 11. T jmax – T amb P totmax = -------------------------------R thJA where Tjmax = Junction temperature = 140°C Tamb = Ambient temperature RthJA = Thermal resistance, junction-ambient Power dissipated within the IC in a given application is found from the following equation: Ptot = (VS × IS) + (IRMS × VS) – (RL × IRMS2) IS is obtained from Figure 8-15 on page 12. IRMS is the RMS current at the load RL. The IC's operating range is defined by a peak operating load current of ±200 mA (Figure 8-8 on page 9 to Figure 8-13 on page 11). It is further specified with respect to different loads (see Figure 8-14 on page 12). The left (ascending) portion of each of the three curves is defined by the power level at which 10% distortion occurs. The center flat portion of each curve is defined by the maximum output current capability of the integrated circuit. The right (descending) portion of each curve is defined by the maximum internal power dissipation of the IC at 25°C. At higher ambient temperatures, the maximum load power must be reduced according to the above mentioned equation. 4 U4083B 4655C–CORD–03/06 U4083B 3.5 Layout Considerations Normally, a snubber is not needed at the output of the IC, unlike many other audio amplifiers. However, the PC-board layout, stray capacitances, and the manner in which the speaker wires are configured may dictate otherwise. Generally, the speaker wires should be twisted tightly, and should not be more than a few cm (or inches) in length. 4. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Reference point pin 7, Tamb = 25° C unless otherwise specified. Parameters Supply voltage Voltages Disabled Output current Junction temperature Storage temperature range Ambient temperature range Power dissipation SO8: Tamb = 60°C Pin 6 Pins 1, 2, 3 and 4 Pins 5 and 8 Pins 5 and 8 Tj Tstg Tamb Ptot Symbol VS Value Unit V V V mA °C °C °C mW –1.0 to +18 –1.0 to (VS + 1.0) –1.0 to (VS + 1.0) ±250 +140 –55 to +150 –20 to +70 440 5. Thermal Resistance Parameters Junction ambient SO8 Symbol RthJA Value 180 Unit K/W 6. Recommended Operating Conditions Parameters Supply voltage Load impedance Load current Differential gain (5.0 kHz bandwidth) Voltage at CD Ambient temperature range Pin 1 Pin 6 Pins 5 to 8 Symbol VS RL IL DG VCD Tamb Value 2 to 16 8.0 to 100 ±200 0 to 46 VS Unit V Ω mA dB V °C –20 to +70 5 4655C–CORD–03/06 7. Electrical Characteristics Tamb = +25°C, reference point pin 7, unless otherwise specified Parameters Amplifiers (AC Characteristics) Test Conditions Symbol Min. Typ. Max. Unit Open-loop gain (Amplifier 1, f < 100Hz) Closed-loop gain (Amplifier 2) Gain bandwidth product Output power VS = 3.0V, RL = 16Ω, d < 10% VS = 6.0V, RL = 32Ω, d < 10% VS = 12V, RL = 100Ω, d < 10% VS = 6.0V, RL = 32Ω, Po = 125 mW VS > 3.0V, RL = 8Ω, Po = 20 mW VS > 12V, RL = 32Ω, Po = 200 mW VS = 6.0V, ∆VS = 3.0V C1 = α, C2 = 0.01 µF C1 = 0.1 µF, C2 = 0, f = 1.0 kHz C1 = 1.0 µF, C2 = 5.0 µF, f = 1.0 kHz VS = 6.0V, 1.0 kHz < f < 20 kHz, CD = 2.0V VS = 3.0V, RL = 16Ω VS = 6.0V VS = 12V IO = –75 mA, 2.0V < VS < 16V IO = –75 mA, 2.0V < VS < 16V VS = 6.0V, Rf = 75 kΩ, RL = 32Ω VS = 6.0V VS = 6.0V VS = 6.0V VS = 6.0V, f = 1.0 kHz, RL = 32Ω GVOL1 GV2 GBW PO PO PO d d d PSRR PSRR PSRR GMUTE VO VO VO VOH VOL ∆VO –IIB R R VIL VIH RCD IS IS IS 80 dB 0 1.5 +0.35 dB MHz –0.35 55 250 400 mW 0.5 0.5 0.6 dB 50 12 52 >70 1.15 2.65 5.65 VS – 1 0.16 dB 1.0 % Total harmonic distortion (f = 1.0 kHz) Power supply rejection ratio Muting Amplifiers (DC Characteristics) Output DC level at VO1, VO2 Rf = 75 kW Output high level Output low level Output DC offset voltage (VO1 – VO2) Input bias current at Vi Equivalent resistance at Pin 3 Equivalent resistance at Pin 2 Chip disable Pin 1 Input voltage low Input voltage high Input resistance Power supply current 1.0 1.25 V V V –30 100 18 0 100 150 25 +30 200 220 40 0.8 mV nA kΩ kΩ V V kΩ mA mA µA VS = VCD = 16V VS = 3.0V, RL = α, CD = 0.8V VS = 16V, RL = α, CD = 0.8V VS = 3.0V, RL = α, CD = 2.0V 2.0 50 90 175 4.0 5.0 100 65 6 U4083B 4655C–CORD–03/06 U4083B 8. Typical Temperature Performance Tamb = –20 to +70° C Function Input bias current at Vi Total harmonic distortion VS = 6.0V, RL = 32 Ω, Po = 125 mW, f = 1.0 kHz Power supply current VS = 3.0V, RL = α, CD = 0V VS = 3.0V, RL = α, CD = 2.0V Typical Change ±40 +0.003 –2.5 –0.03 Units pA/° C %/° C µA/° C µA/° C Figure 8-1. Turn-on Time versus C1 and C2 at Power On 360 300 240 ton (ms) C1 = 5 µF 180 120 1 µF 60 VS switching from 0 to +6V 0 0 2 4 C2 (µF) 6 8 10 Figure 8-2. Amplifier 1 — Open-loop Gain and Phase 100 99.33 80 Phase 92.67 Phase (Degrees) G (dB) 60 86.00 40 Gain 20 79.33 72.67 0 0.1 1 10 f (kHz) 100 66.00 1000 7 4655C–CORD–03/06 Figure 8-3. Differential Gain versus Frequency 40 Rf = 150 k Ri = 6 k Differential gain (dB) 32 Rf = 75 k Ri = 3 k Rf Input Ci Ri VO1 0.1 µF Amp 1 Outputs VO2 Amp 2 24 16 8 0 0 1 10 100 Frequency (kHz) Figure 8-4. Power Supply Rejection versus Frequency — C2 = 10 µF 60 60 50 50 PSSR (dB) PSSR (dB) C1 > 1 µF C1 > 1 µF C1 = 0.1 µF C1 = 0.1 µF C2 = =0 µF C2 1 µ F 40 40 30 30 C1 = 0 C1 = 0 20 20 10 10 0.1 0.1 1 1 f (kHz) f (kHz) 10 10 100 100 Figure 8-5. Power Supply Rejection versus Frequency — C2 = 5 µF 60 C1 > 1 µ F 50 PSRR (dB) 40 CC= 0.1 µF 1 C2 = 5 µ F 30 20 C1= 0 10 0.1 1 f (kHz) 10 100 8 U4083B 4655C–CORD–03/06 U4083B Figure 8-6. Power Supply Rejection versus Frequency — C2 = 1 µF 60 C1 > 5 µF 50 C1 = 1 µF PSSR (dB) 40 C1 = 0.1 µF 30 C2 = 1 µF 20 C1 = 0 10 0.1 1 f (kHz) 10 100 Figure 8-7. Power Supply Rejection versus Frequency — C2 = 0 55 C1 > 5 µF 45 PSSR (dB) 35 C1 = 1 µF C2 = 0 25 C1 = 0.1 µF 15 5 0.1 1 f (kHz) 10 100 Figure 8-8. Device Dissipation — RL = 8Ω 1200 1000 800 P (mW) tot VS = 12 V RL= 8 Ohm 600 400 200 0 0 30 60 90 6V 3V 120 150 180 PL (mW) 9 4655C–CORD–03/06 Figure 8-9. Device Dissipation — RL = 16Ω 1200 1000 RL = 16 Ohm 800 P (mW) tot VS = 16 V 12 V 600 400 200 0 0 100 200 3V 6V 300 400 PL (mW) Figure 8-10. Device Dissipation — RL = 32Ω 1200 VS = 16 V 1000 800 P (mW) tot 12 V RL = 32 Ohm 600 400 6V 200 3V 0 0 100 200 300 PL (mW) 400 500 600 Figure 8-11. Distortion versus Power — f = 1 kHz, Delta – GV = 34 dB 10 8 VS = 3 V RL = 16 Ohm V S = 3V RL = 8 Ohm f = 1 kHz VS = 6 V Delta-GV= 34 dB RL = 32 Ohm 6 d(%) 4 VS = 16V 2 RL = 32 Ohm VS = 6 V RL = 16 W VS = 12 V RL = 32 Ohm 0 100 200 PO (mW) 300 400 0 10 U4083B 4655C–CORD–03/06 U4083B Figure 8-12. Distortion versus Power — f = 3 kHz, Delta – GV = 34 dB 10 8 VS = 3 V RL = 16 Ohm 6 d(%) VS = 3 V RL = 8 Ohm f = 3 kHz Delta-GV = 34 dB VS= 6 V RL = 32 Ohm 4 VS = 6 V RL = 16 Ohm 2 VS = 16 V RL = 32 Ohm Limit VS = 12 V RL = 32 Ohm 0 0 100 200 PO (mW) 300 400 Figure 8-13. Distortion versus Power — f = 1 kHz or 3 kHz, Delta – GV = 12 dB 10 8 VS = 3 V RL = 16 Ohm 6 d(%) VS = 6 V VS = 3 V RL = 8 Ohm f = 1 or 3 kHz Delta-GV = 12 dB RL = 32 W 4 2 VS = 16 V RL = 32 Ohm Limit 0 0 100 200 PO = ( mW ) 300 VS = 6 V RL = 16 Ohm Limit VS = 12 V RL = 32 Ohm 400 11 4655C–CORD–03/06 Figure 8-14. Maximum Allowable Load Power 600 Tamb = 25°C - Derate at higher temperature 500 RL = 32 400 PL (W) 300 200 100 0 0 4 8 16 Ohm 8 Ohm 12 VS (V) 16 20 Figure 8-15. Power-supply Current 5 RL = ∞ 4 CD = 0 IS (mA) 3 2 1 CD = V S 0 0 4 8 12 VS (V) 16 20 Figure 8-16. Small Signal Response Input 1mV/Div Output 20mV/Div 20 µs/Div 12 U4083B 4655C–CORD–03/06 U4083B Figure 8-17. Large Signal Response Input 80mV/Div Output 1V/Div 20µs/Div Figure 8-18. VS – VOH versus Load Current 1.3 1.2 VS-VOH(V ) 1.1 1.0 2V< VS 6 V 0 0 40 80 120 IL(mA) 160 200 13 4655C–CORD–03/06 Figure 8-20. Application Circuit R1B 75k Ci Ri 4 0.1µF 3k C1 Vi FC3 C2 3 Amp1 4k 4k 5 VO1 Rf 6 VS C1B 10R 100nF 1µF 50k 2 125k Amp2 8 VO2 C2B 100nF FC2 5µF 50k U4083B 1 Bias circuit 7 GND CD R2B 10R 14 U4083B 4655C–CORD–03/06 U4083B 9. Ordering Information Extended Type Number U4083B-MFPY U4083B-MFPG3Y Package SO8, Pb-free SO8, Pb-free Remarks Tube Taped and reeled 10. Package Information Package SO8 Dimensions in mm 5.00 4.85 1.4 0.4 1.27 3.81 8 5 0.25 0.10 0.2 3.8 6.15 5.85 5.2 4.8 3.7 technical drawings according to DIN specifications 1 4 15 4655C–CORD–03/06 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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