U4223B

U4223B Time-Code Receiver with A/D Converter Description The U4223B is a bipolar integrated straight-through receiver circuit in the frequency range of 40 kHz to 80 kHz. The device is designed for radio-controlled clock applications. Features D Very low power consumption D Very high sensitivity D High selectivity by using two crystal filters D Power-down mode available D Only a few external components necessary D 4-bit digital output D AGC hold mode Block Diagram PON VCC 1 GND 16 Power supply 3 9 Impulse circuit 2 4 AGC amplifier 5 6 14 15 Rectifier & integrator 7 REC 8 INT 13 SL CLK D3 12 17 D2 18 ADC D1 19 D0 20 Decoder 11 10 FLB FLA DEC IN SB Q1A Q1B Q2A Q2B Figure 1. Block diagram Ordering and Package Information Extended Type Number U4223B-MFS U4223B-MFSG3 T4223B-MF T4223B-MC Package SSO20 plastic SSO20 plastic No No Remarks Taping according to IEC-286-3 Die on foil Die on carrier Rev. A7, 06-Mar-01 1 (18) U4223B Pin Description Pin VCC IN GND SB Q1A Q1B 1 2 3 4 5 20 19 18 17 16 D0 (LSB) D1 D2 D3 (MSB) PON Q2B Q2A SL CLK FLB 1 2 3 4 5 6 7 8 9 10 15 14 13 12 11 11 12 REC INT DEC FLA 7 8 9 10 13 14 15 16 17 18 19 20 Figure 2. Pinning Symbol VCC IN GND SB Q1A Q1B REC INT DEC FLA FLB CLK SL Q2A Q2B PON D3 D2 D1 D0 Function Supply voltage Amplifier – Input Ground Bandwidth control Crystal filter 1 Crystal filter 1 Rectifier output Integrator output Decoder input Lowpass filter Lowpass filter Clock input for ADC AGC hold mode Crystal filter 2 Crystal filter 2 Power ON/OFF control Data out MSB Data out Data out Data out LSB U4223B 6 IN A ferrite antenna is connected between IN and VCC. For high sensitivity, the Q factor of the antenna circuit should be as high as possible. Please note that a high Q factor requires temperature compensation of the resonant frequency in most cases. Specifications are valid for Q>30. An optimal signal-to-noise ratio will be achieved by a resonant resistance of 50 to 200 kW. SB A resistor RSB is connected between SB and GND. It controls the bandwidth of the crystal filters. It is recommended: RSB = 0 W for DCF 77.5 kHz, RSB = 10 kW for 60 kHz WWVB and RSB = open for JG2AS 40 kHz. VCC SB IN GND Figure 3. Figure 4. 2 (18) Rev. A7, 06-Mar-01 U4223B Q1A, Q1B In order to achieve a high selectivity, a crystal is connected between the Pins Q1A and Q1B. It is used with the serial resonant frequency of the time-code transmitter (e.g., 60 kHz WWVB, 77.5 kHz DCF or 40 kHz JG2AS). The equivalent parallel capacitor of the filter crystal is internally compensated. The compensated value is about 0.7 pF. If full sensitivity and selectivity are not needed, the crystal filter can be substituted by a capacitor of 82 pF. SL AGC hold mode: SL high (VSL = VCC) sets normal function, SL low (VSL = 0) disconnects the rectifier and holds the voltage VINT at the integrator output and also the AGC amplifier gain. VCC SL Q1A Q1B Figure 8. GND Figure 5. INT Integrator output: The voltage VINT is the control voltage for the AGC. The capacitor C2 between INT and DEC defines the time constant of the integrator. The current through the capacitor is the input signal of the decoder. REC Rectifier output and integrator input: The capacitor C1 between REC and INT is the lowpass filter of the rectifier and at the same time a damping element of the gain control. INT REC GND GND Figure 6. Figure 9. FLA, FLB DEC Decoder input: Senses the current through the integration capacitor C2. The dynamic input resistance has a value of about 420 kW and is low compared to the impedance of C2 . Lowpass filter: A capacitor C3 connected between FLA and FLB suppresses higher frequencies at the trigger circuit of the decoder. DEC FLB FLB GND Figure 7. Figure 10. 94 8377 Rev. A7, 06-Mar-01 3 (18) U4223B Q2A, Q2B According to Q1A/Q1B, a crystal is connected between the Pins Q2A and Q2B. It is used with the serial resonant frequency of the time-code transmitter (e.g., 60 kHz WWVB, 77.5 kHz DCF or 40 kHz JG2AS). The equivalent parallel capacitor of the filter crystal is internally compensated. The value of the compensation is about 0.7 pF. A sequence of the digitalized time-code signal can be analyzed by a special noise-suppressing algorithm in order to increase the sensitivity and the signal-to-noise ratio (more than 10 dB compared to conventional decoding). Details about the time-code format are described separately. Q2A Q2B GND Figure 11. PON If PON is connected to GND, the receiver will be activated. The set-up time is typically 0.5 s after applying GND at this pin. If PON is connected to VCC, the receiver will switch to power-down mode. Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Gray 0000 0001 0011 0010 0110 0111 0101 0100 1100 1101 1111 1110 1010 1011 1001 1000 VCC VCC PON D0 ... D3 PON GND Figure 12. Figure 13. CLK D0, D1, D2, D3 The outputs of the ADC consist of PNP-NPN push-pull stages and can be directly connected to a microcomputer. In order to avoid any interference of the output into the antenna circuit, we recommend terminating each digital output with a capacitor of 10 nF. The digitalized signal of the ADC is Gray coded (see table). It should be taken into account that in power-down mode (PON = high), D0, D1, D2 and D3 will be high. 4 (18) The input of the ADC is switched to the AGC voltage by the rising slope of the clock. When conversion time has passed (about 1.8 ms at 25°C), the digitalized fieldstrength signal is stored in the output registers D0 to D3 as long as the clock is high and can be read by a microcomputer. The falling slope of the clock switches the input of the ADC to the time-code signal. In the meantime, the digitalized time-code signal is stored in the output registers D0 to D3 as long as the clock is low (see figure 14). Rev. A7, 06-Mar-01 U4223B Vclk mV 100 50 0 4 78 11 12 t/ms Now, the time-code signal can be read Falling edge initiates time-code conversion Now, the AGC value can be read Thus, the first step in designing the antenna circuit is to measure the bandwidth. Figure 17 shows an example for the test circuit. The RF signal is coupled into the bar antenna by inductive means, e.g., a wire loop. It can be measured by a simple oscilloscope using the 10:1 probe. The input capacitance of the probe, typically about 10 pF, should be taken into consideration. By varying the frequency of the signal generator, the resonant frequency can be determined. Rising edge initiates AGC signal conversion Figure 14. RF signal generator 77.5 kHz Scope Probe 10 : 1 w10 MW wire loop Cres In order to minimize interferences, we recommend a voltage swing of about 100 mV. A full supply-voltage swing is possible but reduces the sensitivity. Figure 16. VCC CLK At the point where the voltage of the RF signal at the probe drops by 3 dB, the two frequencies can then be measured. The difference between these two frequencies is called the bandwidth BWA of the antenna circuit. As the value of the capacitor Cres in the antenna circuit is known, it is easy to compute the resonant resistance according to the following formula: R res + Figure 15. GND 2 p 1 BW A Cres Please note: The signals and voltages at the Pins REC, INT, FLA, FLB, Q1A, Q1B, Q2A and Q2B cannot be measured by standard measurement equipment due to very high internal impedances. For the same reason, the PCB should be protected against surface humidity. where Rres is the resonant resistance, BWA is the measured bandwidth (in Hz) Cres is the value of the capacitor in the antenna circuit (in Farad). If high inductance values and low capacitor values are used, the additional parasitic capacitances of the coil (v20 pF) must be considered. The Q value of the capacitor should be no problem if a high Q type is used. The Q value of the coil differs more or less from the DC resistance of the wire. Skin effects can be observed but do not dominate. Therefore, it should not be a problem to achieve the recommended values of the resonant resistance. The use of thicker wire increases the Q value and accordingly reduces bandwidth. This is advantageous in order to improve reception in noisy areas. On the other hand, temperature compensation of the resonant frequency might become a problem if the bandwidth of the antenna circuit is low compared to the temperature variation of the resonant frequency. Of course, the Q value can also be reduced by a parallel resistor. Design Hints for the Ferrite Antenna The bar antenna is a very critical device of the complete clock receiver. Observing some basic RF design rules helps to avoid possible problems. The IC requires a resonant resistance of 50 kW to 200 kW. This can be achieved by a variation of the L/C-relation in the antenna circuit. It is not easy to measure such high resistances in the RF region. A more convenient way is to distinguish between the different bandwidths of the antenna circuit and to calculate the resonant resistance afterwards. Rev. A7, 06-Mar-01 5 (18) U4223B Temperature compensation of the resonant frequency is a must if the clock is used at different temperatures. Please ask your supplier of bar antenna material and of capacitors for specified values of the temperature coefficient. Furthermore, some critical parasitics have to be considered. These are shortened loops (e.g., in the ground line of the PCB board) close to the antenna and undesired loops in the antenna circuit. Shortened loops decrease the Q value of the circuit. They have the same effect like conducting plates close to the antenna. To avoid undesired loops in the antenna circuit, it is recommended to mount the capacitor Cres as close as possible to the antenna coil or to use a twisted wire for the antenna-coil connection. This twisted line is also necessary to reduce feedback of noise from the microprocessor to the IC input. Long connection lines must be shielded. A final adjustment of the time-code receiver can be carried out by pushing the coil along the bar antenna. The maximum of the integrator output voltage VINT at Pin INT indicates the resonant point. But attention: The load current should not exceed 1 nA, that means an input resistance w 1 GW of the measuring device is required. Therefore, a special DVM or an isolation amplifier is necessary. Absolute Maximum Ratings Parameters Supply voltage Ambient temperature range Storage temperature range Junction temperature Electrostatic handling (MIL Standard 883 D), except Pins 2, 5, 6, 14 and 15 Symbol VCC Tamb Rstg Tj ± VESD Value 5.25 –40 to +85 –40 to +85 125 2000 Unit V _C _C _C V Thermal Resistance Parameters Thermal resistance Symbol RthJA Maximum 70 Unit K/W Electrical Characteristics VCC = 3 V, reference point Pin 3, input signal frequency 80 kHz, Tamb = 25_C, unless otherwise specified Parameters Supply voltage range Supply current Test Conditions / Pin Pin 1 Pin 1 Without reception signal with reception signal = 200 mV OFF mode Set-up time after VCC ON VCC = 1.5 V AGC amplifier input; IN Pin 2 Reception frequency range Minimum input voltage Rres = 100 kW, Qres > 30 Maximum input voltage Input capacitance to GND Symbol VCC ICC Min 1.2 Typ Max 5.25 30 25 0.1 Unit V mA mA mA s kHz mV mV pF 15 t fin Vin Vin Cin 40 40 1 80 1.5 2 80 1.5 6 (18) Rev. A7, 06-Mar-01 U4223B Parameters Test Conditions / Pin ADC; D0, D1, D2, D3 Pins 17, 18, 19 and 20 Output voltage HIGH RLOAD = 870 kW to GND LOW RLOAD = 650 kW to VCC Output current HIGH VTCO = VCC/2 LOW VTCO = VCC/2 Input current into DEC Falling slope of CLK (first bit) Input current into DEC Falling slope of CLK (last bit) Input current into DEC Falling slope of CLK (step range) Input voltage at IN RF generator at IN, without (first bit) modulation rising slope of CLK Input voltage at IN RF generator at IN, without (last bit) modulation rising slope of CLK Input voltage at IN RF generator at IN, without (step range) modulation rising slope of CLK Clock input; CLK Pin 12 Input voltage swing Clock frequency Dynamical input resistance Power-ON/OFF control; PON Pin 16 Input voltage HIGH Required IIN y 0.5 mA LOW Input current VCC = 3 V VCC = 1.5 V VCC = 5 V Set-up time after PON AGC hold mode; SL Pin 13 Input voltage HIGH Required IIN y 0.5 mA LOW Input current Vin = VCC Vin = GND Rejection of interference fd – fud = 625 Hz signals Vd = 3 mV, fd = 77.5 kHz using 2 crystal filters using 1 crystal filter Symbol VOH VOL ISOURCE ISINK Idecs Idece Idecst Vmin Vmax Vstep Vswing fclk Rdyn. 50 Min VCC-0.4 0.4 3 4 –24 28 1.75 10 12 –17 35 3.5 Typ Max Unit V V mA mA nA nA nA dBmV dBmV dBmV VCC 125 mV Hz kW V V mA mA mA s V V mA mA dB dB –11 42 7 –10 75 5.5 100 100 100 VCC-0.2 IIN 1.4 1.7 0.7 3 0.5 VCC-1.2 2 t VCC-0.2 2 VCC-1.2 0.1 2.5 af af 43 22 Rev. A7, 06-Mar-01 7 (18) U4223B Test Circuit (for Fundamental Function) Test point: DVM with high and low input line for measuring a voltage Vxx or a current Ixx by conversion into a voltage Ipon Vd 1.657V Sd0 Vd0 300k Sd1 Vd1 300k Sd2 Vd2 D2 D1 300k Sd3 Vd3 D3 PON Q2B 300k Spon 1M 82p Q2A 1M Isl Ssl SL ANALOG DIGITAL CONVERTER U4223B TIME CONTROL D0 Ivcc 100k VCC STABILISATION Iin AGC– AMPLIFIER 1M IN GND SB Q1A Vcc 3V Vin ~ Ssb Vsb 1M Vrec Irec Iint Isb Figure 17. Test circuit 8 (18) ÎÎ Vrec 1M Iclk CLK Vclk FLB DECODING FLA Sdec 100M 10M RECTIFIER DEC Q1B REC INT Idec 82p 680p Srec 3.3n 420k Vdec Sint 10M 10M Vint Vint Rev. A7, 06-Mar-01 U4223B 12 10 8 Value ADC 6 4 Time-code signal 2 0 80 0 20 40 Figure 18. Example of a normal DCF signal 14 12 10 Value ADC 8 6 4 2 0 80 0 20 Field strength Time-code signal 40 Figure 19. Example of a disturbed DCF signal Rev. A7, 06-Mar-01 ÎÎÎ ÎÎÎ ÎÎÎ 60 Field strength 80 0 20 40 60 Time (Gating100/s) ÎÎ ÎÎ ÎÎ ÎÎ 60 80 0 20 40 60 Time (Gating100/s) 9 (18) U4223B Application Circuit for DCF 77.5 kHz +VCC Ferrite Antenna fres = 77.5 kHz 1 2 3 4 5 20 Control lines D0 10 nF 19 18 D1 10 nF D2 10 nF D3 10 nF PON 3) Microcomputer 17 16 77.5 kHz 2) 6 U4223B 15 14 77.5 kHz C1 6.8 nF C2 33 nF 7 8 9 10 SL 1) 13 12 11 CLK 4) Display 1) 2) 3) 4) Keyboard C3 10 nF If SL is not used, SL is connected to VCC 77.5-kHz crystal can be replaced by 10 pF If IC is activated, PON is connected to GND Voltage swing 100 mVpp at Pin 12 Figure 20. Application Circuit for WWVB 60 kHz +VCC Ferrite Antenna fres = 60 kHz 3 18 1 2 20 Control lines D0 10 nF 19 D1 10 nF D2 10 nF D3 10 nF PON 3) Microcomputer RSB 10 kW 60 kHz 2) 6 4 5 17 16 U4223B 15 14 60 kHz C1 15 nF C2 47 nF 7 8 9 10 SL 1) 13 12 11 1) 2) 3) 4) CLK 4) Display Keyboard C3 10 nF If SL is not used, SL is connected to VCC 60-kHz crystal can be replaced by 10 pF If IC is activated, PON is connected to GND Voltage swing 100 mVpp at Pin 12 Figure 21. 10 (18) Rev. A7, 06-Mar-01 U4223B Application Circuit for JG2AS 40 kHz +VCC Control lines D0 10 nF D1 10 nF D2 10 nF D3 10 nF PON 3) Microcomputer Ferrite Antenna fres = 40 kHz 1 2 3 4 5 20 19 18 17 16 40 kHz 2) 6 U4223B 15 14 40 kHz C1 680 pF 220 nF C2 7 1 MW R SL 1) 8 9 10 13 12 11 1) 2) 3) 4) CLK 4) Display Keyboard C3 10 nF If SL is not used, SL is connected to VCC 40-kHz crystal can be replaced by 22 pF If IC is activated, PON is connected to GND Voltage swing 100 mVpp at Pin 12 Figure 22. Rev. A7, 06-Mar-01 11 (18) U4223B PAD Coordinates The T4223B DIE size: PAD size: Thickness: is also available as die for “chip-on-board” mounting. 2.26 x 2.09 mm 100 x 100 mm (contact window 88 x 88 mm) 300 mm " 20 mm X-Axis/mm 128 128 354 698 1040 1290 1528 1766 2044 2044 2044 Y-Axis/mm 832 310 124 128 128 128 128 128 268 676 1072 SYMBOL CLK SL Q2A Q2B PON TCO D3 D2 D1 D0 VCC X-Axis/mm 2044 2044 2000 1634 1322 1008 696 384 128 128 128 Y-Axis/mm 1400 1638 1876 1876 1876 1876 1876 1876 1682 1454 1138 SYMBOL IN1 IN GND SB Q1A Q1B REC INT DEC FLA FLB The PAD coordinates are referred to the left bottom point of the contact window. PAD Layout D2 D1 D3 TCO PON Q2B Q2A SL D0 CLK VCC T4223B FLB IN1 FLA IN Y Axis GND SB Q1A Q1B REC INT DEC Reference point (%) X Axis 94 8892 Figure 23. 12 (18) Rev. A7, 06-Mar-01 U4223B Information on the German Transmitter Station: DCF 77, Frequency 77.5 kHz, Transmitting power 50 kW Location: Mainflingen/Germany, Geographical coordinates: 50_ 0.1’N, 09_ Time of transmission: permanent 00’E Time frame 1 minute ( index count 1 second ) Time frame 40 45 50 55 0 5 10 0 5 10 15 20 25 30 35 coding when required Example:19.35 h s 1 2 seconds 20 21 22 Start Bit R A1 Z 1 Z 2 A2 S 1 2 4 8 10 20 40 P1 1 2 4 8 10 20 P 2 1 2 4 8 10 20 1 2 4 1 2 4 8 10 1 2 4 8 10 20 40 80 P3 minutes hours calendar day month day of the week year 4 23 24 8 25 10 26 20 27 40 28 P1 29 1 30 2 31 4 32 hours 8 33 10 34 20 35 P2 minutes Parity Bit P1 Figure 24. Parity Bit P2 Modulation The carrier amplitude is reduced to 25% at the beginning of each second for a period of 100 ms (binary zero) or 200 ms (binary one), except the 59th second. Time-Code Format (based on Information of Deutsche Bundespost) The time-code format consists of 1-minute time frames. There is no modulation at the beginning of the 59th second to indicate the switch over to the next 1-minute time frame. A time frame contains BCD-coded information of minutes, hours, calendar day, day of the week, month and year between the 20th second and 58th second of the time frame, including the start bit S (200 ms) and parity bits P1, P2 and P3. Furthermore, there are 5 additional bits R (transmission by reserve antenna), A1 (announcement of change-over to summer time), Z1 (during summer time 200 ms, otherwise 100 ms), Z2 (during standard time 200 ms, otherwise 100 ms) and A2 (announcement of leap second) transmitted between the 15th second and 19th second of the time frame. Rev. A7, 06-Mar-01 13 (18) U4223B Information on the British Transmitter Station: MSF Frequency 60 kHz Transmitting power 50 kW Location: Teddington, Middlesex Geographical coordinates: 52_ 22’N, 01_ 11’W Time of transmission: permanent, except the first Tuesday of each month from 10.00 h to 14.00 h. Time frame 1 minute ( index count 1 second) Time frame 45 50 55 0 0 0 5 10 15 20 25 30 35 40 5 10 80 40 20 10 8 4 2 1 10 8 4 2 1 20 10 8 4 2 1 4 2 1 20 10 8 4 2 1 40 20 10 8 4 2 1 0 year Switch over to the next time frame month day of hour month day of week minute Parity check bits 0 500 ms 500 ms 1 minute identifier BST hour + minute day of week day + month year BST 7 GMT change impending Example: March 1993 seconds 17 80 40 20 10 8 4 2 1 10 8 4 2 1 18 19 20 21 year 22 23 24 25 26 27 28 29 30 month Figure 25. Modulation The carrier amplitude is switched off at the beginning of each second for a period of 100 ms (binary zero) or 200 ms (binary one). Time-Code Format The time-code format consists of 1-minute time frames. A time frame contains BCD–coded information of year, month, calendar day, day of the week, hours and minutes. At the switch-over to the next time frame, the carrier amplitude is switched off for a period of 500 ms. The prescence of the fast code during the first 500 ms at the beginning of the minute in not guaranteed. The transmission rate is 100 bits/s and the code contains information of hour, minute, day and month. 14 (18) Rev. A7, 06-Mar-01 U4223B Information on the US Transmitter Station: WWVB Frequency 60 kHz Transmitting power 40 kW Location: Fort Collins Geographical coordinates: 40_ 40’N, 105_ Time of transmission: permanent 03’W Time frame 1 minute ( index count 1 second) Time frame 45 50 55 0 P0 0 P 0 FM R 40 20 10 5 10 15 20 10 20 25 200 100 30 35 40 5 10 AD D SU B AD D P4 800 400 200 100 80 40 20 10 P5 8 4 2 1 8 4 2 1 P1 8 4 2 1 P2 80 40 20 10 P3 8 4 2 1 minutes hours days UTI UTI year sign correction daylight savings time bits leap second warning bit leap year indicator bit “0” = non leap year “1” = leap year Example: UTC 18.42 h Time frame P0 seconds 0 1 40 20 10 2 3 4 5 8 6 4 7 2 8 1 P1 20 10 8 4 2 1 P2 9 10 11 12 13 14 15 16 17 18 19 20 hours minutes Frame-reference marker Figure 26. Modulation The carrier amplitude is reduced by 10 dB at the beginning of each second and is restored within 500 ms (binary one) or within 200 ms (binary zero). Time-Code Format The time-code format consists of 1-minute time frames. A time frame contains BCD-coded information of minutes, hours, days and year. In addition, there are 6 position-identifier markers (P0 thru P5) and 1 framereference marker with reduced carrier amplitude of 800 ms duration. Rev. A7, 06-Mar-01 15 (18) U4223B Information on the Japanese Transmitter Station: JG2AS Frequency 40 kHz Transmitting power 10 kW Location: Sanwa, Ibaraki Geographical coordinates: 36_11’ N, 139_51’ E Time of transmission: permanent Time frame 1 minute (index count 1 second) Time frame 40 45 50 P5 0 PO FRM 40 20 10 5 10 20 10 15 20 200 10 0 25 30 35 55 0 P0 5 10 minutes hours da ys code dut1 Example: 18.42 h Time frame P0 seconds 59 0 40 20 10 1 2 3 4 5 minutes Frame-reference marker (FRM) Position-identifier marker P0 8 6 ADD SUB ADD P4 8 4 2 1 8 4 2 1 P1 8 4 2 1 P2 80 40 20 10 P3 8 4 2 1 4 7 2 8 1 P1 20 10 8 4 2 1 P2 9 10 11 12 13 14 15 16 17 18 19 20 hours Position identifier marker P1 0.5 second: Binary one 0.8 second: Binary zero 0.2 second: Identifier markers P0...P5 0.5 s “1” 0.8 s “0” 0.2 s “P” Figure 27. Modulation The carrier amplitude is 100% at the beginning of each second and is switched off after 500 ms (binary one) or after 800 ms (binary zero). Time-Code Format The time-code format consists of 1-minute time frames. A time frame contains BCD-coded information of minutes, hours and days. In addition, there are 6 positionidentifier markers (P0 thru P5) and 1 frame-reference markers (FRM) with reduced carrier amplitude of 800 ms duration. 16 (18) Rev. A7, 06-Mar-01 U4223B Package Information Package SSO20 Dimensions in mm 6.75 6.50 5.7 5.3 4.5 4.3 1.30 0.25 0.65 5.85 20 11 0.15 0.05 0.15 6.6 6.3 technical drawings according to DIN specifications 13007 1 10 Rev. A7, 06-Mar-01 17 (18) U4223B Ozone Depleting Substances Policy Statement It is the policy of Atmel Germany GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.atmel–wm.com Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423 18 (18) Rev. A7, 06-Mar-01