TMF8901B

Semiconductor TMF8901B Si RF LDMOS Transistor SOT-223 Unit in mm □ Applications - VHF and UHF wide band amplifier 6.5 3.0 □ Features - Power gain GP = 12.4 dB at VDS = 4.5 V, IDset = 200 mA, f = 470 MHz GP = 14.7 dB at VDS = 6.0 V, IDset = 200 mA, f = 470 MHz - Output power POUT = 32.4 dBm at VDS = 4.5 V, IDset = 200 mA, f = 470 MHz POUT = 34.7 dBm at VDS = 6.0 V, IDset = 200 mA, f = 470 MHz - Drain efficiency ηD = 60 % (typ.) 1 2.3 0.7 4.6 4 2 3 □ Marking 4 Pin Configuration 1. Gate 2. Source 3. Drain 4. Source 8901 1 2 3 □ Absolute Maximum Ratings (TA = 25 ℃) Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Total Power Dissipation Channel Temperature Storage Temperature Symbol VDS VGS ID Ptot Tch Tstg Ratings 13.0 4.0 1.2 5.0 150 -65 ~ 150 Unit V V A W ℃ ℃ 3.5 7.0 1 TMF8901B □ Electrical Characteristics (TA = 25 ℃) Parameter Gate to Source Leakage Current Drain to Source Leakage Current Threshold Voltage Transconductance Drain to Source Breakdown Voltage Drain to Source On-Voltage Power Gain Output Power Operating Current Drain Efficiency Power Gain Output Power Operating Current Drain Efficiency Symbol IGSS IDSS Vth Gm BVDSS VDSon GP POUT Iop ηD GP POUT Iop ηD f = 470 MHz, PIN = 20 dBm VDS = 6.0 V, IDset = 200 mA f = 470 MHz, PIN = 20 dBm VDS = 6.0 V, IDset = 200 mA Test Conditions VGSS = 3.0 V VDSS = 8.5 V, VGS = 0 V VDS = 4.8 V, ID = 1 mA VDS = 4.8 V, ID = 400 mA IDSS = 10 ㎂ VGS = 4 V, ID = 600 mA f = 470 MHz, PIN = 20 dBm VDS = 4.5 V, IDset = 200 mA f = 470 MHz, PIN = 20 dBm VDS = 4.5 V, IDset = 200 mA Min. 0.8 13 11 31 13 33 Typ. 1.0 700 0.4 12.4 32.4 600 64 14.7 34.7 805 61 Max. 1 10 1.4 Unit ㎂ ㎂ V mS V V dB dBm mA % dB dBm mA % 2 TMF8901B □ Typical Characteristics ( TA = 25℃, unless otherwise specified) Output Power, Power Gain, Drain Efficiency vs. Input Power 45 40 f = 470 MHz Iidle = 200 mA VDS = 4.5 V 90 80 45 40 f = 470 MHz Iidle = 200 mA VDS = 6.0 V POUT 90 80 70 ηD Output Power, POUT (dBm) Power Gain, GP (dB) Output Power, POUT (dBm) Power Gain, GP (dB) Drain Efficiency, ηD (%) 35 30 POUT 70 60 ηD 35 30 25 20 15 10 5 0 5 10 15 20 GP 60 50 40 30 20 10 25 25 20 15 10 5 0 5 10 GP 50 40 30 20 10 25 15 20 Input Power, PIN (dBm) Input Power, PIN (dBm) Output Power vs. Input Power 50 45 f = 470 MHz Iidle = 200 mA VDS = 6 V Drain Current vs. Input Power 1100 1000 900 f = 470 MHz Iidle = 200 mA Output Power, POUT (dBm) 40 35 30 25 20 15 10 0 5 10 15 20 25 Drain Current, IDS (mA) VDS = 6.0 V 800 700 600 500 400 300 200 100 0 0 5 10 15 20 25 VDS = 4.5 V VDS = 4.5 V Input Power, PIN (dBm) Input Power, PIN (dBm) Drain Efficiency, ηD (%) 3 TMF8901B Power Gain, Drain Efficiency vs. Drain Idle Current 18 17 16 f = 470 MHz PIN = 20 dBm VDS = 4.5 V ηD 70 68 20 19 f = 470 MHz PIN = 20 dBm VDS = 6.0 V ηD 70 68 Drain Efficiency, ηD (%) 15 14 13 12 11 10 9 8 0 50 100 150 200 250 GP 64 62 60 58 56 54 52 50 300 17 16 15 14 13 12 11 10 0 50 100 150 200 GP 64 62 60 58 56 54 52 250 50 300 Drain Idle Current, Iidle (mA) Drain Idle Current, Iidle (mA) Power Gain, Drain Efficiency vs. Drain Voltage 17 16 f = 470 MHz Iidle = 200 mA PIN = 20 dBm 70 75 Power Gain, GP (dB) 15 14 13 12 11 10 9 2 3 4 5 6 7 GP ηD 65 60 55 Drain Voltage, VDS (V) Drain Efficiency, ηD (%) Drain Efficiency, ηD (%) 66 18 66 Power Gain, GP (dB) Power Gain, GP (dB) 4 TMF8901B □ Test Circuit Schematic Diagram Port VGG R R1 R=6.8 kOhm C C5 C=10 nF L L2 L=100 nH R= MLIN TL1 Subst="MSub1" W =1.37 mm L=19 mm R R2 R=56 Ohm C C7 C=10 nF C C8 C=100 nF Port VDD L L1 Model=0.4x2.0x6T C C1 C=2.2 nF Port P_IN C C4 C=2.2 nF MLIN TL2 Subst="MSub1" W =1.37 mm L=8 mm Port P_OUT C C3 C=18 pF EE_MOS1 TMF8901B C C2 C=22 pF C C9 C=2.2 nF Test Board : 0.8mm FR4 glass epoxy 5