ACPL-061L-500E

ACPL-061L, ACPL-064L, ACPL-M61L, ACPL-W61L, ACPL-K64L Ultra Low Power 10 MBd Digital CMOS Optocouplers Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description Features The Avago ultra low power ACPL-x6xL digital optocouplers combine an AlGaAs light emitting diode (LED) and an integrated high gain photodetector. The optocoupler consumes extremely low power, at maximum 1.3mA IDD2 current per channel across temperature. With a forward LED current as low as 1.6 mA most microprocessors can directly drive the LED. x Ultra-low IDD current: 1.3 mA/channel maximum An internal Faraday shield provides a guaranteed common mode transient immunity specification of 20 kV/Ps. Maximum AC and DC circuit isolation is achieved while maintaining TTL/CMOS compatibility. x Guaranteed AC and DC performance over wide temperature: –40°C to +105°C The optocouplers CMOS outputs are slew-rate controlled and is designed to allow the rise and fall time to be controlled over a wide load capacitance range. x Safety approval – UL 1577 recognized – 3750 Vrms for 1 minute for ACPL-061L/064L/M61L and 5000 Vrms* for 1 minute for ACPL-W61L/K64L – CSA Approval – IEC/EN/DIN EN 60747-5-5 approval for Reinforced Insulation (approved for ACPL-M61L, pending approval for ACPL-064L/W61L/K64L/061L) The ACPL-x6xL series operates from both 3.3 V and 5 V supply voltages with guaranteed AC and DC performance from –40°C to +105°C. These low-power optocouplers are suitable for high speed logic interface applications. ACPL-M61L Cathode x Built-in slew-rate controlled outputs x 20 kV/Ps minimum Common Mode Rejection (CMR) at VCM = 1000 V x High speed: 10 MBd minimum x Wide package selection: SO-5, SO-8, stretched SO-6 and stretched SO-8 x RoHS compliant Functional Diagrams Anode x Low input current: 1.6 mA Applications ACPL-064L 6 VDD 5 Vo Anode1 1 8 VDD Cathode1 2 7 Vo1 Cathode2 3 6 Vo2 Anode2 4 5 GND 1 3 4 GND x Communication interfaces: RS485, CANBus and I2C x Microprocessor system interfaces x Digital isolation for A/D and D/A convertors SHIELD ACPL-061L^ NC 1 ACPL-W61L 8 VDD n ati7o NC Anode 2 m r nfo ry I 6 Vo a n Cathode 3 limi e r P NC 4 SHIELD 5 GND ACPL-K64L Anode 1 6 VDD NC* 2 5 Vo Cathode 3 4 SHIELD GND TRUTH TABLE (POSITIVE LOGIC) Anode1 1 8 VDD Cathode1 2 7 Vo1 LED OUTPUT Cathode2 3 6 Vo2 ON L Anode2 4 5 GND OFF H SHIELD * Pin 7 of the ACPL-061L is not connected A 0.1 PF bypass capacitor must be connected between pins VDD and GND. ^ Advanced information, may subject to changes. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Ordering Information The ACPL-061L, ACPL-064L and ACPL-M61L are UL Recognized with an isolation voltage of 3750 Vrms for 1 minute per UL1577. The ACPL-W61L and ACPL-K64L are UL Recognized with an isolation voltage of 5000 Vrms for 1 minute per UL1577. All devices are RoHS compliant. Option Part number RoHS Compliant Package Surface Mount ACPL-061L^ -000E SO-8 X ACPL-064L ACPL-M61L ACPL-W61L X X -560E X X -000E SO-8 X -560E X X X X X X -560E -000E -500E Stretched S08 -560E X 1500 per reel 1500 per reel X 1500 per reel 100 per tube -560E Stretched S06 1500 per reel X -500E -000E Quantity 100 per tube X SO-5 IEC/EN/ DIN EN 60747-5-5 X -500E -000E UL 5000 Vrms / 1 Minute rating 100 per tube -500E -500E ACPL-K64L Tape & Reel X 1500 per reel X X X X X X X X X 100 per tube 1000 per reel X X X X X X X X 1500 per reel 1000 per reel 80 per tube 1000 per reel X 1000 per reel To form an ordering part number, choose a part number from the part number column and combine it with the desired option from the option column. Example 1: The part number ACPL-M61L-560E describes an optocoupler with a surface mount SO-5 package; delivered in Tape and Reel with 1500 parts per reel; with IEC/EN/DIN EN 60747-5-5 Safety Approval; and full RoHS compliance. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. ^ Advanced information, may subject to changes. 2 Package Outline Drawings ACPL-061L and ACPL-064L SO-8 Package 8 7 6 5 5.994 ± 0.203 (0.236 ± 0.008) XXXV YWW 3.937 ± 0.127 (0.155 ± 0.005) LAND PATTERN RECOMMENDATION TYPE NUMBER (LAST 3 DIGITS) 7.49 (0.295) DATE CODE PIN ONE 1 2 3 4 0.406 ± 0.076 (0.016 ± 0.003) 1.9 (0.075) 1.270 BSC (0.050) 0.64 (0.025) * 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.125 ± 0.005) 7° 45° X 0.432 (0.017) 0 ~ 7° 0.228 ± 0.025 (0.009 ± 0.001) 1.524 (0.060) * Total package length (inclusive of mold flash) 5.207 ± 0.254 (0.205 ± 0.010) Dimensions in Millimeters (Inches). Lead coplanarity = 0.10 mm (0.004 inches) max. Option number 500 not marked. Note: Floating lead protrusion is 0.15 mm (6 mils) max. 0.203 ± 0.102 (0.008 ± 0.004) 0.305 MIN. (0.012) ACPL-M61L SO-5 Package MXXX XXX 4.4 ± 0.1 (0.173 ± 0.004) 7.0 ± 0.2 (0.276 ± 0.008) 0.4 ± 0.05 (0.016 ± 0.002) 3.6 ± 0.1* (0.142 ± 0.004) 2.5 ± 0.1 (0.098 ± 0.004) 0.102 ± 0.102 (0.004 ± 0.004) 0.216 ± 0.038 (0.0085 ± 0.0015) 7° MAX. 1.27 BSC (0.050) 0.71 (0.028) MIN Dimensions in Millimeters (Inches) * Maximum mold flash on each side is 0.15 mm (0.006) Note: Floating lead protrusion is 0.15 mm (6 mils) max. 3 MAX. LEAD COPLANARITY = 0.102 (0.004) ACPL-W61L Stretched SO-6 Package LAND PATTERN RECOMMENDATION 12.65 (0.498) 1.27 (0.050) BSG 0.381 0.127 (0.015 0.005) 1 6 2 5 3 4 +0.127 6.807 0 (0.268 +0.005) - 0.000 0.45 (0.018) 7° 45° +0.254 4.580 0 +0.010 (0.180 ) - 0.000 0.76 (0.030) 1.91 (0.075) 1.590 0.127 (0.063 0.005) 7° 3.180 0.127 (0.125 0.005) 0.20 0.10 (0.008 0.004) 0.750 0.250 (0.0295 0.010) 11.50 0.250 (0.453 0.010) Dimensions in Millimeters (Inches). Lead coplanarity = 0.1 mm (0.004 inches). ACPL-K63L Stretched SO-8 Package LAND PATTERN RECOMMENDATION 12.650 (0.5) 1.270 (0.050) BSG 0.381 0.13 (0.015 0.005) 0.450 (0.018) 1 8 2 7 3 6 4 5 7° 45° ) 1.905 (0.1) 1.590 0.127 (0.063 0.005) 7° 6.807 0.127 (0.268 0.005) 11.5 0.250 (0.453 0.010) 4 (0.230 +0.25 0 +0.010 - 0.000 3.180 0.127 (0.125 0.005) 0.200 0.100 (0.008 0.004) 0.750 0.250 (0.0295 0.010) 5.850 Dimensions in Millimeters (Inches). Lead coplanarity = 0.1 mm (0.004 inches). Reflow Soldering Profile The recommended reflow soldering conditions are per JEDEC Standard J-STD-020 (latest revision). Non-halide flux should be used. Regulatory Information The ACPL-061L, ACPL-064L, ACPL-M61L, ACPL-W61L and ACPL-K64L are pending approval by the following organizations: IEC/EN/DIN EN 60747-5-5 (Option 060 only) UL Approval under UL 1577 component recognition program up to VISO = 3750 VRMS for the ACPL-M61L/061L/064L and VISO = 5000 VRMS for the ACPL-W61L/K64L, File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324. Insulation and Safety Related Specifications Parameter Symbol ACPL-061L ACPL-064L ACPL-M61L ACPL-W61L ACPL-K64L Units Conditions Minimum External Air Gap (External Clearance) L(101) 4.9 5 8 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 4.8 5 8 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. 175 175 175 V DIN IEC 112/VDE 0303 Part 1 IIIa IIIa IIIa Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group 5 CTI Material Group (DIN VDE 0110, 1/89, Table 1) IEC/EN/DIN EN 60747-5-5 Insulation Characteristics* (Option 060) Characteristic Description ACPL-061L^/ ACPL- 064L/ ACPL- M61L Symbol Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage ≤ 100 Vrms I – IV I – III I – II ACPL-W61L/ ACPL- K64L Unit I – IV I – IV I – III I – III Climatic Classification 55/105/21 55/105/21 Pollution Degree (DIN VDE 0110/39) 2 2 Maximum Working Insulation Voltage VIORM 560 1140 Vpeak Input to Output Test Voltage, Method b* VIORM x 1.875=VPR, 100% Production Test with tm =1 sec, Partial discharge < 5 pC VPR 1063 2137 Vpeak Input to Output Test Voltage, Method a* VIORM x 1.6=VPR, Type and Sample Test, tm = 10 sec, Partial discharge < 5 pC VPR 896 1824 Vpeak Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 6000 8000 Vpeak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Input Current** Output Power** TS IS, INPUT PS, OUTPUT 150 150 600 175 230 600 °C mA mW Insulation Resistance at TS, VIO = 500 V RS >109 >109 : * Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/ DIN EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. ** Refer to the following figure for dependence of PS and IS on ambient temperature. Absolute Maximum Ratings Parameter Symbol Min Max Units Storage Temperature TS -55 125 °C Operating Temperature TA -40 105 °C Reverse Input Voltage VR 5 V Supply Voltage VDD 6.5 V Average Forward Input Current IF – 8 mA Peak Forward Input Current (IF at 1 Ps pulse width, |ILN| LED Current IF is momentarily: If dVCM/dt Is: Then ILP flows: and ILN flows: positive (> 0) away from the LED anode through CLA away from the LED cathode through CLC increased decreased negative (< 0) toward the LED anode through CLA toward the LED cathode through CLC decreased increased 15 Glitch Free Power-up and Power-Down Feature. 25 Rise Time (nS) Upon Powering-up or Powering-down of the optocoupler, glitches produced in the output are undesirable. Glitches can lead to false data in the optocoupler application. ACPL-x6xL has a feature that holds the output in a known state until VDD is at a safe level. Figure 13 and 14 show typical output waveforms during Power-up and Powerdown process. Rise Time (VDD = 5.0V) 30 20 15 10 10pF 33pF 5 Slew-rate controlled outputs Feature 15pF 47pF 22pF 100pF 0 -40 -20 0 20 40 Temperature (°C) 60 80 100 60 80 100 Fall Time (VDD = 5.0V) 25 20 Fall Time (nS) Typically, the output slew rate (rise and fall time) will vary with the output load, as more time is needed to charge up the higher load. The propagation delay and the PWD will increase with the load capacitance. This will be an issue especially in parallel communication because different communication line will have different load capacitances. However, Avago’s new optocoupler ACPL-x6xL has built in slew-rate controlled feature, to ensure that the output rise and fall time remain stable across wide load capacitance. Figure 15 shows the rise time and fall time for ACPL-x6xL at 3.3V and 5V. 15 10 5 0 10pF 33pF -40 -20 15pF 47pF 0 20 40 Temperature (°C) VDD2 VDD2 =1V (typ) 22pF 100pF Rise Time (V DD = 3.3V) 25 500μs High Impedence 20 Rise Time (nS) Output High Impedence i. LED is off 15 10 10pF 33pF 5 Figure 13. VDD Ramp when LED is off. 15pF 47pF 22pF 100pF 0 -40 VDD2 =2V (typ) -20 0 20 40 Temperature (°C) 60 80 100 Fall Time (V DD = 3.3V) VDD2 25 VDD2 =1V (typ) Output High Impedence 15 10 10pF 33pF 5 500μs ii. LED is on Figure 14. VDD Ramp when LED is on. 16 High Impedence Rise Time (nS) 20 discharge delay, depending on the power supply slew rate 15pF 47pF 22pF 100pF 0 -40 -20 0 20 40 Temperature (°C) 60 80 100 Figure 15. Rise and Fall time of ACPL-x6xL across wide load capacitance Speed Improvement V DD2 = 5 V, I F = 2 mA T PHL 50 t P or PWD (ns) A peaking capacitor can be placed across the input current limit resistor (Figure 11) to achieve enhanced speed performance. The value of the peaking cap is dependent to the rise and fall time of the input signal and supply voltages and LED input driving current (IF). Figure 12 shows significant improvement of propagation delay and pulse with distortion with added peak capacitor at driving current of 2mA and 3.3V/5V power supply. 60 40 T PHL 0 -40 -20 0 20 40 Temp (°C) 60 80 100 (i) VDD2 = 5V, Cpeak = 47pF, R1 = 845Ω R1 VO 0.1μF − VDD2 = 3.3 V, I F = 2 mA 60 T PHL 50 SHIELD GND 2 Figure 16. Connection of peaking capacitor (Cpeak) in parallel of the input limiting resistor (R1) to improve speed performance t P or PWD (ns) R2 GND 1 No Peaking With Peaking PWD 20 V DD2 Vin T PLH 30 10 C peak + T PLH T PLH 40 30 No Peaking With Peaking T PLH T PHL 20 10 0 -40 PWD -20 0 20 40 Temp (°C) 60 80 100 (ii) VDD2 = 3.3V, Cpeak = 47pF, R1 = 430Ω Figure 17. Improvement of tp and PWD with added 47pF peaking capacitor in parallel of input limiting resistor. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, the A logo and R2Coupler™ are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. AV02-2150EN - April 8, 2010