ACPL-H342-560E

ACPL-H342 and ACPL-K342 2.5 Amp Output Current IGBT Gate Drive Optocoupler with Active Miller Clamp, Rail-to-Rail Output Voltage and UVLO in Stretched SO8 Data Sheet Description Features The ACPL-H342/ACPL-K342 contains an AlGaAs LED, which is optically coupled to an integrated circuit with a power output stage. This optocoupler is ideally suited for driving power IGBTs and MOSFETs used in motor control inverter applications. The high operating voltage range of the output stage provides the drive voltages required by gate controlled devices. The voltage and high peak output current supplied by this optocoupler make it ideally suited for direct driving IGBT with ratings up to 1200V/150A. For IGBTs with higher ratings, the ACPL-H342/ACPL-K342 can be used to drive a discrete power stage which drives the IGBT gate. The ACPL-H342 and ACPL-K342 have the highest insulation voltage of VIORM = 891 Vpeak and 1140 Vpeak, respectively, in the IEC/ EN/DIN EN 60747-5-5.              2.5 A maximum peak output current 2.0A minimum peak output current Built-in active Miller clamp Rail-to-rail output voltage Fast propagation delay to minimize dead time tPHL < tPLH to provide “anti-cross” conduction LED input threshold current hysteresis ICC = 2.5 mA maximum supply current to allow boot-strap power supply Under voltage lock-out protection (UVLO) with hysteresis 40 kV/μs minimum common mode tejection (CMR) at VCM = 1500V Wide operating VCC range: 15V to 30V Industrial temperature range: –40°C to 105°C Safety approval: — UL Recognized 3750/5000 VRMS for 1min. — CSA — IEC/EN/DIN EN 60747-5-5 VIORM = 891/1140 Vpeak Applications      IGBT/MOSFET gate drive AC and brushless DC motor drives Renewable energy inverters Industrial inverters Switching power supplies CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The components featured in this data sheet are not to be used in military or aerospace applications or environments. Broadcom -1- ACPL-H342 and ACPL-K342 Data Sheet Functional Diagram ANODE 1 8 VCC NC 2 7 VOUT CATHODE 3 6 VCLAMP 5 VEE VVCLAMP CLAMP NC NOTE 4 A 1-μF bypass capacitor must be connected between pins VCC and VEE. Truth Table LED VCC – VEE “POSITIVE GOING” (that is, TURN-ON) VCC – VEE “NEGATIVE GOING” (that is, TURN-OFF) VO VCLAMP OFF 0–30V 0–30V LOW LOW ON 0–11V 0–9.5V LOW LOW ON 11–13.5V 9.5–12V TRANSITION TRANSITION ON 13.5–30V 12–30V HIGH Hi-Z Ordering Information ACPL-H342 is UL Recognized with 3750 VRMS for 1 minute per UL1577. ACPL-K342 is UL Recognized with 5000 VRMS for 1 minute per UL1577. Part Number ACPL-H342 ACPL-K342 Option (RoHS Compliant) Package -000E Stretched SO-8 Surface Mount Tape and Reel X -060E X -560E X Stretched SO-8 IEC/EN/DIN EN 60747-5-5 X -500E -000E UL 5000 VRMS/ 1 Minute Rating 80 per tube X X -060E X -560E X 1000 per reel X X -500E Quantity X 80 per tube X 1000 per reel X X X 80 per tube X 1000 per reel X X 80 per tube X X 1000 per reel Example 1: ACPL-H342-560E to order product of Stretched SO-8 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval and RoHS compliant. Example 2: ACPL-K342-000E to order product of Stretched SO-8 Surface Mount package in Tube packaging with UL 5000 VRMS/1 minute and RoHS compliant. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. Broadcom -2- ACPL-H342 and ACPL-K342 Data Sheet Package Outline Drawings ACPL-H342 Outline Drawing 0.381 0.015 + 0.127 0 + 0.005 1.270 0.050 * 5.850 0.230 + 0.254 0 + 0.010 Land Pattern Recommendation 0.76 (0.03) 1.27 (0.05) 7.620 0.300 6.807 0.268 0.450 0.018 1.590 ±0.127 0.063 ±0.005 3.180 ±0.127 0.125 ±0.005 45° 7° 2.16 (0.085) 10.7 (0.421) 7° 0.200 ±0.100 0.008 ±0.004 7° 1 ±0.250 0.040 ±0.010 5° NOM. 9.7 ±0.25 0.382 ±0.010 0.254 ±0.050 0.010 ±0.002 7° Lead Coplanarity = 0.1mm [0.004 Inches] * Total package length (inclusive of mold flash) 6.100 ± 0.250 (0.240 ± 0.010) Floating Lead protusions max. 0.25 [0.0] Dimensions in Millimeters [Inches] Broadcom -3- ACPL-H342 and ACPL-K342 Data Sheet ACPL-K342 Outline Drawing + 0.25 0 ª0.230 + 0.010º – 0.000¼ ¬ *5.850 1.270BSG ª º ¬ 0.050 ¼ 0.381 ±0.13 ª º ¬0.015 ±0.005¼ 1 8 2 7 3 6 4 5 Land Pattern Recommendation 0.76 (0.03) 1.27 (0.05) 7.62 0.300 º¼ 6.807 ±0.127 ª º ¬0.268 ±0.005¼ ª ¬ ª ¬ 0.450 0.018 º¼ 0.200 ±0.100 0.008 ±0.004º¼ 0.750 ±0.25 ª º ¬0.0295 ±0.01¼ ª ¬ 45° 7° 7° 35° NOM. ª ¬ ª ¬ 12.65 (0.5) 1.590 ±0.127 0.063 ±0.005º¼ ª ¬ ª ¬ 3.180 ±0.127 0.125 ±0.005º¼ 0.254 ±0.050 0.010 ±0.002º¼ 1.905 (0.075) 7° 7° 11.5 ±0.250 0.453 ±0.010º¼ Lead Coplanarity = 0.1mm [0.004 Inches] * Total package length (inclusive of mold flash) 6.100 ± 0.250 (0.240 ± 0.010) Floating Lead protusions max. 0.25 [0.0] Dimensions in Millimeters [Inches] Recommended Pb-Free IR Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non- Halide Flux should be used. Regulatory Information The ACPL-H342 / ACPL-K342 is approved by the following organizations:  UL Recognized under UL 1577, component recognition program up to VISO = 3750 VRMS (ACPL-H342) and VISO = 5000 VRMS (ACPL-K342), File 55361.  CSA CSA Component Acceptance Notice #5, File CA 88324.  IEC/EN/DIN EN 60747-5-5 (ACPL-H342/K342 Option 060 Only) Maximum Working Insulation Voltage VIORM = 891Vpeak (ACPL-H342) and VIORM = 1140 Vpeak (ACPL-K342). Broadcom -4- ACPL-H342 and ACPL-K342 Data Sheet IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (ACPL-H342 / ACPL-K342 Option 060) ACPL-H342 Option 060 ACPL-K342 Option 060 I – IV I – IV I – III I – III I – IV I – IV I – IV I – IV I – III 40/105/21 40/105/21 2 2 VIORM 891 1140 Vpeak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm=1s, Partial discharge < 5 pC VPR 1671 2137 Vpeak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and Sample Test, tm=10s, Partial discharge < 5 pC VPR 1426 1824 Vpeak VIOTM 6000 8000 Vpeak TS 175 230 600 175 230 600 °C mA mW >109 >109  Description Symbol Installation classification per DIN VDE 0110/39, Table 1f or rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 450 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage ≤ 1000 Vrms Climatic Classification Pollution Degree (DIN VDE 0110/39) Maximum Working Insulation Voltage Highest Allowable Overvoltagea (Transient Overvoltage tini = 60s) Safety-limiting values – maximum values allowed in the event of a failure Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V a. IS, INPUT PS, OUTPUT RS Units Refer to IEC/EN/DIN EN 60747-5-5 Optoisolator Safety Standard section of the Broadcom Regulatory Guide to Isolation Circuits, AV02-2041EN, for a detailed description of Method a and Method b partial discharge test profiles. NOTE These optocouplers are suitable for “safe electrical isolation” only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Surface mount classification is Class A in accordance with CECC 00802. Broadcom -5- ACPL-H342 and ACPL-K342 Data Sheet Insulation and Safety Related Specifications Parameter Symbol ACPL-H342 ACPL-K342 Units Conditions Minimum External Air Gap (Clearance) L(101) 7.0 8.0 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 8.0 8.0 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. > 175 > 175 V IIIa IIIa Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group NOTE CTI DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) All Broadcom data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must be met as specified for individual equipment standards. For creepage, the shortest distance path along the surface of a printed circuit board between the solder fillets of the input and output leads must be considered (the recommended land pattern does not necessarily meet the minimum creepage of the device). There are recommended techniques such as grooves and ribs which may be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors such as pollution degree and insulation level. Broadcom -6- ACPL-H342 and ACPL-K342 Data Sheet Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature TS –55 125 °C Operating Temperature TA –40 105 °C Output IC Junction Temperature TJ — 125 °C Average Input Current IF(AVG) — 25 mA Peak Transient Input Current ( 5V VF 1.2 1.55 1.95 V Temperature Coefficient of Input Forward Voltage VF/TA — –1.7 — mV/°C Input Reverse Breakdown Voltage BVR 5 — — V IR = 100 μA Input Capacitance CIN — 70 — pF f = 1 MHz, VF = 0V VUVLO+ 11.0 12.3 13.5 V VO > 5V, IF = 10 mA VUVLO- 9.5 10.7 12.0 UVLOHYS — 1.4 — Clamp Output Transistor RDS(ON) Input Forward Voltage UVLO Threshold UVLO Hysteresis a. Maximum pulse width = 50 μs. b. Maximum pulse width = 10 μs. 14, 16, 27 b 15,16, 28 IF = 10 mA c. In this test, VOH is measured with a DC load current. When driving capacitive loads, VOH will approach VCC as IOH approaches 0 amps. d. Maximum pulse width = 1 ms. Broadcom -8- a 2, 4, 25 1 12, 13, 29 22 30 c, d ACPL-H342 and ACPL-K342 Data Sheet Switching Specifications (AC) Unless otherwise noted, all typical values are at TA = 25°C, VCC – VEE = 30V, VEE = Ground; all Minimum/Maximum specifications are at recommended operating conditions (TA = –40°C to 105°C, IF(ON) = 7 mA to 16 mA, VF(OFF) = –3.6V to 0.8V, VCC = 15V to 30V, VEE = Ground) Parameter Symbol Min. Typ. Max. Units Propagation Delay Time to High Output Level tPLH 0.100 0.260 0.350 μs Propagation Delay Time to Low Output Level tPHL 0.050 0.145 0.250 μs PDD (tPHL – tPLH) –0.010 –0.100 –0.200 μs Rise Time tR — 22 — ns Fall Time tF — 18 — ns |CMH| 40 50 — kV/μs 25 35 — 40 50 — 25 35 — Propagation Delay Difference Between Any Two Parts Output High Level Common Mode Transient Immunity Output Low Level Common Mode Transient Immunity |CML| Test Conditions Rg = 10 , Cg = 25 nF, f = 20 kHz , Duty Cycle = 50%, IF = 7 mA to 16 mA, VCC = 15V to 30V Figure Note 17, 18, 19, 20, 21, 31 a 39, 40 b VCC = 30V 31 TA = 25 °C, IF = 10 mA, VCC = 30V, VCM = 1500V with split resistors 32 c, d 32 c, e TA = 25 °C, IF = 10 mA, VCC = 30V, VCM = 1000V without split resistors kV/μs TA = 25 °C, VF = 0V, VCC = 30V, VCM = 1500V with split resistors, TA = 25 °C, VF = 0V, VCC = 30V, VCM = 1000V without split resistors a. This load condition approximates the gate load of a 1200V/150A IGBT. b. The difference between tPHL and tPLH between any two ACPL-H342 parts under the same test condition. c. Pins 2 and 4 need to be connected to LED common. d. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in the high state (that is, VO > 15.0V). e. Common mode transient immunity in a low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a low state (that is, VO < 1.0V). Broadcom -9- ACPL-H342 and ACPL-K342 Data Sheet Package Characteristics Unless otherwise noted, all typical values are at TA = 25 °C; all Minimum/Maximum specifications are at recommended operating conditions. Parameter Symbol Device Min. Typ. Max. Units Test Conditions Input-Output Momentary Withstand Voltagea VISO ACPL-H342 3750 — — VRMS RH < 50%, t = 1 min., TA = 25°C bc ACPL-K342 5000 — — VRMS RH < 50%, t = 1 min., TA = 25°C c,d Input-Output Resistance RI-O — > 5012 —  VI-O = 500 VDC Input-Output Capacitance CI-O — 0.2 — pF f =1 MHz LED-to-Ambient Thermal Resistance R11 — 145 — °C/W LED-to-Detector Thermal Resistance R12, R21 — 25, 38 — R22 — 46 — Detector-to-Ambient Thermal Resistance Thermal Model in Application Notes Below Figure Note , c e a. The input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to your equipment level safety specification or Broadcom Application Note 1074, Optocoupler Input-Output Endurance Voltage. b. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second leakage detection current limit, II-O ≤ 5 mA). c. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together. d. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 Vrms for 1 second (leakage detection current limit, II-O ≤ 5 mA). e. The device was mounted on a high conductivity test board as per JEDEC 51-7. Broadcom - 10 - ACPL-H342 and ACPL-K342 Data Sheet Figure 1 High Output Rail Voltage vs. Temperature Figure 2 VOH vs. Temperature 0 IF = 10 mA VCC = 30 V VEE = 0 V 29.974 29.973 29.972 29.971 29.97 29.969 29.968 29.967 29.966 -1.2 TA = 25°C -0.4 IOH - OUTPUT HIGH CURRENT - A IOH - OUTPUT HIGH CURRENT - A -1 0.00 -0.6 -0.8 -1 -1.2 Figure 5 VOL vs. Temperature -0.50 -1.00 -1.50 -2.00 -2.50 0.00 -1.4 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 1.00 3.00 4.00 5.00 2.00 (VOH - VCC) - HIGH OUTPUT VOLTAGE DROP - V 6.00 Figure 6 IOL vs. Temperature 4 0.12 0.1 IOL - OUTPUT LOW CURRENT - A VOL - OUTPUT LOW VOLTAGE - V -0.8 Figure 4 IOH vs. VOH IF = 10 mA VOUT = (VCC – 4 V) VCC = 15 to 30 V VEE = 0 V -0.2 0.08 0.06 0 -0.6 -1.6 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 0 0.02 -0.4 -1.4 Figure 3 IOH vs. Temperature 0.04 IF = 10 mA IOUT = -100 mA VCC = 15 to 30 V VEE = 0 V -0.2 (VOH - VCC) - HIGH OUTPUT VOLTAGE DROP - V VOH - HIGH OUTPUT RAIL VOLTAGE- V 29.975 VF(OFF) = 0 V IOUT = 100 mA VCC = 15 to 30 V VEE = 0 V 3.5 3 2.5 2 1.5 1 0.5 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Broadcom - 11 - VF(OFF) = 0 V VOUT = 2.5 V VCC = 15 to 30 V VEE = 0 V -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C ACPL-H342 and ACPL-K342 Data Sheet Figure 8 RDS,OH vs. Temperature 3.0 3.5 2.5 3 RDS,OH - HIGH OUTPUT TRANSISTOR RDS(ON) - : IOL - OUTPUT LOW CURRENT - A Figure 7 IOL vs. VOL 2.0 1.5 1.0 0.5 0.0 TA = 25°C VF(OFF) = 0 V 0 1 2 VOL - OUTPUT LOW VOLTAGE - V Figure 10 ICC vs. Temperature 2.5 ICC - SUPPLY CURRENT -mA RDS,OL - LOW OUTPUT TRANSISTOR RDS (ON) - : IF = 10 mA IOUT = -2 A VCC = 15 to 30 V VEE = 0 V 1 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C VF(OFF) = 0 V IOUT = 2 A VCC = 15 to 30 V VEE = 0 V 2 1.5 1 IF = 10 mA for ICCH IF = 0 mA for ICCL VCC = 30 V VEE = 0 V 0.5 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C ICCH ICCL -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 12 IFLH Hysteresis 35 2.5 TA = 25°C VCC = 30 V VEE = 0 V 30 2 VO - OUTPUT VOLTAGE- V ICC - SUPPLY CURRENT - mA 1.5 3 Figure 11 ICC vs. VCC 1.5 1 IF = 10 mA for ICCH IF = 0 mA for ICCL TA = 25°C VEE = 0 V 0.5 0 2 0.5 Figure 9 RDS,PL vs. Temperature 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 2.5 ICCH ICCL 25 20 15 10 IFLH ON IFLH OFF 5 0 15 20 25 VCC - SUPPLY VOLTAGE - V 30 0.0 Broadcom - 12 - 0.5 1.0 1.5 2.0 2.5 IFLH - LOW TO HIGH CURRENT THRESHOLD - mA 3.0 ACPL-H342 and ACPL-K342 Data Sheet Figure 13 IFLH vs. Temperature Figure 14 ICLAMP vs. Temperature ICLAMP - CLAMP OUTPUT PEAK CURRENT - A IFLH - LOW TO HIGH CURRENT THRESHOLD - mA 2.5 VCC = 15 to 30 V VEE = 0 V 2.0 1.5 1.0 0.5 0.0 IFLH ON IFLH OFF -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 15 VtCLAMP vs. Temperature ICLAMP - CLAMP OUTPUT PEAK CURRENT - A VtCLAMP - CLAMP PIN THRESHOLD - V 3 2.5 2 1.5 1 VCC = 15 V VEE = 0 V 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 17 Propagation Delay vs. VCC 2.5 2 1.5 1 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 3.0 2.0 1.5 1.0 0.5 0.0 -0.5 250 250 TPHL TPLH 150 IF = 7 mA TA = 25°C Rg = 10 :, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 50 0 15 20 25 VCC - SUPPLY VOLTAGE - V 0.5 1 1.5 2 VtCLAMP - CLAMP PIN THRESHOLD - V 2.5 Figure 18 Propagation Delay vs. IF 300 100 TA = 25°C 2.5 300 200 VCC = 15 to 30 V VEE = 0 V VOUT = 2.5 V 0.5 0 TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns 3 Figure 16 ICLAMP vs. VtCLAMP 3.5 0.5 3.5 150 Broadcom - 13 - VCC = 30 V, VEE = 0 V TA = 25°C Rg = 10 :, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 100 50 0 30 TPHL TPLH 200 6 8 10 12 IF - FORWAR LED CURRENT - mA 14 16 ACPL-H342 and ACPL-K342 Data Sheet Figure 19 Propagation Delay vs. Temperature Figure 20 Propagation Delay vs. Rg 300 TPHL TPLH 300 TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns 350 250 200 150 IF = 7 mA VCC = 30 V, VEE = 0 V Rg = 10 :, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 100 50 0 150 VCC = 30 V, VEE = 0 V IF = 7 mA, TA = 25°C Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 100 50 0 5 10 15 20 25 30 35 40 Rg - SERIES LOAD RESISTANCE - : 45 50 Figure 22 Input Current vs. Forward Voltage 100 300 250 IF - FORWARD CURRENT - mA TP - PROPAGATION DELAY - ns TPLH TPHL 200 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 21 Propagation Delay vs. Cg 250 TPLH TPHL 200 150 VCC = 30 V, VEE = 0 V IF = 7 mA, TA = 25°C Rg = 10 : DUTY CYCLE = 50% f = 20 kHz 100 50 0 0 5 10 15 20 25 30 35 Cg - LOAD CAPACITANCE - nF 40 45 10 1 0.1 1.4 50 Broadcom - 14 - 1.45 1.5 1.55 1.6 VF - FORWARD VOLTAGE - VOLTS 1.65 ACPL-H342 and ACPL-K342 Data Sheet Figure 23 IOH Test Circuit 4V Pulsed 1 8 + _ 1PF IF = 10mA 2 VCC = 15 to 30V 7 + _ IOH 3 VVCLAMP CLAMP 4 6 5 Figure 24 IOL Test Circuit 1 8 2 7 1PF IOL 3 + _ 6 2.5V Pulsed VVCLAMP CLAMP 4 VCC = 15 to 30V + _ 5 Figure 25 VOH Test Circuit IF = 10mA 1 8 2 7 1PF 3 VCC = 15 to 30V VOH + _ 6 VVCLAMP CLAMP 4 100mA 5 Figure 26 VOL Test Circuit 1 8 2 7 1PF 3 VOL 6 VVCLAMP CLAMP 4 5 Broadcom - 15 - 100mA VCC = 15 to 30V + _ ACPL-H342 and ACPL-K342 Data Sheet Figure 27 ICLAMP Test Circuit 1 8 1PF VCC = 15 to 30V 2 7 + _ ICLAMP 3 6 + _ VVCLAMP CLAMP 4 5 2.5V Pulsed Figure 28 VtCLAMP Test Circuit 1 8 2 7 1PF 3 VtCLAMP 6 VVCLAMP CLAMP 4 1k: VCC = 15 to 30V 3V + _ + _ 5 Figure 29 IFLH Test Circuit 1 8 2 7 1PF IF 3 VVCLAMP CLAMP 4 VCC = 15 to 30V VO > 5V 10: 6 25nF 5 Figure 30 UVLO Test Circuit 1 8 2 7 1PF IF = 10mA 3 VO > 5V 6 VVCLAMP CLAMP 4 5 Broadcom - 16 - + _ + _ ACPL-H342 and ACPL-K342 Data Sheet Figure 31 TPLH, tPHL, tr, and tf Test Circuit and Waveforms IF = 7 to 16mA, 20kHz, 50% Duty Cycle 1 8 2 7 3 6 IF 1PF VO VCC = 15 to 30V tr tf + _ 90% 10: VVCLAMP CLAMP 4 50% 25nF V OUT 10% 5 tPLH tPHL Figure 32 CMR Test Circuit with Split Resistors Network and Waveforms V CM 170 ohm 1 5V + _ δV 8 δt 1PF 2 170 ohm 3 7 VVCLAMP CLAMP 4 VO VCC = 30V + _ 6 = V CM Δt 0V Δt VO V OH SWITCH AT A: IF = 10 mA 5 VO V OL + _ SWITCH AT B: IF = 0 mA VCM = 1500V Application Information This feature rich IGBT gate driver is designed to increase the performance and reliability of a motor drive without the cost, size, and complexity of external circuitry or control. Product Overview Description The ACPL-H342/K342 is an optically isolated power output stage capable of driving IGBTs of up to 150A and 1200V. It has very high CMR rating which allows the microcontroller and the IGBT to operate at very large common mode noise found in industrial motor drives and other power switching applications. And to achieve better system reliability in such noisy environment, this power control device incorporates new features like active Miller clamp, rail-to-rail output voltage, anti-cross conduction and LED input current hysteresis. The active Miller clamp function eliminates the need of negative gate drive in most application and allows the use of simple bootstrap supply for high side driver. Rail-to-rail output voltage ensures that the IGBT’s gate voltage is driven to the optimum intended level with no power loss across IGBT. Anti-cross conduction prevents current shoot through between the high and low side of half bridge IGBT configuration. This will help to simplify the controller design in terms of having to account for the delay needed at the LED input. And lastly, the LED input current hysteresis prevents output oscillation if insufficient LED driving current is applied. This will eliminates the need of additional Schmitt trigger circuit at the input LED. Recommended Application Circuit The recommended application circuit shown in Figure 33 illustrates a typical gate drive implementation using the ACPL-H342. The following describes about driving IGBT. However, it is also applicable to MOSFET. Designers will need to adjust the VCC supply voltage, depending on the MOSFET or IGBT gate threshold requirements (recommended VCC = 18V for IGBT and 12V for MOSFET). The supply bypass capacitors (1 μF) provide the large transient currents necessary during a switching transition. Because of the transient nature of the charging currents, a low current (2.5mA) power supply will be enough to power the device. The split resistors across the LED will provide a high CMR response by providing a balanced resistance network across the LED. The gate resistor RG serves to limit gate charge current and controls the IGBT collector voltage rise and fall times. In PC board design, care should be taken to avoid routing the IGBT collector or emitter traces close to the ACPL-H342 input as this can result in unwanted coupling of transient signals into ACPL-H342 and degrade performance. Broadcom - 17 - ACPL-H342 and ACPL-K342 Data Sheet Figure 33 Recommended Application Circuit with Split Resistors LED Drive and Active Miller Clamp R 1 ANODE VCC VCC=18V 8 RG + _ 2 NC 3 CATHODE 4 NC VOUT 7 VCLAMP 6 VEE 5 Q1 1PF R + HVDC + _ Q2 + VCE - 3-PHASE AC + VCE -HVDC Active Miller Clamp Rail-to-Rail Output A Miller clamp allows the control of the Miller current during a high dV/dt situation. And it can also eliminate the use of a negative supply voltage by quickly discharging the large gate capacitance of IGBT to low level without affecting the IGBT turn-off characteristics. During turn-off, the gate voltage is monitored and the clamp output is activated when gate voltage goes below 2.3V (relative to VEE). The clamp voltage is VOL + 2.5V typ for a Miller current up to 2.5A. The clamp is disabled when the LED input is triggered again. Figure 34 shows a typical gate driver’s high current output stage with three bipolar transistors in darlington configuration. During the output high transition, the output voltage rises rapidly to within three diode drops of VCC. To ensure the VOUT is at VCC in order to achieve IGBT rated VCE(ON) voltage. The level of VCC will be need to be raised to beyond VCC + 3(VBE) to account for the diode drops. And to limit the output voltage to VCC, a pull-down resistor, RPULL-DOWN between the output and VEE is recommended to sink a static current while the output is high. The AN5314 application note describes how the clamp reduces the parasitic turn-on effect due to the Miller capacitor and at the same time eliminates the need of a negative power supply. The Miller pin should be connected to VEE when not in use. ACPL-H342 uses a power NMOS follower stage to deliver the initial large current and a smaller PMOS to pull it to VCC to achieve rail-to-rail output voltage as shown in Figure 35. This ensures that the IGBT’s gate voltage is driven to the optimum intended level with no power loss across IGBT even when an unstable power supply is used. Broadcom - 18 - ACPL-H342 and ACPL-K342 Data Sheet Figure 34 Typical Gate Drive with Output Stage in Darlington Configuration 8 ANODE VCC 1 RG 7 NC 2 CATHODE 3 6 NC 4 VEE 5 VOUT RPULL-DOWN Figure 35 ACP-H342 with NMOS and PMOS Output Stage for Rail-to-Rail Output Voltage ANODE 1 8 VCC NC 2 7 VOUT CATHODE 3 6 VCLAMP 5 VEE VVCLAMP CLAMP NC 4 Broadcom - 19 - ACPL-H342 and ACPL-K342 Data Sheet Selecting the Gate Resistor (Rg) Step 1: Calculate Rg minimum from the IOL peak specification. The IGBT and Rg in Figure 33 can be analyzed as a simple RC circuit with a voltage supplied by ACPL-H342/K342. Rg ≥ VCC – VEE – VOL IOLPEAK = 18V – 0V – 2.3V 2.5A = 6.28:| 7: The VOL value of 2.3V in the previous equation is the VOL at the peak current of 2.5A (see Figure 7). Step 2: Check the ACPL-H342/K342 power dissipation and increase Rg if necessary. The ACPL-H342/K342 total power dissipation (PT) is equal to the sum of the emitter power (PE) and the output power (PO). PT = PE + PO PE = IF × VF × Duty Cycle PO = PO(BIAS) + PO(SWITCHING) = ICC × (VCC– VEE) + ESW(Rg;Qg) × f Using IF(worst case) = 16 mA, Rg = 7, Max Duty Cycle = 80%, Qg = 500 nC, f = 25 kHz and TA max = 85°C: PE = 16 mA × 1.95V × 0.8 = 25 mW PO = 2.5 mA × 18V + 4μJ × 25 kHz = 45 mW + 100 mW = 145 mW < 500 mW (PO(MAX) @ 85°C) The value of 2.5mA for ICC in the previous equation is the maximum ICC over the entire operating temperature range. Since PO is less than PO(MAX), Rg = 7 is alright for the power dissipation. Esw - ENERGY PER SWITCHING CYCLE - PJ Figure 36 Energy Dissipated in the ACPL-H342/K342 for Each IGBT Switching Cycle 8 Qg = 100nc Qg = 500nc Qg = 1000nc 7 6 5 4 3 2 1 0 0 10 20 30 Rg - GATE RESISTANCE - : 40 50 Broadcom - 20 - ACPL-H342 and ACPL-K342 Data Sheet Anti-Cross Conduction to Prevent Current Shoot Through and Determining Dead Time The ACPL-H342 includes a Propagation Delay Difference (PDD = tPHL – tPLH ) specification to help prevent both the high(Q1) and low(Q2) side power transistors from turning on at the same time. This “Anti-Cross” conduction feature prevents large currents from flowing through the power transistors by ensuring tPHLMAX is faster than tPLHMIN. In another words, the “Anti-Cross” feature will ensure one power transistor is turned off before the other is turned on. A gate driver without Anti-Cross feature will for example has a PDDMIN of –350 ns and a PDDMAX of 350 ns. A positive PDDMAX of 350 ns would mean one transistor will be turn on before the other is off since tPHLMAX is longer than tPLHMIN. This is shown in Figure 37. To prevent this and the shoot through current, the turn on of LED2 should be delayed (relative to the turn off of LED1) so that under worst-case conditions, Q1 has just turned off when Q2 turns on. The amount of delay to achieve this condition is equal to PDDMAX as shown in Figure 38. R High Side PWM + HVDC RG LED1 VOUT1 Q1 R AC Low Side PWM RG LED2 VOUT2 Q2 -HVDC Figure 37 Current Shoot Through without Anti-Cross Feature Figure 38 Adding Delay to Prevent Shoot Through ILED1 ILED1 VOUT1 VOUT1 Q1 ON tPHLMAX Q1 ON tPHLMAX Q1 OFF Q2 ON Q2 ON VOUT2 Q2 OFF Q1 OFF tPLHMIN VOUT2 ILED2 ILED2 Shoot Through Q2 OFF tPLHMIN PDDMAX = tPHLMAX - tPLHMIN = 350 ns Broadcom - 21 - ACPL-H342 and ACPL-K342 Data Sheet The ACPL-H342 with the Anti-Cross feature has a PDDMIN of –10 ns and a PDDMAX of –200 ns. Since the PDD is always a negative value, the tPHLMAX is always faster than tPLHMIN. Thus this simplified the design without having to add any amount of delay for the input LEDs as shown in Figure 39. Symbol Min. Typ. Max. Units tPLH 0.100 0.260 0.350 μs tPHL 0.050 0.145 0.250 μs PDD (tPHL – tPLH) –0.010 –0.100 –0.200 μs Figure 39 Anti-Cross to Prevent Shoot Through Dead time is the time period during which both the high(Q1) and low(Q2) side transistor are off. During this time, no work is done and this reduces the efficiency of the inverter or motor drive. The minimum and maximum dead time is shown in Figure 39 and Figure 40 and is equivalent to the PDDMIN and PDDMAX. Due to the smaller PDD and skewed propagation delay configuration, ACPL-H342 shows a smaller maximum dead time as compared to its predecessor, HCPL-3120 as shown in Figure 41 and hence an improve in efficiency. Note that the propagation delays used to calculate PDD and dead time are taken at equal temperature and test conditions since the optocouplers under consideration are typically mounted in close proximity to each other and are switching identical IGBTs. Figure 41 HCPL-3120 Maximum Dead Time ILED1 ILED1 VOUT1 Q1 ON tPHLMAX Q1 OFF tPLHMAX VOUT2 Q2 OFF VOUT1 Q1 ON tPHLMIN Q2 ON tPLHMIN Q1 OFF tPHLMAX Q2 ON VOUT2 Q2 OFF ILED2 PDDMIN = -10 ns = Minimum Dead Time ILED2 Maximum Dead Time = (tPHLMAX – tPHLMIN) + (tPLHMAX – tPLHMIN) = (tPHLMAX – tPLHMIN) + (tPHLMIN – tPLHMAX) = PDDMAX – PDDMIN = 350 – (-350) = 700 ns Figure 40 Determining Maximum Dead Time ILED1 VOUT1 Q1 ON VOUT2 Q2 OFF tPLHMIN tPLHMAX tPHLMIN Q1 OFF tPLHMAX Q2 ON tPLHMIN ILED2 PDDMAX = -200 ns = Minimum Dead Time Broadcom - 22 - ACPL-H342 and ACPL-K342 Data Sheet LED Input Current Hysteresis Ambient Temperature: Junction to ambientthermal resistances were measured approximately 1.25 cm above optocoupler at ~23°C in still air. The detector has optical receiver input stage with built-in Schmitt trigger to provide logic compatible waveforms, eliminating the need for additional wave shaping. The hysteresis (Figure 12) provides differential mode noise immunity and minimizes the potential for output signal chatter. Thermal Resistance °C/W R11 145 R12, R21 25, 38 R22 46 Under Voltage Lockout The ACPL-H342 under voltage lockout (UVLO) feature is designed to prevent the application of insufficient gate voltage to the IGBT by forcing the ACPL-H342 output low during power-up. IGBTs typically require gate voltages of 15V to achieve their rated VCE(ON) voltage. At gate voltages below 13V typically, the VCE(ON) voltage increases dramatically, especially at higher currents. At very low gate voltages (below 10V), the IGBT may operate in the linear region and quickly overheat. The UVLO function causes the output to be clamped whenever insufficient operating supply (VCC) is applied. Once VCC exceeds VUVLO+ (the positive-going UVLO threshold), the UVLO clamp is released to allow the device output to turn on in response to input signals. This thermal model assumes that an 8-pin single-channel plastic package optocoupler is soldered into a 7.62 cm × 7.62 cm printed circuit board (PCB) per JEDEC standards. The temperature at the LED and Detector junctions of the optocoupler can be calculated using the equations below. T1 = (R11 × P1 + R12 × P2) + TA (1) T2 = (R21 × P1 + R22 × P2) + TA (2) Using the given thermal resistances and thermal model formula in this data sheet, we can calculate the junction temperature for both LED and the output detector. Both junction temperature should be within the absolute maximum rating. Thermal Model for ACPL-H342/K342 Stretched SO8 Package Optocoupler For example, given P1 = 45 mW, P2 =210 mW, Ta = 85°C: Definitions: T1 LED junction temperature, = (145 × 0.045 + 25 × 0.210) + 85 R11: Junction to Ambient Thermal Resistance of LED due to heating of LED. R12: Junction to Ambient Thermal Resistance of LED due to heating of Detector (Output IC). R21: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of LED. = 97°C Output IC junction temperature, T2 = (R21 × P1 + R22 × P2) + TA = (38 × 0.045 + 46 × 0.210) + 85 R22: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of Detector (Output IC). P1: Power dissipation of LED (W). = (R11 × P1 + R12 × P2) + TA = 96°C T1 and T2 should be limited to 125°C based on the board layout and part placement. P2: Power dissipation of Detector/Output IC (W). T1: Junction temperature of LED (°C). Related Application Notes T2: Junction temperature of Detector (°C). AN5336 – Gate Drive Optocoupler Basic Design for IGBT/MOSFET TA: Ambient temperature. AN1043 – Common-Mode Noise: Sources and Solutions AN02-0310EN – Plastics Optocouplers Product ESD and Moisture Sensitivity Broadcom - 23 - For product information and a complete list of distributors, please go to our web site: www.broadcom.com. Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago, and the A logo are among the trademarks of Broadcom and/or its affiliates in the United States, certain other countries and/or the EU. Copyright © 2013–2017 by Broadcom. All Rights Reserved. The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. AV02-2562EN – May 3, 2017