ACPL-M51L-500E

ACPL-M51L 1MBd Low Supply Voltage Digital Optocoupler Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description Features The ACPL-M51L (single-channel in SO-5 footprint), is low power, low supply voltage 1MBd digital optocoupler, configurable as a 4pin device. • Wide supply voltage VCC: 2.25V to 24V This digital optocoupler use an insulating layer between the light emitting diode and an integrated photon detector to provide electrical insulation between input and output. ACPL-M51L has an increased common mode transient immunity of 15kV/µs minimum at VCM = 1500V. The current transfer ratio (CTR) is 140% typical for ACPLM51L at IF = 3.0mA. This digital optocoupler can be use in any TTL/CMOS, TTL/LSTTL or analog applications. • Low Drive Current : 3.0mA • Open-Collector Output • TTL compatible (5-pin configuration) • Compact SO-5 package • 15 kV/μs High Common-Mode Rejection at VCM = 1500 V • Guaranteed performance within temperature range: -40°C to +105°C • Low Propagation Delay: 1μs max at 5V (5pin configuration) • Worldwide Safety Approval: Functional Diagram - UL1577 recognized, 3750Vrms/1min - CSA Approval 6 VCC - IEC/EN/DIN EN 60747-5-5 Approval for Reinforced Insulation Anode 1 5 VO Applications Cathode 3 • Communications Interface 4 GND • Digital Signal Isolation • MCU Interface 6 • Feedback Elements in Switching Power Supplies VCC • Digital isolation for A/D, D/A conversion Digital field Anode 1 5 Cathode 3 4 GND Truth Table LED Vo ON LOW OFF HIGH A 0.1μF bypass capacitor must be connected between pins VCC and GND. 4-pin configuration : Pins 5 and 6 are externally shorted CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The components featured in this datasheet are not to be used in military or aerospace applications or environments. Ordering Information ACPL-M51L is UL Recognized with 3750 Vrms for 1 minute per UL1577. Options Part Number RoHS Compliant Package Surface Mount ACPL-M51L -000E SO-5 X Tape & Reel IEC/EN/DIN EN 60747-5-5 Quantity 100 per tube -060E X X -500E X X -560E X X 100 per tube 1500 per reel X 1500 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-M51L-560E to order product of Small Outline SO-5 package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Package Outline Drawings ACPL-M51L Small Outline SO-5 Package (JEDEC MO-155) 4.4 (0.17) DATE CODE M51L YWW XXX 4.4 ± 0.1 (0.173 ± 0.004) 7.0 ± 0.2 (0.276 ± 0.008) 2.5 (0.10) LOT ID 1.8 (0.072) 0.4 ± 0.05 (0.016 ± 0.002) 3.6 ± 0.1* (0.142 ± 0.004) 2.5 ± 0.1 (0.098 ± 0.004) 1.27 BSC (0.050) 0.102 ± 0.102 (0.004 ± 0.004) 0.64 (0.025) 8.27 (0.325) 0.216 ± 0.038 (0.0085 ± 0.0015) 7° MAX. 0.71 (0.028) MIN Dimensions in Millimeters (Inches) * Maximum mold flash on each side is 0.15 mm (0.006) Note: Floating lead protrusion is 0.15 mm (6 mils) max. 2 1.3 (0.05) MAX. LEAD COPLANARITY = 0.102 (0.004) Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACPL-M51L is approved by the following organizations: UL Approval under UL 1577, component recognition program up to VISO = 3750 VRMS File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324. IEC/EN/DIN EN 60747-5-5 (Option 060E only) Insulation and Safety Related Specifications Parameter Symbol ACPL-M51L Units Conditions Minimum External Air Gap (Clearance) L(101) 5 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 5 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. 175 V Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) CTI Isolation Group IIIa DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) IEC/EN/DIN EN 60747-5-5 Insulation Characteristics* (Option 060E) Symbol Description Characteristic Unit ACPL-M51L Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms I – IV I – III I – II Climatic Classification 55/105/21 Pollution Degree (DIN VDE 0110/39) 2 Maximum Working Insulation Voltage VIORM 567 Vpeak Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial discharge < 5 pC VPR 1050 Vpeak Input to Output Test Voltage, Method a* VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec, Partial discharge < 5 pC VPR 896 Vpeak Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 6000 Vpeak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Input Current** Output Power** TS IS, INPUT PS, OUTPUT 150 150 600 °C mA mW Insulation Resistance at TS, VIO = 500 V RS >109 Ω * Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/DIN EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. ** Refer to the following figure for dependence of PS and IS on ambient temperature. 3 Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature TS -55 125 °C Operating Temperature TA -40 105 °C 260 °C Lead Soldering Cycle Temperature 10 s Average Forward Input Current[1] Time IF(avg) 20 mA Peak Forward Input Current[2] (50% duty cycle, 1ms pulse width) IF(peak) 40 mA Peak Transient Input Current (≤1µs pulse width, 300ps) IF(trans) 1 A Reversed Input Voltage VR 5 V Input Power Dissipation[3] PIN 36 mW Output Power Dissipation[4] PO 45 mW Average Output Current IO(AVG) 8 mA Peak Output Current IO(PEAK) 16 mA Supply Voltage VCC -0.5 30 V Output Voltage VO -0.5 24 V Solder Reflow Temperature Profile See Package Outline Drawings section Notes: 1. Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C. 2. Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C. 3. Derate linearly above 85°C free-air temperature at a rate of 0.9 mW/°C. 4. Derate linearly above 85°C free-air temperature at a rate of 1.2 mW/°C. Recommended Operating Conditions Parameter Symbol Min. Max. Units Supply Voltage VCC 2.25 [1] 24 V Input Current, High Level [1] IFH 3.0 10 mA Operating Temperature TA -40 105 °C Forward Input Voltage (OFF) VF(OFF) 0.8 V Notes: 1. 5-pin configuration 4 Electrical Specifications (DC) Over recommended operating TA = -40°C to 105°C, supply voltage (2.25V ≤ VCC ≤ 24V) and unless otherwise specified. All typicals are at TA = 25°C Parameter Sym. Min. Typ. Max. Units Conditions Current Transfer Ratio CTR[1] 80 140 200 % TA = 25°C Logic Low Output Voltage VOL 0.2 0.4 V 0.2 0.5 V Logic High Output Current IOH 0.003 0.5 µA 0.01 1 VO=VCC=24V 80 VO=VCC=24V 60 % Fig. VO=0.4V VO=0.5V TA = 25°C TA = 25°C IO=3mA IO=1.6mA VCC= 2.5V or 3.3V or 5V, IF=3mA VO=VCC=5.5V IF=0mA Logic Low Supply Current per Channel ICCL 36 100 µA IF=3mA, VO=open, VCC=24V Logic High Supply Current per Channel ICCH 0.02 2 µA IF=0mA, VO=open, VCC=24V Input Forward Voltage VF 1.5 1.8 V 1.5 1.95 V IF=3mA Input Reversed Breakdown Voltage BVR V IR=10µA Temperature Coefficient of Forward Voltage ∆VF/ ∆TA -1.6 mV/°C IF=3mA Input Capacitance CIN 77 pF F = 1MHz, VF = 0 5 5 TA=25°C VCC= 2.5V or 3.3V or 5V, IF=3mA IF=3mA 2a, 2b, 3 4, 5 1 Switching Specifications Over recommended operating (TA = -40°C to 105°C), IF = 3mA, (2.25V ≤ VCC ≤ 24V), unless otherwise specified. Parameter Symbol Propagation Delay Time to Logic Low at Output tPHL Propagation Delay Time to Logic High at Output Pulse Width Distortion [2] Min tPLH PWD Typ Max Units Test Conditions Fig. 0.2 0.5 ms TA=25°C VCC = 2.5 V, RL= 560Ω 14 0.2 1 ms 0.2 0.5 ms TA=25°C VCC = 3.3 V, RL= 1.2kΩ 0.2 1 ms 0.22 0.5 ms 0.22 1 ms 0.33 0.7 ms 0.33 1.3 ms 0.38 0.8 ms 0.38 1.2 ms 0.38 0.8 ms 0.38 1.2 ms 0.31 0.7 ms 0.31 1 ms 0.3 0.7 ms 0.3 1 ms 0.18 0.8 ms 0.18 1.2 ms 0.18 0.8 ms 0.18 1.2 ms 0.1 0.7 ms 0.1 1 ms 0.1 0.7 ms 0.1 1 ms 0.18 0.7 ms TA=25°C VCC = 2.5 V , RL = 560Ω 14 0.18 0.7 ms TA=25°C VCC = 3.3 V , RL = 1.2kΩ 14 0.1 0.6 ms TA=25°C VCC = 5.0V, RL = 1.9kΩ 14 0.1 0.6 ms TA=25°C 6a, 14 14 6b, 14 TA=25°C VCC = 5.0 V, RL= 1.9kΩ 14 7, 14 TA=25°C VCC = 24V, RL= 10kΩ 14 8, 14 TA=25°C VCC = 2.5 V, RL = 560Ω 14 6a, 14 TA=25°C VCC = 3.3 V, RL = 1.2kΩ TA=25°C VCC = 5.0 V, RL = 1.9kΩ 14 6b, 14 14 7, 14 TA=25°C VCC = 24V, RL = 10kΩ 14 8, 14 TA=25°C VCC = 2.5 V, RL = 560Ω 14 14 TA=25°C VCC = 3.3 V, RL = 1.2kΩ 14 14 TA=25°C VCC = 5.0V, RL = 1.9kΩ 14 14 TA=25°C VCC = 24V, RL = 10kΩ 14 14 Propagation Delay Difference Between Any two Parts [3] tpsk VCC = 24V, RL = 10kΩ 14 Common Mode Transient Immunity at Logic High Output [4] |CMH| 15 25 kV/ms TA=25°C VCM = 1500V, IF = 0mA, RL = 560Ω, 1.2kΩ or 1.9kΩ, VCC = 2.5 V or 3.3V or 5V 15 Common Mode Transient Immunity at Logic Low Output [5] |CML| 15 20 kV/ms TA=25°C VCM = 1500V, IF = 3mA, RL = 1.2kΩ, VCC 15 = 5V 10 15 kV/ms TA=25°C VCM = 1500V, IF = 3mA, RL = 560Ω or 1.2kΩ, VCC = 2.5V or 3.3V 15 Notes: 1. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device. 3. The difference between tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) 4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). 5. Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 6 Electrical Specifications (DC) for 4-Pin Configuration Applicable for VCC = VO. Over recommended operating TA = -40°C to 105°C and unless otherwise specified. All typicals are at TA = 25°C Parameter Sym. Current Transfer Ratio CTR [1] Current Transfer Ratio CTR [1] (Sat) Logic Low Output Voltage VOL Off-State Current Min. 20 Typ. Max. Units 140 % 70 % TA = 25°C 100 I(CEO) Conditions Fig. IF= 3mA, VO=VCC=5V 20 IF=10mA 21 VO=VCC=0.5V IF = 3mA 0.1 0.2 V 0.1 0.2 V 0.5 5 0.0001 TA = 25°C IO=0.6mA IF= 10mA V IO=2.4mA IF= 3mA mA IF = 0mA, VO=VCC=15V Switching Specifications for 4-Pin Configuration Over recommended operating (TA = -40°C to 105°C), IF = 3mA, unless otherwise specified. Parameter Symbol Propagation Delay Time to Logic Low at Output tPHL Min Typ Max Units Test Conditions Fig. 8 50 ms Pulse: f = 1kHz, VCC = 5.0V, RL= 8.2kΩ 18 5 50 ms Pulse: f = 1kHz, VCC = 5.0V, RL= 1.9kΩ 8 50 ms Pulse: f = 500Hz, VCC = 24.0V, RL= 39kΩ 35 100 ms Pulse: f = 1kHz, VCC = 5.0V, RL = 8.2kΩ 10 50 ms Pulse: f = 1kHz, VCC = 5.0V, RL = 1.9kΩ 35 100 Propagation Delay Time to Logic High at Output tPLH 18 ms Pulse: f = 500Hz, VCC = 24.0 V, RL = 39kΩ Common Mode Transient Immunity at Logic High Output [2] |CMH| 15 25 kV/ms TA=25°C VCM = 1500V, IF = 0mA, RL = 8.2kΩ, VCC = 5V 19 Common Mode Transient Immunity at Logic Low Output [3] |CML| 10 15 kV/ms TA=25°C VCM = 1500V, IF = 3mA, RL = 8.2kΩ, VCC = 5V 19 Notes: 1. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). 3. Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). Package Characteristics All Typical at TA = 25°C. Parameter Symbol Min. Input-Output Momentary Withstand Voltage [1,2] VISO 3750 Input-Output Resistance [1] RI-O Input-Output Capacitance [1] CI-O Typ. Max. Units Test Conditions Vrms RH ≤ 50%, t = 1 min., TA = 25°C 1014 W VI-O = 500 Vdc 0.6 pF f = 1 MHz, TA = 25°C Notes: 1. Device considered a two terminal device: pins 1 and 3 shorted together and pins 4, 5 and 6 shorted together 2. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second. (leakage detection current limit, II-O ≤ 5 μA). 7 TA = 25°C 10 1 0.1 IF 0.01 VF 0.001 0.0001 1.3 1.4 1.5 VF - FORWARD VOLTAGE - V Figure 1. Input Current vs. Forward Voltage 1.1 1.2 1.6 1.7 1.1 1 0.9 0.8 0.7 0.6 -50 Normalized IF = 3 mA VO = 4.0 V VCC = 3.3 V -25 0 25 50 75 TA - TEMPERATURE - °C 100 125 Figure 2b. Typical Current Transfer Ratio vs. Temperature (VCC = 3.3 V) IOH - LOGIC HIGH OUTPUT CURRENT - nA IOH - LOGIC HIGH OUTPUT CURRENT - nA 1 0.1 -40 -20 0 20 40 60 TA - TEMPERATURE - °C 80 Figure 4 Typical Logic High Output Current vs. Temperature 8 0.9 0.8 0.7 0.6 -50 Normalized IF = 3 mA VO = 4.0 V VCC = 2.5 V -25 0 25 50 75 TA - TEMPERATURE - °C 100 125 1.1 1 0.9 0.8 0.7 0.6 -50 Normalized IF = 3 mA VO = 4.0 V VCC = 5.0 V -25 0 25 50 75 TA - TEMPERATURE - °C 100 125 1000 IF = 0 mA VO = VCC = 2.5V/3.3V 10 0.01 -60 1 Figure 3. Typical Current Transfer Ratio vs. Temperature (VCC = 5.0 V) 1000 100 1.1 Figure 2a. Typical Current Transfer Ratio vs. Temperature (VCC = 2.5 V) NORMALIZED CURRENT TRANSFER RATIO NORMALIZED CURRENT TRANSFER RATIO NORMALIZED CURRENT TRANSFER RATIO IF - FORWARD CURRENT - mA 100 100 120 100 IF = 0 mA VO = VCC = 5 V 10 1 0.1 0.01 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - °C 80 Figure 5. Typical Logic High Output Current vs. Temperature 100 120 700 600 700 IF = 3 mA, VCC = 2.5 V RL = 1.2 kΩ RL = 560 Ω tp - PROPAGGATION DELAYY - ns tp - PROPAGGATION DELAYY - ns 800 tPLH 500 400 300 tPHL 200 100 0 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - °C 80 100 Figure 6a. Typical Propagation Delay vs. Temperature (VCC = 2.5 V) 600 500 IF = 3 mA, VCC = 5 V RL = 4.1 kΩ RL = 1.9 kΩ tPLH 400 tPHL 200 100 0 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - °C 80 Figure 7. Typical Propagation Delay vs. Temperature (VCC = 5.0 V) 9 400 tPHL 300 200 100 -60 600 300 100 tPLH -40 -20 0 20 40 60 TA - TEMPERATURE - °C 80 100 120 Figure 6b. Typical Propagation Delay vs. Temperature (VCC = 3.3 V) tp - PROPAGGATION DELAYY - ns tp - PROPAGGATION DELAYY - ns 700 500 0 120 IF = 3 mA, VCC = 3.3 V RL = 1.9 kΩ RL = 1.2 kΩ 600 120 500 IF = 3 mA, VCC = 24 V RL = 20 kΩ RL = 10 kΩ tPLH 400 300 tPHL 200 100 0 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - °C 80 Figure 8. Typical Propagation Delay vs. Temperature (VCC = 24 V) 100 120 1400 VCC = 2.5 V IF = 10 mA IF = 3 mA tp - PROPAGATION DELAY - ns tp - PROPAGATION DELAY - ns 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 tPLH tPHL 0.5 500 tp - PROPAGATION DELAY - ns tp - PROPAGATION DELAY - ns 600 tPLH 400 300 tPHL 200 100 0 1 10 RL - LOAD RESISTANCE - kΩ Figure 10. Typical Propagation Delay vs. Load Resistance (VCC = 5.0 V) IF = 3 mA RL = 10 kΩ TA = 25°C 2000 tp - PROPAGATION DELAY - ns tp - PROPAGATION DELAY - ns tPHL 200 1 10 RL - LOAD RESISTANCE - kΩ 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 IF = 3 mA, VCC = 24 V RL = 10 kΩ, TA = 25°C tPLH 0 100 tPHL 200 300 400 CL - LOAD CAPACITANCE - pF 500 600 1500 1000 tPLH 500 tPHL 8 10 12 14 20 16 18 VCC - SUPPLY VOLTAGE - V Figure 12. Typical Propagation Delay vs. Supply Voltage 10 400 Figure 11. Typical Propagation delay vs. Load Capacitance 2500 0 tPLH 600 Figure 9b. Typical Propagation Delay vs. Load Resistance (VCC = 3.3 V) VCC = 5.0 V IF = 10 mA IF = 3 mA 700 800 0 Figure 9a. Typical Propagation Delay vs. Load Resistance (VCC = 2.5 V) 800 1000 5 RL - LOAD RESISTANCE - kΩ VCC = 3.3 V IF = 10 mA IF = 3 mA 1200 22 24 VCC = 24 V RL = 10 kΩ TA = 25°C 500 400 300 tPLH 200 tPHL 100 0 0 5 10 15 IF - FORWARD LED CURRENT - mA Figure 13. Typical Propagation Delay vs. Supply Current 20 IF PULSE GEN. Z O = 50 Ω t r = 5 ns 0 V CC VO V THHL 1 V CC 6 RL VO 5 PULSE: f = 10kHz Duty Cycle = 50% V THLH V OL t PHL IF 0.1µF 3 IF MONITOR 4 CL = 15 pF RM t PLH Figure 14. Switching Test Circuits 10 V V CM 0V 10% 90% IF 90% 10% tr tf VO B 1 RL VO SWITCH AT B: IF = 3 mA VO 5 0.1µF V CC SWITCH AT A: I F = 0 mA V CC 6 A 3 V FF 4 CL = 15 pF V OL V CM + – PULSE GEN. Figure 15. Test Circuit for Transient Immunity and typical waveforms 40 200 VO = 0.4 V VCC = 5 V 150 100 50 0 0 5 10 15 IF - FORWARD CURRENT - mA Figure 16. Current Transfer Ratio versus Input Current 11 IO - OUTPUT CURRENT - mA CTR - CURRENT TRANSFER RATIO - % 250 20 25 TA = 25 oC VCC = 5 V 30 20 10 - 0 4 8 12 16 VO - OUTPUT VOLTAGE - V Figure 17. DC Pulse Transfer Characteristic IF = 20 mA IF = 15 mA IF = 10 mA IF = 5 mA 20 24 +5V IF PULSE GEN. Z O = 50 Ω t r = 5 ns 0 V CC VO RL IF 1 6 V THHL V THLH V OL t PHL VO 5 Duty Cycle = 50% 3 IF MONITOR 4 CL = 15 pF RM t PLH Figure 18. Switching Test Circuits (4-pin configuration) IF 1500 V V CM 0V 10% 90% B 90% 10% tr 6 RL A tf VO V CC 1 VO 5 V FF V CC 3 SWITCH AT A: I F = 0 mA 4 CL = 15 pF VO V OL SWITCH AT B: IF = 3 mA V CM + – PULSE GEN. Figure 19. Test Circuit for Transient Immunity and typical waveforms (4-pin configuration) 20 30 IO - OUTPUT CURRENT - mA IO - OUTPUT CURRENT - mA 25 IF = 10mA 20 15 IF = 5mA 10 IF = 3mA 5 0 18 IF = 20mA IF = 1 mA 0 5 10 VO - OUTPUT VOLTAGE - V Figure 20. Output Current vs Output Voltage (4-pin configuration) IF = 20mA 16 IF = 10mA 14 12 IF = 5mA 10 IF = 3mA 8 6 4 IF = 1 mA 2 15 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VO - OUTPUT VOLTAGE - V 1.8 2 Figure 21. Low level Output Current vs Output Voltage (4-pin configuration) For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2015 Avago Technologies. All rights reserved. AV02-4816EN - May 13, 2015