ACPL-P314-500E

ACPL-P314 and ACPL-W314 0.6-Amp Output Current IGBT Gate Driver Optocoupler Data Sheet Description Features The ACPL-P314/W314 consists of a GaAsP LED optically coupled to an integrated circuit with a power output stage. These optocouplers are ideally suited for driving power IGBTs and MOSFETs used in motor control inverter applications. The high operating voltage range of the output stage provides the drive voltages required by gate-controlled devices. The voltage and current supplied by this optocoupler makes it ideally suited for directly driving small or medium power IGBTs.       Applications       Isolated IGBT/Power MOSFET gate drive AC and brushless DC motor drives Industrial inverters Inverter for home appliances Induction cooker Switching power supplies (SPSs) Specifications        CAUTION High-speed response Ultra high CMR Bootstrappable supply current Available in Stretched SO-6 package Package clearance/creepage at 8 mm (ACPL-W314) Safety approval: — UL1577 recognized with 3750 Vrms for 1 minute for ACPL-P314 and 5000 Vrms for 1 minute for ACPL-W314 — CSA Approved — IEC/EN/DIN EN 60747-5-5 Approved — VIORM = 891 Vpeak for ACPL-P314 — VIORM = 1140 Vpeak for ACPL-W314 0.6-A maximum peak output current 0.4-A minimum peak output current 0.7-μs maximum propagation delay over temperature range ICC(max) = 3-mA maximum supply current 25 kV/μs minimum common mode rejection (CMR) at VCM = 1500V Wide VCC operating range: 10V to 30V over temperature range Wide operating temperature range: –40°C to 100°C It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The components featured in this data sheet are not to be used in military or aerospace applications or environments. Broadcom -1- ACPL-P314 and ACPL-W314 Data Sheet Functional Diagram ANODE 1 6 VCC N.C. 2 5 VO CATHODE 3 NOTE 4 VEE SHIELD A 0.1-μF bypass capacitor must be connected between pins VCC and VEE. Truth Table LED VO OFF LOW ON HIGH Ordering Information ACPL-P314 is UL Recognized with 3750 Vrms for 1 minute per UL1577. ACPL-W314 is UL Recognized with 5000 Vrms for 1 minute per UL1577. Option Part Number ACPL-P314 ACPL-W314 RoHS Compliant Package -000E Stretched SO-6 Surface Mount Tape and Reel X -060E X -560E X Stretched SO-6 IEC/EN/DIN EN 60747-5-5 X -500E -000E UL 5000 Vrms / 1 Minute Rating 100 per tube X X -060E X -560E X 1000 per reel X X -500E Quantity X 100 per tube X 1000 per reel X X X 100 per tube X 1000 per reel X X 100 per tube X X 1000 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-P314-560E to order product of Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: ACPL-P314-000E to order product of Stretched SO-6 Surface Mount package in tube packaging and RoHS compliant. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. NOTE The notation #XXX is used for existing products, while (new) products launched since July 15, 2001 and RoHS compliant option will use -XXXE. Broadcom -2- ACPL-P314 and ACPL-W314 Data Sheet Package Outline Drawings ACPL-P314 Stretched SO-6 Package 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) *4.580 +– 0.254 0 (0.180 +– 0.010 0.000 ) Land Pattern Recommendation 0.76 (0.03) 1.27 (0.05) 10.7 (0.421) 2.16 (0.085) 7.62 (0.300) 6.81 (0.268) 0.45 (0.018) 45° 1.590 ±0.127 (0.063 ±0.005) 3.180 ±0.127 (0.125 ±0.005) 7° 7° 7° 0.20 ±0.10 (0.008 ±0.004) 7° 1 ±0.250 (0.040 ±0.010) 5° NOM. 9.7 ±0.250 (0.382 ±0.010) 0.254 ±0.050 (0.010 ±0.002) Floating Lead Protusions max. 0.25 (0.01) Dimensions in Millimeters (Inches) Lead Coplanarity = 0.1 mm (0.004 Inches) * Total Package Length (inclusive of mold flash) 4.834 ± 0.254 (0.190 ± 0.010) Broadcom -3- ACPL-P314 and ACPL-W314 Data Sheet ACPL-W314 Stretched SO-6 Package *4.580 +– 0.254 0 (0.180 +– 0.010 0.000 ) 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) ( 6.807 +– 0.127 0 0.268 +– 0.005 0.000 0.45 (0.018) Land Pattern Recommendation 0.76 (0.03) 1 6 2 5 3 4 1.27 (0.05) 7.62 (0.300) ) 7° 1.905 (0.075) 12.65 (0.5) 1.590 ±0.127 (0.063 ±0.005) 45° 3.180 ±0.127 (0.125 ±0.005) 7° 0.20 ±0.10 (0.008 ±0.004) 7° 0.254 ±0.050 (0.010 ±0.002) 7° 0.750 ±0.250 (0.0295 ±0.010) 35° NOM. Floating Lead Protusions max. 0.25 (0.01) Dimensions in Millimeters (Inches) 11.500 ±0.25 (0.453 ±0.010) Lead Coplanarity = 0.1 mm (0.004 Inches) * Total Package Length (inclusive of mold flash) 4.834 ± 0.254 (0.190 ± 0.010) Recommended Pb-Free IR Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-halide flux should be used. Regulatory Information The ACPL-P314/W314 is approved by the following organizations. IEC/EN/DIN EN 60747-5-5 (Option 060 only) Approval under IEC 60747-5-5:2007. UL Approval under UL 1577 component recognition program up to VISO = 3750 VRMS for the ACPL-P314 and VISO = 5000 VRMS for the ACPL-W314, File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324. Broadcom -4- ACPL-P314 and ACPL-W314 Data Sheet IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristicsa (ACPL-P314/W314 Option 060) Description Symbol Installation Classification per DIN VDE 0110/1.89, Table 1 For Rated Mains Voltage ≤ 150 Vrms For Rated Mains Voltage ≤ 300 Vrms For Rated Mains Voltage ≤ 450 Vrms For Rated Mains Voltage ≤ 600 Vrms For Rated Mains Voltage ≤ 1000 Vrms ACPL-W314 ACPL-P314 Unit I-IV I-IV I-IV I-IV I-III I-IV I-IV I-III I-III 55/100/21 55/100/21 2 2 VIORM 1140 891 Vpeak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1s, Partial Discharge < 5 pC VPR 2137 1670 Vpeak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and Sample Test, tm = 10s, Partial Discharge < 5 pC VPR 1824 1426 Vpeak VIOTM 8000 6000 Vpeak TS 175 230 600 175 230 600 °C mA mW ≤109 ≤109 Ω Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage Highest Allowable Overvoltage* (Transient Overvoltage, tini = 60s) Safety Limiting Values (maximum values allowed in the event of a failure) Case Temperature Input Currentb IS,INPUT Output Powerb PS,OUTPUT Insulation Resistance at TS, VIO = 500 V RS a. Refer to IEC/EN/DIN EN 60747-5-5 Optoisolator Safety Standard section of the Broadcom Regulatory Guide to Isolation Circuits, AV02-2041EN, for a detailed description of Method a and Method b partial discharge test profiles. b. Refer to the following figure for dependence of PS and IS on ambient temperature: OUTPUT POWER – PS, INPUT CURRENT – IS 800 PS (mW) IS (mA) 700 600 500 400 300 200 100 0 0 25 50 75 100 125 150 175 200 TS – CASE TEMPERATURE – °C Broadcom -5- ACPL-P314 and ACPL-W314 Data Sheet Insulation and Safety-Related Specifications ACPLParameter Symbol Unit P314 W314 Conditions Minimum External Air Gap (External Clearance) L(101) 7.0 8.0 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 8.0 8.0 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. Minimum Internal Tracking (Internal Creepage) N/A N/A mm Measured from input terminals to output terminals, along internal cavity. >175 >175 V IIIa IIIa Tracking Resistance (Comparative Tracking Index) Isolation Group NOTE CTI DIN IEC 112/VDE 0303 Part 1. Material Group (DIN VDE 0110, 1/89, Table 1). All Broadcom data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must be met as specified for individual equipment standards. For creepage, the shortest distance path along the surface of a printed circuit board between the solder fillets of the input and output leads must be considered (the recommended land pattern does not necessarily meet the minimum creepage of the device). There are recommended techniques such as grooves and ribs that may be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors, such as pollution degree and insulation level. Broadcom -6- ACPL-P314 and ACPL-W314 Data Sheet Absolute Maximum Ratings Parameter Symbol Min. Max. Unit Storage Temperature TS –55 125 °C Operating Temperature TA –40 100 °C Average Input Current IF(AVG) — 25 mA Peak Transient Input Current ( 5V 9, 15 Threshold Input Voltage High to Low VFHL 0.8 — — V IO = 0 mA, VO > 5V VF 1.2 1.5 1.8 V IF = 10 mA ΔVF/ΔTA — –1.6 — Input Reverse Breakdown Voltage BVR 5 — — V IR = 10 μA Input Capacitance CIN — 60 — pF f = 1 MHz, VF = 0V Input Forward Voltage Temperature Coefficient of Input Forward Voltage 16 mV/°C IF = 10 mA a. Maximum pulse width = 50 ms, maximum duty cycle = 0.5%. b. Maximum pulse width = 10 ms, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak minimum = 0.4A. See the Applications section for additional details on limiting IOL peak. c. In this test, VOH is measured with a DC load current. When driving capacitive load, VOH approaches VCC as IOH approaches zero amps. d. Maximum pulse width = 1 ms, maximum duty cycle = 20%. e. The power supply current increases when operating frequency and Qg of the driven IGBT increases. Broadcom -8- ACPL-P314 and ACPL-W314 Data Sheet Switching Specifications (AC) Over recommended operating conditions unless otherwise specified. Parameter Symbol Min. Typ. Max. Unit Propagation Delay Time to High Output Level tPLH 0.1 0.2 0.7 μs Propagation Delay Time to Low Output Level tPHL 0.1 0.3 0.7 μs Propagation Delay Difference Between Any Two Parts or Channels PDD –0.5 — 0.5 μs Rise Time tR — 50 — ns Fall Time tF — 50 — ns Output High Level Common Mode Transient Immunity |CMH| 25 — — kV/μs Output Low Level Common Mode Transient Immunity |CML| 25 — — kV/μs Test Conditions Figure Note Rg = 47Ω, Cg = 3 nF, f = 10 kHz, Duty Cycle = 50%, IF = 8 mA, VCC = 30V 10, 11, 12, 13, 14, 17 a TA = 25°C, VCM = 1500V a b 18 c 18 d a. This load condition approximates the gate load of a 1200V/25A IGBT. b. PDD is the difference between tPHL and tPLH between any two parts or channels under the same test conditions. c. Common mode transient immunity in the high state is the maximum tolerable |dVCM/dt| of the common mode pulse VCM to ensure that the output remains in the high state (that is, VO > 6.0V). d. Common mode transient immunity in a low state is the maximum tolerable |dVCM/dt| of the common mode pulse, VCM, to ensure that the output remains in a low state (that is, VO < 1.0V). Package Characteristics Parameter Input-Output Momentary Withstand Voltage ACPL-P314 Symbol Min. Typ. Max. Unit Test Conditions VISO 3750 — — Vrms TA = 25°C, RH < 50% for 1 min. 5000 — — ACPL-W314 Input-Output Resistance RI-O — 1012 — Input-Output Capacitance CI-O — 0.6 — Figure Note a, b b, c VI-O = 500V pF b Freq = 1 MHz a. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 4500 Vrms for 1 second (leakage detection current limit II-O < 5 μA). This test is performed before 100% production test for partial discharge (method B) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristicsa (ACPL-P314/W314 Option 060) table, if applicable. b. The device is considered a two-terminal device: pins on input side shorted together and pins on output side shorted together. c. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 Vrms for 1 second (leakage detection current limit II-O < 5A). This test is performed before 100% production test for partial discharge (method B) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristicsa (ACPL-P314/W314 Option 060) table, if applicable. Broadcom -9- ACPL-P314 and ACPL-W314 Data Sheet Figure 2 IOH vs. Teperature 0 0.40 -0.5 0.38 IOH – OUTPUT HIGH CURRENT – A (VOH-VCC) – HIGH OUTPUT VOLTAGE DROP – V Figure 1 VOH vs. Temperature -1.0 -1.5 -2.0 -2.5 -50 -25 0 25 50 75 100 0.36 0.34 0.32 0.30 -50 125 -25 0 TA – TEMPERATURE – °C 25 50 75 100 125 100 125 TA – TEMPERATURE – °C Figure 3 VOH vs. IOH Figure 4 VOL vs. Temperature VOL – OUTPUT LOW VOLTAGE – V 0.44 0.43 0.42 0.41 0.40 0.39 -50 0 -25 25 50 75 TA – TEMPERATURE – °C Figure 5 IOL vs. Temperature Figure 6 VOL vs. IOL 25 0.470 VOL – OUTPUT LOW VOLTAGE – V IOL – OUTPUT LOW CURRENT – A 0.465 0.460 0.455 0.450 0.445 0.440 -50 -25 0 25 50 75 100 20 15 10 5 0 125 0 100 200 300 400 500 IOL – OUTPUT LOW CURRENT – mA TA – TEMPERATURE – °C Broadcom - 10 - 600 700 ACPL-P314 and ACPL-W314 Data Sheet Figure 8 ICC vs. VCC 1.4 1.2 1.2 1.0 ICC – SUPPLY CURRENT – mA ICC – SUPPLY CURRENT – mA Figure 7 ICC vs. Temperature 1.0 0.8 0.6 0.4 ICCL 0.2 0.8 0.6 0.4 ICCL ICCH 0.2 ICCH 0 -50 -25 0 25 50 75 100 0 125 15 10 Figure 9 IFLH vs. Temperature 30 400 3.0 TP – PROPAGATION DELAY – ns IFLH – LOW TO HIGH CURRENT THRESHOLD – mA 25 Figure 10 Propagation Delay vs. VCC 3.5 2.5 2.0 300 200 100 TPLH 1.5 -50 TPHL -25 0 25 50 75 100 0 125 15 10 TA – TEMPERATURE – °C 25 30 Figure 12 Propagation Delay vs. Temperature 500 TP – PROPAGATION DELAY – ns 400 300 200 100 0 20 VCC – SUPPLY VOLTAGE – V Figure 11 Propagation Delay vs. IF TP – PROPAGATION DELAY – ns 20 VCC – SUPPLY VOLTAGE – V TA – TEMPERATURE – °C 6 9 12 15 400 300 200 100 0 -50 18 TPLH TPHL -25 0 25 50 75 TA – TEMPERATURE – °C IF – FORWARD LED CURRENT – mA Broadcom - 11 - 100 125 ACPL-P314 and ACPL-W314 Data Sheet Figure 13 Propagation Delay vs. Rg Figure 14 Propagation Delay vs. Cg 400 350 TP – PROPAGATION DELAY – ns TP – PROPAGATION DELAY – ns 400 TPLH TPHL 300 250 200 300 200 100 TPLH TPHL 0 50 100 0 200 150 0 Rg – SERIES LOAD RESISTANCE – W 20 60 40 80 100 Cg – LOAD CAPACITANCE – nF Figure 15 Transfer Characteristics Figure 16 Input Current vs. Forward Voltage 35 25 25 IF – FORWARD CURRENT – mA VO – OUTPUT VOLTAGE – V 30 20 15 10 5 20 15 10 5 0 -5 1 0 2 3 4 0 1.2 6 5 IF – FORWARD LED CURRENT – mA 1.4 1.6 VF – FORWARD VOLTAGE – V Figure 17 Propagation Delay Test Circuit and Waveforms IF IF = 7 to 16 mA 500 : 1 6 tr 0.1 PF + - 2 10 KHz 50% DUTY CYCLE 3 5 VO 47: 4 3 nF + - tf 90% VCC = 15 to 30 V 50% VOUT 10% tPLH Broadcom - 12 - tPHL 1.8 ACPL-P314 and ACPL-W314 Data Sheet Figure 18 CMR Test Circuit and Waveforms VCM IF GV A 1 6 + - = VCM 't 0.1 PF B 5V Gt 2 5 VO 0V + - 't VCC = 30V 4 VOH VO SWITCH AT A: IF = 10 mA + - 3 VCM = 1000V VO VOL SWITCH AT B: IF = 0 mA Applications Information Selecting the Gate Resistor (Rg) Eliminating Negative IGBT Gate Drive Step 1: Calculate Rg minimum from the IOL peak specification. The IGBT and Rg in Figure 19 can be analyzed as a simple RC circuit with a voltage supplied by the ACPL-P314/W314. To keep the IGBT firmly off, the ACPL-P314/W314 has a very low maximum VOL specification of 1.0V. Minimizing Rg and the lead inductance from the ACPL-P314/W314 to the IGBT gate and emitter (possibly by mounting the ACPL-P314/W314 on a small PC board directly above the IGBT) can eliminate the need for negative IGBT gate drive in many applications as shown in Figure 19. Care should be taken with such a PC board design to avoid routing the IGBT collector or emitter traces close to the ACPL-P314/W314 input as this can result in unwanted coupling of transient signals into the input of ACPL-P314/W314 and degrade performance. (If the IGBT drain must be routed near the ACPL-P314/W314 input, then the LED should be reverse biased when in the off state, to prevent the transient signals coupled from the IGBT drain from turning on the ACPL-P314/W314.) Rg = V CC  V OL I OLPEAK = 24  5 0.6 = 32 : The VOL value of 5V in the previous equation is the VOL at the peak current of 0.6A. (See Figure 6). Figure 19 Recommended LED Drive and Application Circuit for ACPL-P314/W314 +5 V 270 : 1 ACPL-P314/W314 + HVDC 6 0.1 PF CONTROL INPUT 74XXX OPEN COLLECTOR 2 5 3 4 + - VCC = 24V Rg Q1 3-PHASE AC Q2 - HVDC Broadcom - 13 - ACPL-P314 and ACPL-W314 Data Sheet LED Drive Circuit Considerations for Ultra High CMR Performance Step 2: Check the ACPL-P314/W314 power dissipation and increase Rg if necessary. The ACPL-P314/W314 total power dissipation (PT) is equal to the sum of the emitter power (PE) and the output power (PO). Without a detector shield, the dominant cause of optocoupler CMR failure is capacitive coupling from the input side of the optocoupler, through the package, to the detector IC as shown in Figure 21. The ACPL-P314/W314 improves CMR performance by using a detector IC with an optically transparent Faraday shield, which diverts the capacitively coupled current away from the sensitive IC circuitry. However, this shield does not eliminate the capacitive coupling between the LED and optocoupler pins 5–8 as shown in Figure 22. This capacitive coupling causes perturbations in the LED current during common mode transients and becomes the major source of CMR failures for a shielded optocoupler. The main design objective of a high CMR LED drive circuit becomes keeping the LED in the proper state (on or off ) during common mode transients. For example, the recommended application circuit (Figure 19) can achieve 10 kV/μs CMR while minimizing component complexity. PT = P E + PO P E = I F · V F · DutyCycle P O = P O(BIAS) + P O(SWITCHING) = I CC · V CC + E SW (R g ; Q g ) · f = (I CCBIAS + K ICC · Q g · f ) · VCC + E SW (R g ; Q g ) · f where KICC · Qg · f is the increase in ICC due to switching and KICC is a constant of 0.001 mA/(nC*kHz). For the circuit in Figure 19 with IF (worst case) = 10 mA, Rg = 32Ω, Max Duty Cycle = 80%, Qg = 100 nC, f = 20 kHz, and TAMAX = 85°C: P E = 10 mA · 1.8V · 0.8 = 14 mW P O = (3 mA + (0.001 mA/nC · kHz) · 20 kHz · 100 nC) · 24V + 0.4 PJ · 20 kHz = 128 mW < 250 mW ( P O(MAX) @85 qC) The value of 3 mA for ICC in the previous equation is the max. ICC over entire operating temperature range. Techniques to keep the LED in the proper state are discussed in the next two sections. Since PO for this case is less than PO(MAX), Rg = 32Ω is alright for the power dissipation. Figure 21 Optocoupler Input to Output Capacitance Model for Unshielded Optocouplers Figure 20 Energy Dissipated in the ACPL-P314/W314 and for Each IGBT Switching Cycle 1 Esw – ENERGY PER SWITCHING CYCLE – μJ 4.0 CLEDP 6 2 Qg = 50 nC Qg = 100 nC Qg = 200 nC Qg = 400 nC 3.5 3.0 2.5 3 5 4 CLEDN Figure 22 Optocoupler Input to Output Capacitance Model for Shielded Optocouplers 2.0 1 CLEDP CLED01 6 1.5 2 1.0 3 0.5 0 0 20 40 60 Rg – GATE RESISTANCE – : 80 100 CLED02 CLEDN SHIELD 5 4 CMR with the LED On (CMRH) A high CMR LED drive circuit must keep the LED on during common mode transients. This is achieved by overdriving the LED current beyond the input threshold so that it is not pulled below the threshold during a transient. A minimum LED current of 8 mA provides adequate margin over the maximum IFLH of 5 mA to achieve 10 kV/μs CMR. Broadcom - 14 - ACPL-P314 and ACPL-W314 Data Sheet CMR with the LED Off (CMRL) Figure 25 Recommended LED Drive Circuit for Ultra-High CMR Dead Time and Propagation Delay Specifications A high CMR LED drive circuit must keep the LED off (VF ≤ VF(OFF)) during common mode transients. For example, during a –dVCM/dt transient in Figure 23, the current flowing through CLEDP also flows through the RSAT and VSAT of the logic gate. As long as the low state voltage developed across the logic gate is less than VF(OFF), the LED remains off and no common mode failure occurs. +5 V 1 CLEDP 6 2 3 5 CLEDN 4 SHIELD Figure 23 Equivalent Circuit for Figure 17 During Common Mode Transient CLEDP 1 +5 V + VSAT - 6 0.1 PF ILEDP 2 + - Dead Time and Propagation Delay Specifications VCC = 18V Rg 5 3 CLEDN 4 SHIELD + - · THE ARROWS INDICATE THE DIRECTION · OF CURRENT FLOW DURING - dVCM / dt VCM The open collector drive circuit, shown in Figure 24, cannot keep the LED off during a +dVCM/dt transient, since all the current flowing through CLEDN must be supplied by the LED, and it is not recommended for applications requiring ultra high CMR1 performance. The alternative drive circuit, like the recommended application circuit (Figure 19), achieves ultra high CMR performance by shunting the LED in the off state. The ACPL-P314/W314 includes a Propagation Delay Difference (PDD) specification intended to help designers minimize dead time in their power inverter designs. Dead time is the time high and low side power transistors are off. Any overlap in Ql and Q2 conduction will result in large currents flowing through the power devices from the high voltage to the low-voltage motor rails. To minimize dead time in a given design, the turn on of LED2 should be delayed (relative to the turn off of LED1) so that under worst-case conditions, transistor Q1 has just turned off when transistor Q2 turns on, as shown in Figure 26. The amount of delay necessary to achieve this condition is equal to the maximum value of the propagation delay difference specification, PDD max, which is specified to be 500 ns over the operating temperature range of –40°C to 100°C. Figure 26 Minimum LED Skew for Zero Dead Time Figure 24 Not Recommended Open Collector Drive Circuit +5 V 1 CLEDP ILED1 6 2 VOUT1 Q1 ON Q1 OFF 5 CLEDN 3 ILEDN SHIELD Q2 ON 4 VOUT2 Q1 ILED2 Q2 OFF tPHL MAX tPLH MIN PDD* MAX = (tPHL- tPLH)MAX = tPHL MAX - tPLH MIN *PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS. Broadcom - 15 - ACPL-P314 and ACPL-W314 Data Sheet Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time is equivalent to the difference between the maximum and minimum propagation delay difference specification as shown in Figure 27. The maximum dead time for the ACPL-P314/W314 is 1 μs (= 0.5 μs – (–0.5 μs)) over the operating temperature range of –40°C to 100°C. Thermal Model for ACPL-P314/W314 Streched-SO6 Package Optocoupler Definitions R11: Junction to Ambient Thermal Resistance of LED due to heating of LED. R12: Junction to Ambient Thermal Resistance of LED due to heating of Detector (Output IC). R21: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of LED. R22: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of Detector (Output IC). P1: Power dissipation of LED (W). P2: Power dissipation of Detector/Output IC (W). T1: Junction temperature of LED (C). T2: Junction temperature of Detector (C). Ta: Ambient temperature. Figure 27 Waveforms for Dead Time ILED1 VOUT1 Q1 ON Q1 OFF Q2 ON VOUT2 Q2 OFF ILED2 tPHL MIN tPHL MAX tPLH MIN tPLH MAX (tPHL-tPLH) MAX PDD* MAX MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = (tPHL MAX - tPHL MIN) + (tPLH MAX - tPLH MIN) = (tPHL MAX - tPLH MIN) – (tPHL MIN - tPLH MAX) = PDD* MAX – PDD* MIN *PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS. NOTE The propagation delays used to calculate PDD and dead time are taken at equal temperatures and test conditions since the optocouplers under consideration are typically mounted in close proximity to each other and are switching identical IGBTs. ΔT1: Temperature difference between LED junction and ambient (C). ΔT2: Temperature deference between Detector junction and ambient. Ambient Temperature: Junction to Ambient Thermal Resistances were measured approximately 1.25 cm above optocoupler at ~23°C in still air. Description This thermal model assumes that an 6-pin single-channel plastic package optocoupler is soldered into a 7.62 cm × 7.62 cm printed circuit board (PCB). The temperature at the LED and Detector junctions of the optocoupler can be calculated using the equations below. T1 = (R11 × P1 + R12 × P2) + Ta -- (1) T2 = (R21 × P1 + R22 × P2) + Ta -- (2) JEDEC Specifications R11 R12, R21 R22 Low K board 357 150, 166 228 High K board 249 76, 79 159 NOTE Broadcom - 16 - Maximum junction temperature for above parts: 125°C. For product information and a complete list of distributors, please go to our web site: www.broadcom.com. Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago, and the A logo are among the trademarks of Broadcom and/or its affiliates in the United States, certain other countries and/or the EU. Copyright © 2005–2017 by Broadcom. All Rights Reserved. The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. AV02-0158EN – April 4, 2017