ACPL-W340-500E

ACPL-P340/ACPL-W340 1.0 Amp Output Current IGBT Gate Drive Optocoupler with Rail-to-Rail Output Voltage in Stretched SO6 Data Sheet Description Features The ACPL-P340/W340 contains an AlGaAs LED, which is optically coupled to an integrated circuit with a power output stage. This optocoupler is ideally suited for driving power IGBTs and MOSFETs used in motor control inverter applications. The high operating voltage range of the output stage provides the drive voltages required by gate controlled devices. The voltage and high peak output current supplied by this optocoupler make it ideally suited for direct driving IGBT with ratings up to 1200V/50A. For IGBTs with higher ratings, this optocoupler can be used to drive a discrete power stage which drives the IGBT gate. The ACPL-P340 and ACPL-W340 have the highest insulation voltage of VIORM = 891Vpeak and VIORM = 1140Vpeak respectively in the IEC/EN/DIN EN 60747-55. ƒƒ 1.0A maximum peak output current Functional Diagram ƒƒ Industrial temperature range: –40°C to +105°C ƒƒ 0.8A minimum peak output current ƒƒ Rail-to-rail output voltage ƒƒ 200 ns maximum propagation delay ƒƒ 100 ns maximum propagation delay difference ƒƒ LED current input with hysteresis ƒƒ 35 kV/µs minimum Common Mode Rejection (CMR) at VCM = 1500V ƒƒ ICC = 3.0 mA maximum supply current ƒƒ Under Voltage Lock-Out protection (UVLO) with hysteresis ƒƒ Wide operating VCC Range: 15V to 30V ƒƒ Safety Approval: —— UL Recognized 3750V/5000VRMS for 1 min. ANODE 1 6 VCC —— CSA —— IEC/EN/DIN EN 60747-5-5 VIORM = 891V/1140Vpeak NC 2 5 VOUT CATHODE 3 4 VEE Applications ƒƒ IGBT/MOSFET gate drive ƒƒ AC and Brushless DC motor drives ƒƒ Renewable energy inverters Note: A 1 µF bypass capacitor must be connected between pins VCC and VEE. ƒƒ Industrial inverters ƒƒ Switching power supplies CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The components featured in this data sheet are not to be used in military or aerospace applications or environments. Broadcom Confidential -1- ACPL-P340/ACPL-W340 Data Sheet Truth Table LED VCC – VEE POSITIVE GOING (TURN-ON) VCC – VEE NEGATIVE GOING (TURN-OFF) VO OFF ON ON ON 0 – 30 V 0 – 12.1 V 12.1 – 13.5 V 13.5 – 30 V 0 – 30 V 0 – 11.1 V 11.1 – 12.4 V 12.4 – 30 V LOW LOW TRANSITION HIGH Ordering Information ACPL-P340 is UL Recognized with 3750VRMS for 1 minute per UL1577. ACPL-W340 is UL Recognized with 5000VRMS for 1 minute per UL1577. Part Number ACPL-P340 ACPL-W340 Option RoHS Compliant -000E -500E Package Stretched SO6 Surface Mount Tape and Reel IEC/EN/DIN EN 60747-5-5 X X -060E X -560E X Quantity 100 per tube X X 1000 per reel X 100 per tube X 1000 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-P340-560E to order product of Stretched SO6 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: ACPL-W340-000E to order product of Stretched SO6 Surface Mount package in Tube packaging and RoHS compliant. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. Broadcom Confidential -2- ACPL-P340/ACPL-W340 Data Sheet Package Outline Drawing ACPL-P340 Stretched SO6 Package (7 mm Clearance) 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) *4.580 +– 0.254 0 (0.180 +– 0.010 0.000 ) Land Pattern Recommendation 0.76 (0.03) 1.27 (0.05) 2.16 (0.085) 10.7 (0.421) 7.62 (0.300) 1.590 ±0.127 (0.063 ±0.005) 6.81 (0.268) 0.45 (0.018) 45° 3.180 ±0.127 (0.125 ±0.005) 7° 7° 7° 0.20 ±0.10 (0.008 ±0.004) 7° 1 ±0.250 (0.040 ±0.010) 5° NOM. 0.254 ±0.050 (0.010 ±0.002) Floating Lead Protusions max. 0.25 mm (0.01”) Dimensions in Millimeters (Inches) 9.7 ±0.250 (0.382 ±0.010) Lead Coplanarity = 0.1 mm (0.004“) Total package length (inclusive of mold flash): 4.834 mm ±0.254 mm (0.190” ±0.010”) ACPL-W340 Stretched SO6 Package (8 mm Clearance) *4.580 +– 0.254 0 (0.180 +– 0.010 0.000 ) 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) ( 6.807 +– 0.127 0 0.268 +– 0.005 0.000 0.45 (0.018) Land Pattern Recommendation 0.76 (0.03) 1 6 2 5 3 4 1.27 (0.05) 7.62 (0.300) ) 7° 45° 1.905 (0.075) 12.65 (0.5) 1.590 ±0.127 (0.063 ±0.005) 3.180 ±0.127 (0.125 ±0.005) 7° 0.20 ±0.10 (0.008 ±0.004) 0.750 ±0.250 (0.0295 ±0.010) 7° 35° NOM. 11.500 ±0.25 (0.453 ±0.010) 0.254 ±0.050 (0.010 ±0.002) 7° Floating Lead Protusions max. 0.25 mm (0.01”) Dimensions in Millimeters (Inches) Lead Coplanarity = 0.1 mm (0.004“) Total package length (inclusive of mold flash): 4.834 mm ±0.254 mm (0.190” ±0.010”) Broadcom Confidential -3- ACPL-P340/ACPL-W340 Data Sheet Recommended Pb-Free IR Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACPL-P340/W340 is approved by the following organizations: UL Recognized under UL 1577, component recognition program up to VISO = 3750VRMS (ACPL-P340) and VISO = 5000VRMS (ACPL-W340). CSA CSA Component Acceptance Notice #5, File CA 88324 IEC/EN/DIN EN 60747-5-5 (Option 060 Only) Maximum Working Insulation Voltage VIORM = 891Vpeak (ACPL-P340) and VIORM = 1140Vpeak (ACPLW340) IEC/EN/DIN EN 60747-5-5 Insulation Characteristics* (Option 060) ACPLP340 Option 060 ACPLW340 Option 060 I – IV I – IV I – III I – III I – IV I – IV I – IV I – IV I – III 40/105/21 40/105/21 2 2 VIORM 891 1,140 Vpeak Input to Output Test Voltage, Method b* VIORM × 1.875 = VPR, 100% Production Test with tm =1 sec, Partial discharge < 5 pC VPR 1,671 2,137 Vpeak Input to Output Test Voltage, Method a* VIORM × 1.6 = VPR, Type and Sample Test, tm =10 sec, Partial discharge < 5 pC VPR 1,426 1,824 Vpeak VIOTM 6,000 8,000 Vpeak TS 175 175 °C Input Current IS, INPUT 230 230 mA Output Power PS, OUTPUT 600 600 mW RS >109 >109 Ω Description Symbol Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150VRMS for rated mains voltage ≤ 300VRMS for rated mains voltage ≤ 450VRMS for rated mains voltage ≤ 600VRMS for rated mains voltage ≤ 1000VRMS Climatic Classification Pollution Degree (DIN VDE 0110/39) Maximum Working Insulation Voltage Highest Allowable Overvoltage* (Transient Overvoltage tini = 60 sec) Unit Safety-limiting values – maximum values allowed in the event of a failure Case Temperature Insulation Resistance at TS, VIO = 500V *Refer to IEC/EN/DIN EN 60747-5-5 Optoisolator Safety Standard section of the Broadcom Regulatory Guide to Isolation Circuits, AV02-2041EN for a detailed description of Method a and Method b partial discharge test profiles. Note: These optocouplers are suitable for “safe electrical isolation” only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Surface mount classification is Class A in accordance with CECC 00802. Broadcom Confidential -4- ACPL-P340/ACPL-W340 Data Sheet Insulation and Safety Related Specifications Symbol ACPLP340 ACPLW340 Unit Minimum External Air Gap (Clearance) L(101) 7.0 8.0 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 8.0 8.0 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. >175 >175 V IIIa IIIa Parameter Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) CTI Isolation Group Conditions DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) Note: All Broadcom data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must be met as specified for individual equipment standards. For creepage, the shortest distance path along the surface of a printed circuit board between the solder fillets of the input and output leads must be considered (the recommended Land Pattern does not necessarily meet the minimum creepage of the device). There are recommended techniques such as grooves and ribs which may be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors such as pollution degree and insulation level. Absolute Maximum Ratings Parameter Symbol Min. Max. Unit Storage Temperature TS –55 +125 °C Operating Temperature TA –40 +105 °C Output IC Junction Temperature TJ 125 °C Average Input Current IF(AVG) 25 mA Peak Transient Input Current ( 5V 6, 7, 8 Threshold Input Voltage High to Low VFHL 0.8 VF 1.2 V IF = 10 mA 13 mV/°C IF = 10 mA V IR = 100 μA pF f = 1 MHz, VF = 0V V VO > 5V, IF = 10 mA Input Forward Voltage Temperature Coefficient of Input Forward Voltage BVR Input Capacitance CIN UVLO Hysteresis Test Conditions Fig. Note –0.3 A VO = VCC – 4V 14 5 –0.8 A VCC – VO ≤ 15V 0.3 A VO = VEE + 2.5V 0.8 A VO – VEE ≤ 15V Max. 1.55 1.95 –1.7 5 70 VUVLO+ 12.1 12.8 13.5 VUVLO- 11.1 11.8 12.4 UVLOHYS 6 15 1.0 Broadcom Confidential -6- V 5 7 V ΔVF/ΔTA Input Reverse Breakdown Voltage UVLO Threshold Unit VCC – 0.3 Typ. 19 8, 9 ACPL-P340/ACPL-W340 Data Sheet Switching Specifications (AC) Unless otherwise noted, all typical values are at TA = 25°C, VCC – VEE = 30V, VEE = Ground; all minimum and maximum specifications are at recommended operating conditions (TA = –40°C to +105°C, IF(ON) = 7 mA to 16 mA, VF(OFF) = –3.6V to +0.8V, VEE = Ground, VCC = 15V to 30V). Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Propagation Delay Time to High Output Level tPLH 50 98 200 ns Propagation Delay Time to Low Output Level tPHL 50 95 200 ns 8, 9, 10, 11, 12, 20 Pulse Width Distortion PWD 70 ns Rg = 10Ω, Cg = 25 nF, f = 20 kHz, Duty Cycle = 50%, IF = 7 mA to 16 mA, VCC = 15V to 30V +100 ns Propagation Delay Difference Between Any Two Parts PDD (tPHL – tPLH) 22 –100 Rise Time tR 43 ns Fall Time tF 40 ns 10 27, 28 Vcc = 30 V 20 21 Output High Level Common Mode Transient Immunity |CMH| 35 50 kV/μs TA = 25°C, IF = 10 mA, VCC = 30V, VCM = 1500V with split resistors Output Low Level Common Mode Transient Immunity |CML| 35 50 kV/μs TA = 25°C, VF = 0V, VCC = 30V, VCM = 1500V with split resistors Note 11 12, 13 12, 14 Package Characteristics All typical values are at TA = 25°C. All minimum/maximum specifications are at recommended operating conditions, unless otherwise noted. Parameter Input-Output Momentary Withstand Voltage* Symbol Device Min. VISO ACPL-P340 ACPL-W340 Typ. Max. Unit Test Conditions 3750 VRMS RH < 50%, t = 1 min., TA = 25°C 15,17 5000 VRMS RH < 50%, t = 1 min., TA = 25°C 16,17 17 Input-Output Resistance RI-O >5012 Ω VI-O = 500VDC Input-Output Capacitance CI-O 0.6 pF f =1 MHz LED-to-Ambient Thermal Resistance R11 135 °C/W LED-to-Detector Thermal Resistance R12 27 Detector-to-LED Thermal Resistance R21 39 Detector-to-Ambient Thermal Resistance R22 47 Fig. Note 18 *The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to your equipment level safety specification or Broadcom Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.” Broadcom Confidential -7- ACPL-P340/ACPL-W340 Data Sheet Notes: 1. Derate linearly above 70°C free-air temperature at a rate of 0.3 mA/°C. 2. Maximum pulse width = 10 μs. This value is intended to allow for component tolerances for designs with IO peak minimum = 0.8A. See applications section for additional details on limiting IOH peak. 3. Derate linearly above 85°C free-air temperature at a rate of 16.9 mW/°C. 4. Derate linearly above 85°C free-air temperature at a rate of 15.3 mW/°C. The maximum LED junction temperature should not exceed 125°C. 5. Maximum pulse width = 50 μs. 6. Output is sourced at –0.8A with a maximum pulse width = 10 μs. VCC – VO is measured to ensure 15V or below. 7. Output is sourced at 0.8A with a maximum pulse width = 10 μs. VO – VEE is measured to ensure 15V or below. 8. In this test VOH is measured with a DC load current. When driving capacitive loads, VOH will approach VCC as IOH approaches zero amps. 9. Maximum pulse width = 1 ms. 10. Pulse Width Distortion (PWD) is defined as |tPHL-tPLH| for any given device. 11. The difference between tPHL and tPLH between any two ACPL-P340 parts under the same test condition. 12. Pin 2 needs to be connected to LED common. 13. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in the high state (meaning, VO > 15.0V). 14. Common mode transient immunity in a low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a low state (meaning, VO < 1.0V). 15. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≤ 4500VRMS for 1 second (leakage detection current limit, II-O < 5 μA). 16. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≤ 6000VRMS for 1 second (leakage detection current limit, II-O < 5 μA). 17. Device considered a two-terminal device: pins 1, 2, and 3 shorted together and pins 4, 5, and 6 shorted together. 18. The device was mounted on a high conductivity test board as per JEDEC 51-7. Broadcom Confidential -8- ACPL-P340/ACPL-W340 Data Sheet Typical Performance Plots Figure 2 VOH vs. Temperature VOH - HIGH OUTPUT RAIL VOLTAGE - V 29.84 IF = 10 mA IOUT = 0 mA VCC = 30V VEE = 0V 29.83 29.82 29.81 29.8 29.79 29.78 29.77 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 3 VOL vs. Temperature (VOH-VCC) - HIGH OUTPUT VOLTAGE DROP - V Figure 1 High Output Rail Voltage vs. Temperature 0.08 0.06 VF (OFF) = 0V IOUT = 100 mA VCC = 15V to 30V VEE = 0V 0.04 0.02 ICC - SUPPLY CURRENT - mA VOL - OUTPUT LOW VOLTAGE - V 0.1 -0.1 -0.15 -0.2 -0.25 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 2 1.5 1 IF = 10 mA for ICCH VF = 0V for ICCL VCC = 30V VEE = 0V 0.5 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 5 ICC vs. VCC -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 34 TA = 25°C 25° C VCC = 30V 30 V VEE = 0V 0V 29 VO - OUTPUT VOLTAGE - V 2 1.5 1 IF = 10 mA for ICCH VF = 0V for ICCL TA = 25°C VEE = 0V 0.5 15 ICCH ICCL Figure 6 IFLH Hysteresis 2.5 ICC - SUPPLY CURRENT - mA -0.05 2.5 0.12 0 IF = 7 to 16 mA IOUT = -100 mA VCC = 15V to 30V VEE = 0V Figure 4 ICC vs. Temperature 0.14 0 0 20 25 VCC - SUPPLY VOLTAGE - V ICCL ICCH 24 19 14 9 IFLH ON IFLH OFF 4 30 -1 Broadcom Confidential -9- 0 0.5 1 1.5 2 2.5 IFLH - LOW TO HIGH CURRENT THRESHOLD - mA 3 ACPL-P340/ACPL-W340 Data Sheet 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 Figure 8 Propagation Delay vs. VCC 120 VCC = 15V to 30V VEE = 0V TP - PROPAGATION DELAY - ns IFLH - LOW TO HIGH CURRENT THRESHOLD -mA Figure 7 IFH vs. Temperature IFLH ON IFLH OFF 70 120 110 110 100 90 VCC = 30V, VEE = 0V TA = 25°C Rg = 10Ω, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 80 70 6 8 TPLH TPHL 10 12 14 IF - FORWARD LED CURRENT - mA TP - PROPAGATION DELAY - ns 100 95 90 85 IF = 7 mA, TA = 25°C VCC = 30V, VEE = 0V Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 70 65 60 10 15 20 25 30 35 40 Rg - SERIES LOAD RESISTANCE - W 20 25 VCC - SUPPLY VOLTAGE - V 30 100 90 IF = 7 mA VCC = 30V, VEE = 0V Rg = 10Ω, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 80 70 TPLH TPHL Figure 12 Propagation Delay vs. Cg 105 75 15 TPLH TPHL 60 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 16 Figure 11 Propagation Delay vs. Rg 80 IF = 7 mA TA = 25°C Rg = 10Ω, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 80 Figure 10 Propagation Delay vs. Temperature TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns 90 120 60 TP - PROPAGATION DELAY - ns 100 60 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 9 Propagation Delay vs. IF 110 TPLH TPHL 45 50 110 105 100 95 90 85 80 75 70 65 60 IF = 7 mA, TA = 25°C VCC = 30V, VEE = 0V Rg = 10Ω DUTY CYCLE = 50% f = 20 kHz 10 Broadcom Confidential - 10 - 15 20 25 30 35 40 Cg - SERIES LOAD CAPACITANCE - nF TPLH TPHL 45 50 ACPL-P340/ACPL-W340 Data Sheet Figure 13 Input Current vs. Forward Voltage IF - FORWARD CURRENT - mA 100 10 1 0.1 1.4 1.45 1.5 1.55 VF - FORWARD VOLTAGE - V 1.6 1.65 Figure 14 IOH Test Circuit 1 4V Pulsed 6 IF = 7 to 16 mA + _ 1 μF 2 5 IOH 3 4 Figure 15 IOL Test Circuit 1 6 1 μF 2 VCC = 15V to 30V IOL 3 + _ 5 + _ 4 2.5V Pulsed Broadcom Confidential - 11 - + _ VCC = 15V to 30V ACPL-P340/ACPL-W340 Data Sheet Figure 16 VOH Test Circuit 1 6 IF = 7 to 16 mA 1 μF 2 5 3 4 VCC = 15V to 30V VOH + _ 100 mA Figure 17 VOL Test Circuit 1 6 100 mA 1 μF 2 5 3 4 VCC = 15V to 30V VOL + _ Figure 18 IFLH Test Circuit 1 IF 6 1 μF 2 5 VO > 5V 10Ω 3 4 VCC = 15V to 30V + _ 25 nF Broadcom Confidential - 12 - ACPL-P340/ACPL-W340 Data Sheet Figure 19 UVLO Test Circuit 1 6 IF = 7 to 16 mA 1 μF 2 5 3 4 VO > 5V + _ VCC Figure 20 tPHL, tPHL, tr, and tf Test Circuit and Waveforms 1 IF = 7 to 16 mA, 20 kHz, 50% Duty Cycle 6 1 μF 2 VCC = 15V to 30V VO 5 + _ 10Ω 3 25 nF 4 Figure 21 CMR Test Circuit with Split Resistors Network and Waveforms 205Ω 1 1 μF 2 5 3 4 VO VCC = 30V + _ 137Ω 10 10mA mA + _ 5V 6 + _ VCM = 1500V Broadcom Confidential - 13 - ACPL-P340/ACPL-W340 Data Sheet Application Information Recommended Application Circuit Product Overview Description The recommended application circuit shown in Figure 22 illustrates a typical gate drive implementation using the ACPLP340. The following describes about driving IGBT. However, it is also applicable to MOSFET. Designers will need to adjust the VCC supply voltage, depending on the MOSFET or IGBT gate threshold requirements (Recommended VCC = 15V for IGBT and 12V for MOSFET). The ACPL-P340/W340 is an optically isolated power output stage capable of driving IGBTs of up to 50A and 1200V. Based on BCDMOS technology, this gate drive optocoupler delivers higher peak output current, better rail-to-rail output voltage performance, and two times faster speed than the previous generation products. The high-peak output current and short propagation delay are needed for fast IGBT switching to reduce dead time and improve system overall efficiency. Rail-to-rail output voltage ensures that the IGBT’s gate voltage is driven to the optimum intended level with no power loss across IGBT. This helps the designer lower the system power which is suitable for bootstrap power supply operation. It has very high CMR(common mode rejection) rating which allows the microcontroller and the IGBT to operate at very large common mode noise found in industrial motor drives and other power switching applications. The input is driven by direct LED current and has a hysteresis that prevents output oscillation if insufficient LED driving current is applied. This will eliminates the need of additional Schmitt trigger circuit at the input LED. The supply bypass capacitors (1 µF) provide the large transient currents necessary during a switching transition. Because of the transient nature of the charging currents, a low current (3.0 mA) power supply will be enough to power the device. The split resistors (in the ratio of 1.5:1) across the LED will provide a high CMR response by providing a balanced resistance network across the LED. The gate resistor RG serves to limit gate charge current and controls the IGBT collector voltage rise and fall times. In PC board design, care should be taken to avoid routing the IGBT collector or emitter traces close to the ACPL-P340 input as this can result in unwanted coupling of transient signals into ACPL-P340 and degrade performance. The stretched SO6 package which is up to 50% smaller than conventional DIP package facilitates smaller more compact design. These stretched packages are compliant to many industrial safety standards such as IEC/EN/DIN EN 60747-5-5, UL 1577 and CSA. Figure 22 Recommended Application Circuit with Split Resistors LED R ANODE 1 NC 2 + _ R CATHODE 3 VCC 6 VOUT 1 µF Rg VCC = 15 V + _ + HVDC Q1 + VCE _ Q2 + VCE _ 5 VEE VEE = 5 V 3-HVDC AC + _ 4 -HVDC Broadcom Confidential - 14 - ACPL-P340/ACPL-W340 Data Sheet Rail-to-Rail Output Selecting the Gate Resistor (Rg) Figure 23 shows a typical gate driver’s high current output stage with 3 bipolar transistors in darlington configuration. During the output high transition, the output voltage rises rapidly to within 3 diode drops of VCC. To ensure the VOUT is at VCC in order to achieve IGBT rated VCE(ON) voltage. The level of VCC will be need to be raised to beyond VCC+3(VBE) to account for the diode drops. And to limit the output voltage to VCC, a pull-down resistor, RPULL-DOWN between the output and VEE is recommended to sink a static current while the output is high. Step 1: Calculate Rg minimum from the IOL peak specification. Figure 23 Typical Gate Driver with Output Stage in Darlington Configuration ANODE 1 8 NC 2 7 CATHODE 3 6 NC 4 5 V –V –V Rg ≥ CC EE OL IOLPEAK 15V + 5V – 0.6V = 1A = 19.4Ω ≈ 20Ω Step 1: Check the ACPL-P340/W340 power dissipation and increase Rg if necessary. The ACPL-P340/W340 total power dissipation (PT ) is equal to the sum of the emitter power (PE) and the output power (PO). VCC RG VOUT The IGBT and Rg in Figure 22 can be analyzed as a simple RC circuit with a voltage supplied by ACPL-P340/W340. PT = PE + PO PE = IF × VF × Duty Cycle PO = PO(BIAS) + PO(SWITCHING) = ICC × (VCC – VEE) + ESW(Rg;Cg) × f RPULL-DOWN VEE Using IF(worst case) = 16 mA, Rg = 20Ω, Max Duty Cycle = 80%, Cg = 25 nF, f = 25 kHz and TA max = 85°C: Figure 24 PMOS and NMOS Output Stage for Rail-to-Rail Output Voltage PE = 16 mA × 1.95V × 0.8 = 25 mW PO = 3 mA × 20V + 3.5 μJ • 25 kHz = 60 mW + 87.5 mW = 147.5 mW < 700 mW (PO(MAX) at 85°C) ANODE 1 6 VCC NC 2 5 VOUT Since PO is less than PO(MAX), Rg = 20Ω is alright for the power dissipation. CATHODE 3 4 VEE Figure 25 Energy Dissipated in the ACPL-P340/W340 for each IGBT Switching Cycle The value of 3 mA for ICC in the previous equation is the maximum ICC over the entire operating temperature range. ACPL-P340 uses a power PMOS to deliver the large current and pull it to VCC to achieve rail-to-rail output voltage as shown in Figure 24. This ensures that the IGBT’s gate voltage is driven to the optimum intended level with no power loss across IGBT even when an unstable power supply is used. ESW - ENERGY PER SWITCHING CYCLE - J 3.0E-05 VCC = 30 V VCC = 20 V VCC = 15 V 2.5E-05 2.0E-05 1.5E-05 1.0E-05 5.0E-06 0.0E+00 Broadcom Confidential - 15 - 0 5 10 15 20 Rg - Gate Resistance - Ω 25 30 ACPL-P340/ACPL-W340 Data Sheet LED Drive Circuit Considerations for High CMR Performance Figure 26 shows the recommended drive circuit for the ACPLP340/W340 that gives optimum common-mode rejection. The two current setting resistors balance the common mode impedances at the LED’s anode and cathode. Common-mode transients can be capacitive coupled from the LED anode, through CLA (or cathode through CLC) to the output-side ground causing current to be shunted away from the LED (which is not wanted when the LED should be on) or conversely cause current to be injected into the LED (which is not wanted when the LED should be off ). Table 8 shows the directions of ILP and ILN depend on the polarity of the common-mode transient. For transients occurring when the LED is on, common-mode rejection (CMH, since the output is at “high” state) depends on LED current (IF). For conditions where IF is close to the switching threshold (IFLH), CMH also depends on the extent to which ILP and ILN balance each other. In other words, any condition where a common-mode transient causes a momentary decrease in IF (meaning when dVCM/dt > 0 and |ILP| > |ILN|, referring to Table 8) will cause a common-mode failure for transients which are fast enough. Likewise for a common-mode transient that occurs when the LED is off (meaning CML, since the output is at “low” state), if an imbalance between ILP and ILN results in a transient IF equal to or greater than the switching threshold of the optocoupler, the transient “signal” may cause the output to spike above 1 V, which constitutes a CML failure. The balanced ILED-setting resistors help equalize the common mode voltage change at the anode and cathode. The shunt drive input circuit will also help to achieve high CML performance by shunting the LED in the off state. Figure 26 Recommended High-CMR Drive Circuit VDD = 5.0V: R1 = 205Ω ±1% R2 = 137Ω ±1% R1/R2 ≈ 1.5 +5 V R1 ANODE 1 ILP CLA 2 R2 3 CATHODE 6 VCC 5 VOUT 4 VEE ILN CLC Common Mode Pulse Polarity and LED Current Transients dVCM/dt ILP Direction ILP Direction If |ILP| < |ILN|, IF is momentarily If |ILP| > |ILN|, IF is momentarily Positive (>0) Away from LED anode through CLA Away from LED cathode through CLC Increase Decrease Negative(