ACPL-W343-500E

ACPL-P343 and ACPL-W343 4.0 Amp Output Current IGBT Gate Drive Optocoupler with Rail-to-Rail Output Voltage in Stretched SO6 Data Sheet Description Features The ACPL-P343/W343 contains an AlGaAs LED, which is optically coupled to an integrated circuit with a power output stage. This optocoupler is ideally suited for driving power IGBTs and MOSFETs used in motor control inverter applications. The high operating voltage range of the output stage provides the drive voltages required by gate controlled devices. The voltage and high peak output current supplied by this optocoupler make it ideally suited for direct driving IGBT with ratings up to 1200V/200A. For IGBTs with higher ratings, this optocoupler can be used to drive a discrete power stage which drives the IGBT gate. The ACPL-P343 and ACPL-W343 have the highest insulation voltage of VIORM = 891 Vpeak and VIORM = 1140 Vpeak, respectively, in the IEC/EN/DIN EN 60747-5-5.             4.0-A maximum peak output current 3.0-A minimum peak output current Rail-to-rail output voltage 200-ns maximum propagation delay 100-ns maximum propagation delay difference LED current input with hysteresis 35 kV/μs minimum Common Mode Rejection (CMR) at VCM = 1500V ICC = 3.0 mA maximum supply current Under voltage lock-out protection (UVLO) with hysteresis Wide operating VCC range: 15V to 30V Industrial temperature range: –40°C to 105°C Safety approval: — UL Recognized 3750/5000 VRMS for 1 min. — CSA — IEC/EN/DIN EN 60747-5-5 VIORM = 891/1140 Vpeak Applications      IGBT/MOSFET gate drive AC and brushless DC motor drives Renewable energy inverters Industrial inverters Switching power supplies CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation that may be induced by ESD. The components featured in this data sheet are not to be used in military or aerospace applications or environments. Broadcom -1- ACPL-P343 and ACPL-W343 Data Sheet Functional DIagram ANODE 1 6 VCC NC 2 5 VOUT CATHODE 3 4 VEE NOTE A 1-μF bypass capacitor must be connected between pins VCC and VEE. Truth Table LED VCC – VEE “POSITIVE GOING” (that is, TURN-ON) VCC – VEE “NEGATIVE GOING” (that is, TURN-OFF) VO OFF 0–30 V 0–30 V LOW ON 0–12.1 V 0–11.1 V LOW ON 12.1–13.5 V 11.1–12.4 V TRANSITION ON 13.5–30 V 12.4–30 V HIGH Ordering Information ACPL-P343 is UL Recognized with 3750 VRMS for 1 minute per UL1577. ACPL-W343 is UL Recognized with 5000 VRMS for 1 minute per UL1577. Option Part Number Package Surface Mount Stretched SO-6 X Tape and Reel IEC/EN/DIN EN 60747-5-5 Quantity RoHS Compliant ACPL-P343 ACPL-W343 -000E -500E X -060E X -560E X 100 per tube X X 1000 per reel X 100 per tube X 1000 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-P343-560E to order product of Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: ACPL-W343-000E to order product of Stretched SO-6 Surface Mount package in Tube packaging and RoHS compliant. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. Broadcom -2- ACPL-P343 and ACPL-W343 Data Sheet Package Outline Drawings ACPL-P343 Stretched SO-6 Package (7-mm Clearance) 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) *4.580 +– 0.254 0 Land Pattern Recommendation (0.180 +– 0.010 0.000 ) 0.76 (0.03) 1.27 (0.05) 10.7 (0.421) 2.16 (0.085) 7.62 (0.300) 6.81 (0.268) 0.45 (0.018) 45° 1.590 ±0.127 (0.063 ±0.005) 3.180 ±0.127 (0.125 ±0.005) 7° 7° 7° 0.20 ±0.10 (0.008 ±0.004) 7° 1 ±0.250 (0.040 ±0.010) 5° NOM. 9.7 ±0.250 (0.382 ±0.010) 0.254 ±0.050 (0.010 ±0.002) Floating Lead Protusions max. 0.25 (0.01) Dimensions in Millimeters (Inches) Lead Coplanarity = 0.1 mm (0.004 Inches) * Total package length (inclusive of mold flash): 4.834 ± 0.254 (0.190 ± 0.010) Broadcom -3- ACPL-P343 and ACPL-W343 Data Sheet ACPL-W343 Stretched SO-6 Package (8-mm Clearance) *4.580 +– 0.254 0 (0.180 +– 0.010 0.000 ) 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) Land Pattern Recommendation 0.76 (0.03) 1 6 2 5 3 4 1.27 (0.05) 7.62 (0.300) 6.807 +– 0.127 0 (0.268 +– 0.005 0.000 ) 1.590 ±0.127 (0.063 ±0.005) 7° 3.180 ±0.127 (0.125 ±0.005) 45° 0.45 (0.018) 1.905 (0.075) 12.65 (0.5) 7° 0.20 ±0.10 (0.008 ±0.004) 0.750 ±0.250 (0.0295 ±0.010) 7° 7° 0.254 ±0.050 (0.010 ±0.002) 35° NOM. Floating Lead Protusions max. 0.25 (0.01) Dimensions in Millimeters (Inches) 11.500 ±0.25 (0.453 ±0.010) Lead Coplanarity = 0.1 mm (0.004 Inches) * Total package length (inclusive of mold flash) 4.834 ± 0.254 (0.190 ± 0.010) Recommended Pb-Free IR Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non- Halide Flux should be used. Regulatory Information The ACPL-P343/W343 is approved by the following organizations:  UL Recognized under UL 1577, component recognition program up to VISO = 3750 VRMS (ACPL-P343) and VISO = 5000 VRMS (ACPL-W343) expected prior to product release.  CSA CSA Component Acceptance Notice #5, File CA 88324  IEC/EN/DIN EN 60747-5-5 (Option 060 Only) Maximum Working Insulation Voltage VIORM = 891 Vpeak (ACPL-P343) and VIORM = 1140 Vpeak (ACPL-W343) Broadcom -4- ACPL-P343 and ACPL-W343 Data Sheet IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (Option 060 – Under Evaluation) ACPL-P343 Option 060 ACPL-W343 Option 060 I – IV I – IV I – III I – III I – IV I – IV I – IV I – IV I – III 40/105/21 40/105/21 2 2 VIORM 891 1140 Vpeak Input to Output Test Voltage, Method b VIORM × 1.875 = VPR, 100% Production Test with tm = 1s, Partial discharge < 5 pC VPR 1671 2137 Vpeak Input to Output Test Voltage, Method a* VIORM × 1.6 = VPR, Type and Sample Test, tm = 10s, Partial discharge < 5 pC VPR 1426 1824 Vpeak VIOTM 6000 8000 Vpeak TS 175 230 600 175 230 600 °C mA mW >109 >109  Description Symbol Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 450 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage≤ 1000 Vrms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage a Highest Allowable Overvoltage (Transient Overvoltage tini = 60s) Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500V a. IS, INPUT PS, OUTPUT RS Units Refer to IEC/EN/DIN EN 60747-5-5 Optoisolator Safety Standard section of the Broadcom Regulatory Guide to Isolation Circuits, AV02-2041EN, for a detailed description of Method a and Method b partial discharge test profiles. NOTE These optocouplers are suitable for “safe electrical isolation” only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Surface-mount classification is Class A in accordance with CECC 00802. Broadcom -5- ACPL-P343 and ACPL-W343 Data Sheet Insulation and Safety Related Specifications Parameter Symbol ACPL-P343 ACPL-W343 Units Conditions Minimum External Air Gap (External Clearance) L(101) 7.0 8.0 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 8.0 8.0 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. >175 >175 V IIIa IIIa Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) CTI Isolation Group NOTE DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) All Broadcom data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must be met as specified for individual equipment standards. For creepage, the shortest distance path along the surface of a printed circuit board between the solder fillets of the input and output leads must be considered (the recommended land pattern does not necessarily meet the minimum creepage of the device). There are recommended techniques such as grooves and ribs which may be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors, such as pollution degree and insulation level. Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature TS –55 125 °C Operating Temperature TA –40 105 °C Output IC Junction Temperature TJ — 125 °C Average Input Current IF(AVG) — 25 mA Peak Transient Input Current ( 5V Threshold Input Voltage High to Low VFHL 0.8 — — V VF 1.2 1.55 1.95 V Temperature Coefficient of Input Forward Voltage VF/TA — –1.7 — Input Reverse Breakdown Voltage BVR 5 — — V IR = 100 μA Input Capacitance CIN — 70 — pF f = 1 MHz, VF = 0 V VUVLO+ 12.1 12.8 13.5 V VO > 5V, IF = 10 mA VUVLO- 11.1 11.8 12.4 UVLOHYS — 1.0 — Input Forward Voltage UVLO Threshold UVLO Hysteresis IF = 10 mA 12, 13, 24 19 mV/°C IF = 10 mA V a. Maximum pulse width = 50 μs. b. Output is sourced at –3.0A with a maximum pulse width = 10 μs. VCC – VO is measured to ensure 15V or below. c. Output is sourced at 3.0A with a maximum pulse width = 10 μs. VO – VEE is measured to ensure 15V or below. d. Output is sourced at –3.0A/3.0A with a maximum pulse width = 10 μs. e. In this test, VOH is measured with a DC load current. When driving capacitive loads, VOH will approach VCC as IOH approaches 0 amps. f. Maximum pulse width = 1 ms. Broadcom -7- 1 25 ACPL-P343 and ACPL-W343 Data Sheet Switching Specifications (AC) Unless otherwise noted, all typical values are at TA = 25°C, VCC – VEE = 30V, VEE = Ground; all minimum and maximum specifications are at recommended operating conditions (TA = –40°C to 105°C, IF(ON) = 7 mA to 16 mA, VF(OFF) = –3.6V to 0.8V, VEE = Ground, VCC = 15V to 30V). Parameter Symbol Min. Typ. Max. Units Propagation Delay Time to High Output Level tPLH 50 98 200 ns Propagation Delay Time to Low Output Level tPHL 50 95 200 ns Pulse Width Distortion PWD — 22 70 ns PDD (tPHL – tPLH) –100 — 100 ns Rise Time tR — 43 — ns Fall Time tF — 40 — ns Output High Level Common Mode Transient Immunity |CMH| 35 50 — Output Low Level Common Mode Transient Immunity |CML| 35 50 — Propagation Delay Difference Between Any Two Parts Test Conditions Rg = 10, Cg = 25 nF, f = 20 kHz, Duty Cycle = 50%, IF = 7 mA to 16 mA, VCC = 15V to 30V Figure Note 14, 15, 16, 17, 18, 26 a 33, 34 VCC = 30V 26 kV/μs TA = 25°C, IF = 10 mA, VCC = 30V, VCM = 1500V with split resistors 27 kV/μs TA = 25°C, VF = 0V, VCC = 30V, VCM = 1500V with split resistors b c, d c, e a. Pulse Width Distortion (PWD) is defi ned as |tPHL – tPLH| for any given device. b. The diff erence between tPHL and tPLH between any two ACPL-P343 parts under the same test condition. c. Pin 2 must be connected to LED common. d. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in the high state (that is, VO > 15.0V). e. Common mode transient immunity in a low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a low state (that is, VO < 1.0V). Broadcom -8- ACPL-P343 and ACPL-W343 Data Sheet Package Characteristics Unless otherwise noted, all typical values are at TA = 25°C; all minimum/maximum specifi cations are at recommended operating conditions. Parameter Input-Output Momentary Withstand Voltagea Symbol Device Min. VISO ACPL-P343 ACPL-W343 Typ. Max. Units Test Conditions 3750 — VRMS RH < 50%, t = 1 min., TA = 25°C b c 5000 — VRMS RH < 50%, t = 1 min., TA = 25°C c, d Input-Output Resistance RI-O — > 5012 —  VI-O = 500 VDC Input-Output Capacitance CI-O — 0.6 — pF f =1 MHz LED-to-Ambient Thermal Resistance R11 — 135 — °C/W LED-to-Detector Thermal Resistance R12 — 27 — Detector-to-LED Thermal Resistance R21 — 39 — Detector-to-Ambient Thermal Resistance R22 — 47 — Figure Note , c e a. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to your equipment level safety specification or Broadcom Application Note 1074, Optocoupler Input-Output Endurance Voltage. b. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≤ 4500 VRMS for 1 second (leakage detection current limit, II-O < 5 μA). c. Device considered a two-terminal device: pins 1, 2, and 3 shorted together and pins 4, 5, and 6 shorted together. d. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≤ 6000 VRMS for 1 second (leakage detection current limit, II-O < 5 μA). e. The device was mounted on a high conductivity test board as per JEDEC 51-7. Broadcom -9- ACPL-P343 and ACPL-W343 Data Sheet Figure 1 High Output Rail Voltage vs. Temperature Figure 2 VOH vs. Temperature (VOH-VCC) - HIGH OUTPUT VOLTAGE DROP - V VOH - HIGH OUTPUT RAIL VOLTAGE - V 29.84 IF = 10 mA IOUT = 0 mA VCC = 30 V VEE = 0 V 29.83 29.82 29.81 29.8 29.79 29.78 29.77 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 3 IOH vs. Temperature IOH - OUTPUT HIGH CURRENT - A IOH - OUTPUT HIGH CURRENT - A IF = 7 to 16 mA VOUT = VCC – 4 V VCC = 15 to 30 V VEE = 0 V -1 -1.5 -2 -2.5 -3 -3.5 -4 Figure 5 VOL vs. Temperature -0.1 -0.15 -0.2 -0.25 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 0.5 0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 1 2 3 4 5 (VOH-VCC) - HIGH OUTPUT VOLTAGE DROP - V 6 Figure 6 IOL vs. Temperature 4.5 IOL - OUTPUT LOW CURRENT - A 0.12 0.1 0.08 0.06 0.02 IF = 7 to 16 mA VCC = 15 to 30 V VEE = 0 V TA = 25° C 0 0.14 VOL - OUTPUT LOW VOLTAGE - V -0.05 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 0.04 IF = 7 to 16 mA IOUT = -100 mA VCC = 15 to 30 V VEE = 0 V Figure 4 IOH vs. VOH 0 -0.5 0 VF (OFF) = 0 V IOUT = 100 mA VCC = 15 to 30 V VEE = 0 V 0 4 3.5 3 2.5 2 1.5 1 0.5 VF (OFF) = 0 V VOUT = 2.5 V VCC = 15 to 30 V VEE = 0 V 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Broadcom - 10 - ACPL-P343 and ACPL-W343 Data Sheet 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 VF (OFF) = 0 V VCC = 15 to 30 V VEE = 0 V TA = 25° C 0 0.5 1 1.5 2 VOL - OUTPUT LOW VOLTAGE - V 2.5 3 Figure 9 RDS,OL vs. Temperature RDS,OL - LOW OUTPUT TRANSISTOR RDS(ON) - : RDS,OH - HIGH OUTPUT TRANSISTOR RDS(ON) - : Figure 8 RDS,OH vs. Temperature 2.5 2 1.5 1 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 2.5 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 VF (OFF) = 0 V IOUT = 3 A VCC = 15 to 30 V VEE = 0 V 2 1.5 1 IF = 10 mA for ICCH VF = 0 V for ICCL VCC = 30 V VEE = 0 V 0.5 ICCH ICCL 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 11 ICC vs. VCC -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C Figure 12 IFLH Hysteresis 34 2.5 TA = 25° C VCC = 30 V VEE = 0 V 29 2 VO - OUTPUT VOLTAGE - V ICC - SUPPLY CURRENT - mA IF = 7 to 16 mA IOUT = -3 A VCC = 15 to 30 V VEE = 0 V 0.5 Figure 10 ICC vs. Temperature ICC - SUPPLY CURRENT - mA IOL - OUTPUT LOW CURRENT - A Figure 7 IOL vs. VOL 1.5 1 IF = 10 mA for ICCH VF = 0 V for ICCL TA = 25° C VEE = 0 V 0.5 ICCL ICCH 24 19 14 9 IFLH ON IFLH OFF 4 0 -1 15 20 25 VCC - SUPPLY VOLTAGE - V 30 0 Broadcom - 11 - 0.5 1 1.5 2 2.5 IFLH - LOW TO HIGH CURRENT THRESHOLD - mA 3 ACPL-P343 and ACPL-W343 Data Sheet Figure 14 Propagation Delays vs. VCC 120 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 VCC = 15 to 30 V VEE = 0 V TP - PROPAGATION DELAY - ns IFLH - LOW TO HIGH CURRENT THRESHOLD -mA Figure 13 IFLH vs. Temperature IFLH ON IFLH OFF 110 100 90 70 Figure 15 Propagation Delays vs. IF 15 120 120 110 110 100 90 VCC = 30 V, VEE = 0 V TA = 25° C Rg = 10 :, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 80 70 TPLH TPHL 8 10 12 14 IF - FORWARD LED CURRENT - mA 16 Figure 17 Propagation Delay vs. Rg TP - PROPAGATION DELAY - ns 100 95 90 85 80 IF = 7 mA, TA = 25° C VCC = 30 V, VEE = 0 V Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 70 65 TPLH TPHL 60 10 15 20 25 30 35 40 Rg - SERIES LOAD RESISTANCE - : 100 90 80 70 IF = 7 mA VCC = 30 V, VEE = 0 V Rg = 10 :, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz TPLH TPHL Figure 18 Propagation Delay vs. Cg 105 75 30 60 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C 60 6 20 25 VCC - SUPPLY VOLTAGE - V Figure 16 Propagation Delays vs. Temperature TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns TPLH TPHL 60 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TA - TEMPERATURE - °C TP - PROPAGATION DELAY - ns IF = 7 mA TA = 25° C Rg = 10 :, Cg = 25 nF DUTY CYCLE = 50% f = 20 kHz 80 45 50 110 105 100 95 90 85 80 75 70 65 60 IF = 7 mA, TA = 25° C VCC = 30 V, VEE = 0 V Rg = 10 : DUTY CYCLE = 50% f = 20 kHz 10 Broadcom - 12 - 15 20 25 30 35 40 Cg - SERIES LOAD CAPACITANCE - nF TPLH TPHL 45 50 ACPL-P343 and ACPL-W343 Data Sheet Figure 19 Input Current vs. Forward Voltage IF - FORWARD CURRENT - mA 100 10 1 0.1 1.4 1.45 1.5 1.55 VF - FORWARD VOLTAGE - V 1.6 1.65 Figure 20 IOH Test Circuit 4 V Pulsed 1 6 IF = 7 to 16 mA + _ 1 PF 2 IOH 3 4 Figure 21 IOL Test Circuit 1 6 1 PF 2 VCC = 15 to 30 V IOL 3 + _ 5 VCC = 15 to 30 V + _ 5 + _ 4 2.5 V Pulsed Broadcom - 13 - ACPL-P343 and ACPL-W343 Data Sheet Figure 22 VOH Test Circuit 1 6 IF = 7 to 16 mA 1 PF 2 5 3 4 VCC = 15 to 30 V VOH + _ 100 mA Figure 23 VOL Test Circuit 1 6 100 mA 1 PF 2 5 3 4 VCC = 15 to 30 V VOL + _ Figure 24 IFLH Test Circuit 1 6 1 PF IF 2 5 VO > 5 V 10 : 3 4 25 nF Broadcom - 14 - VCC = 15 to 30 V + _ ACPL-P343 and ACPL-W343 Data Sheet Figure 25 UVLO Test Circuit 1 6 IF = 7 to 16 mA 1 PF 2 5 3 4 VO > 5 V + _ VCC Figure 26 tPHL, tPHL, tr and tf Test Circuit and Waveforms 1 IF = 7 to 16 mA, 20 kHz, 50% Duty Cycle 6 1 PF 2 VCC = 15 to 30 V VO 5 + _ 10 : 3 25 nF 4 Figure 27 CMR Test Circuit with Split Resistors Network and Waveforms 205 : 1 1 PF 2 5 3 4 VO VCC = 30 V + _ 137 : 10 mA P$ + _ 5V 6 + _ VCM = 1500 V Broadcom - 15 - ACPL-P343 and ACPL-W343 Data Sheet Application Information Recommended Application Circuit The recommended application circuit shown in Figure 28 illustrates a typical gate drive implementation using the ACPL-P343. The following describes about driving IGBT. However, it is also applicable to MOSFET. Designers will need to adjust the VCC supply voltage, depending on the MOSFET or IGBT gate threshold requirements (recommended VCC = 15V for IGBT and 12V for MOSFET). Product Overview Description The ACPL-P343/W343 is an optically isolated power output stage capable of driving IGBTs of up to 200A and 1200V. Based on BCDMOS technology, this gate drive optocoupler delivers higher peak output current, better rail-to-rail output voltage performance and two times faster speed than the previous generation products. The supply bypass capacitors (1 μF) provide the large transient currents necessary during a switching transition. Because of the transient nature of the charging currents, a low current (3.0 mA) power supply will be enough to power the device. The split resistors (in the ratio of 1.5:1) across the LED will provide a high CMR response by providing a balanced resistance network across the LED. The high peak output current and short propagation delay are needed for fast IGBT switching to reduce dead time and improve system overall efficiency. Rail-to-rail output voltage ensures that the IGBT’s gate voltage is driven to the optimum intended level with no power loss across IGBT. This helps the designer lower the system power which is suitable for bootstrap power supply operation. The gate resistor RG serves to limit gate charge current and controls the IGBT collector voltage rise and fall times. It has very high CMR(common mode rejection) rating which allows the microcontroller and the IGBT to operate at very large common mode noise found in industrial motor drives and other power switching applications. The input is driven by direct LED current and has a hysteresis that prevents output oscillation if insufficient LED driving current is applied. This will eliminates the need of additional Schmitt trigger circuit at the input LED. In PC board design, care should be taken to avoid routing the IGBT collector or emitter traces close to the ACPL-P343 input as this can result in unwanted coupling of transient signals into ACPL-P343 and degrade performance. The stretched SO6 package which is up to 50% smaller than conventional DIP package facilitates smaller more compact design. These stretched packages are compliant to many industrial safety standards, such as IEC/EN/DIN EN 60747-5-5, UL 1577, and CSA. Figure 28 Recommended Application Circuit with Split Resistors LED Drive R ANODE 1 NC 2 + _ R CATHODE 3 VCC 6 VOUT VCC = 15 V + _ 1 PF Rg + HVDC Q1 + VCE _ Q2 + VCE _ 5 VEE VEE = 5 V 3-HVDC AC + _ 4 -HVDC Broadcom - 16 - ACPL-P343 and ACPL-W343 Data Sheet Rail-to-Rail Output Figure 29 shows a typical gate driver’s high current output stage with 3 bipolar transistors in darlington configuration. During the output high transition, the output voltage rises rapidly to within 3 diode drops of VCC. To ensure the VOUT is at VCC in order to achieve IGBT rated VCE(ON) voltage. The level of VCC will need to be raised to beyond VCC+3(VBE) to account for the diode drops. And to limit the output voltage to VCC, a pull-down resistor, RPULL-DOWN between the output and VEE is recommended to sink a static current while the output is high. ACPL-P343 uses a power PMOS to deliver the large current and pull it to VCC to achieve rail-to-rail output voltage as shown in Figure 30. This ensures that the IGBT’s gate voltage is driven to the optimum intended level with no power loss across IGBT even when an unstable power supply is used. Figure 29 Typical Gate Driver with Output Stage in Darlington Confi guration ANODE 1 8 NC 2 7 CATHODE 3 6 NC 4 5 VCC VOUT RG RPULL-DOWN VEE Figure 30 ACPL-P343/W343 with PMOS and NMOS Output Stage for Rail-to-Rail Output Voltage ANODE 1 6 VCC NC 2 5 VOUT CATHODE 3 4 VEE Broadcom - 17 - ACPL-P343 and ACPL-W343 Data Sheet Selecting the Gate Resistor (Rg) Step 1: Calculate Rg minimum from the IOL peak specification. The IGBT and Rg in Figure 28 can be analyzed as a simple RC circuit with a voltage supplied by ACPL-P343/W343. Rg ≥ (VCC – VEE – VOL) / IOLPEAK = (15V + 5V – 2.9V) / 4A = 4.3 ≈ 5 The VOL value of 2.9V in the previous equation is the VOL at the peak current of 4.0A (see Figure 7). Step 2: Check the ACPL-P343/W343 power dissipation and increase Rg if necessary. The ACPL-P343/W343 total power dissipation (PT) is equal to the sum of the emitter power (PE) and the output power (PO). PT = PE + PO PE = IF × VF × Duty Cycle PO = PO(BIAS) + PO(SWITCHING) = ICC × (VCC – VEE) + ESW(Rg;Cg) × f Using IF(worst case) = 16 mA, Rg = 5, Max Duty Cycle = 80%, Cg = 25 nF, f = 25 kHz and TA max = 85°C: PE = 16 mA × 1.95V × 0.8 = 25 mW PO = 3 mA × 20V + 5 mJ × 25 kHz = 60 mW + 125 mW = 185 mW < 700 mW (PO(MAX) @ 85°C) The value of 3 mA for ICC in the previous equation is the maximum ICC over the entire operating temperature range. Since PO is less than PO(MAX), Rg = 5 is alright for the power dissipation. Figure 31 Energy Dissipated in the ACPL-P343/W343 for Each IGBT Switching Cycle ESW - ENERGY PER SWITCHING CYCLE - J 3.0E-05 VCC = 30 V VCC = 20 V VCC = 15 V 2.5E-05 2.0E-05 1.5E-05 1.0E-05 5.0E-06 0.0E+00 0 2 4 6 Rg - Gate Resistance - : 8 10 Broadcom - 18 - ACPL-P343 and ACPL-W343 Data Sheet LED Drive Circuit Considerations for High CMR Performance Figure 32 shows the recommended drive circuit for the ACPL-P343/W343 that gives optimum common-mode rejection. The two current setting resistors balance the common mode impedances at the LED’s anode and cathode. Common-mode transients can be capacitive coupled from the LED anode, through CLA (or cathode through CLC) to the output-side ground causing current to be shunted away from the LED (which is not wanted when the LED should be on) or conversely cause current to be injected into the LED (which is not wanted when the LED should be off ). Table 1 shows the directions of ILP and ILN depend on the polarity of the common-mode transient. For transients occurring when the LED is on, common-mode rejection (CMH, since the output is at “high” state) depends on LED current (IF). For conditions where IF is close to the switching threshold (IFLH), CMH also depends on the extent to which ILP and ILN balance each other. In other words, any condition where a common-mode transient causes a momentary decrease in IF (that is, when dVCM/dt > 0 and |ILP| > |ILN|, referring to Table 1) will cause a common-mode failure for transients which are fast enough. Likewise for a common-mode transient that occurs when the LED is off (that is, CML, since the output is at “low” state), if an imbalance between ILP and ILN results in a transient IF equal to or greater than the switching threshold of the optocoupler, the transient “signal” may cause the output to spike above 1V, which constitutes a CML failure. The balanced ILED-setting resistors help equalize the common mode voltage change at the anode and cathode. The shunt drive input circuit will also help to achieve high CML performance by shunting the LED in the off state. Figure 32 Recommended High-CMR Drive Circuit for the ACPL-P343/W343 VDD = 5.0 V: R1 = 205 : ±1% R2 = 137 : ±1% R1/R2 ≈ 1.5 +5 V R1 ANODE 1 ILP CLA 2 6 VCC 5 VOUT 4 VEE ILN R2 3 CATHODE CLC Table 1 Common Mode Pulse Polarity and LED Current Transients dVCM/dt ILP Direction ILP Direction If |ILP| < |ILN|, IF Is Momentarily If |ILP| > |ILN|, IF Is Momentarily Positive (>0) Away from LED anode through CLA Away from LED cathode through CLC Increase Decrease Negative(