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ACPM-7821-BLK

ACPM-7821-BLK

  • 厂商:

    AVAGO(博通)

  • 封装:

  • 描述:

    ACPM-7821-BLK - 4 x 4 Power Amplifier Module for J-CDMA (898 - 925 MHz) - AVAGO TECHNOLOGIES LIMITED

  • 数据手册
  • 价格&库存
ACPM-7821-BLK 数据手册
ACPM-7821 4 x 4 Power Amplifier Module for J-CDMA (898 – 925 MHz) Data Sheet Description The ACPM-7821 is a CDMA (Code Division Multiple Access) power amplifier module designed for handsets operating in the 898–925MHz bandwidth. The ACPM-7821 meets stringent CDMA linearity requirements up to 28 dBm output power. A low current (Vcont) pin is provided for high efficiency improvement of the low output power range. The ACPM-7821 features CoolPAM circuit technology offering state-of-the-art reliability, temperature stability and ruggedness. ACPM-7821 is self contained, incorporating 50 ohm input and output matching networks. Features • Excellent linearity • High efficiency • 10-pin surface mounting package (4 mm x 4 mm x 1.1 mm) • Low quiescent current • Internal 50Ω matching networks for both RF input and output • CDMA 95A/B, CDMA2000-1X/EVDO Applications • Digital Cellular (J-CDMA) Functional Block Diagram Vref(1) Vcont(2) Bias Circuit & Control Logic Input Match RF Input (4) MMIC DA Inter Stage Match PA Output Match RF Output (8) MODULE Vcc1(5) Vcc2(6) Ordering Information Part Number ACPM-7821-TR1 ACPM-7821-BLK No. of Devices 1000 100 Container 7" Tape and Reel Bulk Table 1. Absolute Maximum Ratings[1] Parameter RF Input Power DC Supply Voltage DC Reference Voltage Control Voltage Storage Temperature Symbol Pin Vcc Vref Vcont Tstg Min. – 0 0 0 -55 Nominal – 3.4 2.85 2.85 – Max. 10.0 5.0 3.3 3.3 +125 Unit dBm V V V °C Table 2. Recommended Operating Conditions Parameter DC Supply Voltage DC Reference Voltage Mode Control Voltage – High Power Mode – Low Power Mode Operating Frequency Case Operating Temperature Symbol Vcc Vref Vcont Vcont Fo To Min. 3.2 2.75 – – 898 -30 Nominal 3.4 2.85 0 2.85 – 25 Max. 4.2 2.95 – – 925 85 Unit V V V V MHz °C Table 3. Power Range Truth Table Power Mode High Power Mode Low Power Mode Shut Down Mode Symbol PR2 PR1 – Vref 2.85 2.85 0 Vcont[2] Low High – Range ~ 28 dBm ~ 17 dBm – Notes: 1. No damage assuming only one parameter is set at limit at a time with all other parameters set at or below nominal value. 2. High (2.0V – 3.0V), Low (0.0V – 0.5V). 2 Table 4. Electrical Characteristics for CDMA Mode (Vcc=3.4V, Vref=2.85V, T=25°C) Characteristics Gain Power Added Efficiency Total Supply Current Symbol Gain_hi Gain_low PAE_hi PAE_low Icc_hi Icc_low Iq_hi Iq_low Iref_hi Iref_low Icont Ipd 0.885 MHz offset ACPR1_hi 1.98 MHz offset ACPR2_hi 0.885 MHz offset ACPR1_low 1.98 MHz offset ACPR2_low Second Third 2f0 3f0 VSWR S RxBN Ru Condition Pout = 28.0 dBm Pout = 17 dBm Pout = 28.0 dBm Pout = 17 dBm Pout = 28.0 dBm Pout = 17 dBm High Power Mode Low Power Mode Pout = 28.0 dBm Pout = 17 dBm Pout = 17 dBm Vref = 0V Pout = 28.0 dBm Pout = 28.0 dBm Pout = 17 dBm Pout = 17 dBm Pout = 28.0 dBm Pout = 28.0 dBm Min. 24 17 37 17 Typ. 27 20 41.2 21.5 450 68 85 14 4 4.5 0.2 0.2 -53 -60 -57 -68 -35 -55 2:1 Max. Unit dB dB % % 500 86 115 22 7 8 1 5 -46 -57 -46 -57 -30 -40 2.5:1 -60 mA mA mA mA mA mA mA µA dBc dBc dBc dBc dBc dBc VSWR dBc dBm/Hz VSWR Quiescent Current Reference Current Control Current[1] Total Current in Power-down mode ACPR in High power mode ACPR in Low power mode Harmonic Suppression Input VSWR Stability (Spurious Output) Noise Power in Rx Band Ruggedness (No Damage) Notes: 1. Control current when series 6.2kohm is used. 2. Characterized with IS-95 modulated signal VSWR 6:1, All phase Pout = 28.0 dBm Pout < 28.0 dBm, Pin < 10.0 dBm -136 -134 10:1 3 Characterization Data(Vcc=3.4V, Vref=2.85V, T=25°C) 500 450 25 30 400 350 898MHz Current (mA) 20 898MHz 300 Gain (dB) 910MHz 250 200 150 100 50 0 -10 -5 0 5 10 Pout (dBm) 15 20 25 30 925MHz 910MHz 15 925MHz 10 5 0 -10 -5 0 5 10 Pout (dBm) 15 20 25 30 Figure 1. Total Current vs. Output Power. Figure 2. Gain vs. Output Power. 45 -30 -35 -40 -45 898MHz 40 35 30 25 898MHz ACPR1 (dBc) -50 -55 -60 -65 -70 -75 -80 910MHz PAE (%) 910MHz 925MHz 20 15 925MHz 10 5 0 -10 -10 -5 0 5 10 Pout (dBm) 15 20 25 30 -5 0 5 10 Pout (dBm) 15 20 25 30 Figure 3. Power Added Efficiency vs. Output Power. Figure 4. Adjacent Channel Power Ratio 1 vs. Output Power. -40 -45 -50 -55 898MHz ACPR2 (dBc) -60 910MHz -65 -70 -75 -80 -85 -90 -10 -5 0 5 10 Pout (dBm) 15 20 25 30 925MHz Figure 5. Adjacent Channel Power Ratio 2 vs. Output Power. 4 Evaluation Board Description Vref Vcont R1 6.2kohm RF In C1 100pF C2 100pF 1 Vref 2 Vcont 3 GND 4 RF In GND 10 GND 9 RF Out 8 GND 7 Vcc2 6 C5 1.5nF C6 Vcc2 2.2µF RF Out Vcc1 C4 2.2µF C3 22pF C7 68pF 5 Vcc1 Figure 6. Evaluation Board Schematic. R1 C2 C1 AVAGO ACPM-7821 PYYWW AAAAA C7 C3 C4 C5 C6 Figure 7. Evaluation Board Assembly Diagram. 5 Package Dimensions and Pin Descriptions Pin 1 Mark 1 2 3 4 5 4 ± 0.1 10 9 8 7 6 1.1± 0.1 4 ± 0.1 0.48 TOP VIEW SIDE VIEW 1.0 1.9 Pin # 1 Name Vref Vcont GND RF In Vcc1 Vcc2 GND RF Out GND GND Description Reference Voltage Control Voltage Ground RF Input Supply Voltage Supply Voltage Ground RF Output Ground Ground 0.85 0.85 0.5 0.6 2 3 4 5 6 1.9 1.7 0.4 0.4 7 8 9 10 BOTTOM VIEW Figure 8. Package Dimensional Drawing and Pin Descriptions. PIN DESCRIPTIONS 6 Package Dimensions and Pin Descriptions, continued Pin 1 Mark AVAGO ACPM-7821 PYYWW AAAAA Manufacturing Part Number Lot Number P Manufacturing info YY Manufacturing Year WW Work Week AAAAA Assembly Lot Number Figure 9. Marking Specifications. 7 Peripheral Circuit in Handset +2.85V C8 MSM PA_ON PA_R0 R1 C2 Vdd RF In RF SAW C1 ACPM-7821 Vref Vcont GND IN Vcc1 GND GND OUT GND Vcc2 Output Matching Circuit C6 Duplexer C7 C4 L1 RF Out C3 C5 VBATT Notes: Recommended voltage for Vref is 2.85V Place C1 near to Vref pin. Place C3 and C4 close to pin 5 (Vcc1) and pin 6 (Vcc2). These capacitors can affect the RF performance Use 50Ω transmission line between PAM and Duplexer and make it as short as possible to reduce conduction loss π-type circuit topology is good to use for matching circuit between PA and Duplexer. Pull-up resistor(R1) should be used to limit current drain. 6.2kΩ is recommended for ACPM-7821 Figure 10. Peripheral Circuit. 8 Calibration Calibration procedure is shown in Figure 11. Two calibration tables, high mode and low mode respectively, are required for CoolPAM, which is due to gain difference in each mode. For continuous output power at the mode change points, the input power should be adjusted according to gain step during the mode change. power where PA mode changes from high mode to low mode), should be adopted to prevent system oscillation. 3 to 5 dB is recommended for Hysteresis. Average Current and Talk Time Probability Distribution Function implies that what is important for longer talk time is the efficiency of low or medium power range rather than the efficiency at full power. ACPM-7821 idle current is 14 mA and operating current at 17 dBm is 68 mA at nominal condition. This PA with low current consumption prolongs talk time by no less than 30 minutes compared to other PAs. Average current = ∫(PDF x Current)dp Offset Value (difference between rising point and falling point) Offset value, which is the difference between the rising point (output power where PA mode changes from low mode to high mode) and falling point (output TX AGC Gain Low mode High mode High Mode Low Mode Min PWR Falling Rising Pout Max PWR Falling Rising Pout Figure 11. Calibration procedure. Figure 12. Setting of offset between rising and falling power. 5.00 4.50 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 -50 -40 -30 -20 -10 0 10 20 30 CDG Urban CDG Suburban 700 600 500 400 300 200 100 0 PA Out (dBm) Conv PAM Digitally Controlled PA Cool PAM Figure 13. CDMA Power Distribution Function. 9 PCB Design Guidelines The recommended ACPM-7821 PCB Land pattern is shown in Figure 14 and Figure 15. The substrate is coated with solder mask between the I/O and conductive paddle to protect the gold pads from short circuit that is caused by solder bleeding/bridging. 0.25 0.1 0.85 Stencil Design Guidelines A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. The recommended stencil layout is shown in Figure 16. Reducing the stencil opening can potentially generate more voids. On the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the I/O pads or conductive paddle to adjacent I/O pads. Considering the fact that solder paste thickness will directly affect the quality of the solder joint, a good choice is to use laser cut stencil composed of 0.100 mm (4 mils) or 0.127 mm (5 mils) thick stainless steel which is capable of producing the required fine stencil outline. 0.4 0.7 0.6 Ø 0.3mm on 0.6mm pitch Figure 14. Metallization. 0.8 0.5 0.65 1.8 0.6 0.85 2.0 0.8 x 0.5 0.8 x 0.6 Figure 15. Solder Mask Opening. 0.7 0.6 0.4 1.6 0.85 1.6 Figure 16. Solder Paste Stencil Aperture. 10 Tape Drawing Dimension List Annote A0 B0 K0 D0 D1 P0 P1 Millimeter 4.40±0.10 4.40±0.10 1.70±0.10 1.55±0.05 1.60±0.10 4.00±0.10 8.00±0.10 Annote P2 P10 E F W T Millimeter 2.00±0.05 40.00±0.20 1.75±0.10 5.50±0.05 12.00±0.30 0.30±0.05 Figure 17. Tape and Reel Format – 4 mm x 4mm. 11 Reel Drawing BACK VIEW FRONT VIEW Figure 18. Plastic Reel Format – 13"/4". 12 Handling and Storage ESD (Electrostatic Discharge) Electrostatic discharge occurs naturally in the environment. With the increase in voltage potential, the outlet of neutralization or discharge will be sought. If the acquired discharge route is through a semiconductor device, destructive damage will result. ESD countermeasure methods should be developed and used to control potential ESD damage during handling in a factory environment at each manufacturing site. package at various temperatures and relative humidity, and times. After soak, the components are subjected to three consecutive simulated reflows. The out of bag exposure time maximum limits are determined by the classification test describe above which corresponds to an MSL classification level 6 to 1 according to the JEDEC standard IPC/JEDEC J-STD-020A and J-STD-033. ACPM-7821 is MSL3. Thus, according to the J-STD033 p.11 the maximum Manufacturers Exposure Time (MET) for this part is 168 hours. After this time period, the part would need to be removed from the reel, de-taped and then re-bake. MSL classification ref low temperature for the ACPM-7821 is targeted at 250° C +0/-5° C. Figure 19 and Table 7 show typical SMT profile for maximum temperature of 250° C +0/-5° C. MSL (Moisture Sensitivity Level) Plastic encapsulated surface mount package is sensitive to damage induced by absorbed moisture and temperature. Avago follows JEDEC Standard J-STD 020A. Each component and package type is classified for moisture sensitivity by soaking a known dry Table 5. ESD Classification Pin# Rating All Pins ±1000V HBM Class Class 1C (JESD22-A115-A) MM Rating ± 200V CDM Class Class B Rating ± 200V Class Class II (JESD22-C101C) Note: 1. PA module products should be considered extremely ESD sensitive. Table 6. Moisture Classification Level and Floor Life MSL Level 1 2 2a 3 4 5 5a 6 Floor Life (out of bag) at factory ambient ≤ 30°C/60% RH or as stated Unlimited at ≤ 30oC/85% RH 1 year 4 weeks 168 hours 72 hours 48 hours 24 hours Mandatory bake before use. After bake, must be reflowed within the time limit specified on the label Note: 1. The MSL Level is marked on the MSL Label on each shipping bag. 13 Handling and Storage, continued Figure 19. Typical SMT Reflow Profile for Maximum Temperature = 250 +0/-5°C. Table 7. Typical SMT Reflow Profile for Maximum Temperature = 250+0/-5°C Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Tsmax to TL - Ramp-up Rate Time maintained above: - Temperature (TL) - Time (TL) Peak Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Time 25°C to Peak Temperature 183°C 60 – 150 sec 225 +0/-5°C 10 – 30 sec 6°C/sec max 6 min max. Sn-Pb Solder 3°C/sec max 100°C 150°C 60 – 120 sec Pb-Free Solder 3°C/sec max 100°C 150°C 60 – 180 sec 3°C/sec max 217°C 60 – 150 sec 250 +0/-5°C 10 – 30 sec 6°C/sec max 8 min max. 14 Handling and Storage, continued Storage Conditions Packages described in this document must be stored in sealed moisture barrier, anti-static bags. Shelf life in a sealed moisture barrier bag is 12 months at
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