ACPM-7886-TR1

ACPM-7886 TD-SCDMA Power Amplifier Data Sheet General Description The ACPM-7886 is an amplifier module designed for TD-SCDMA applications in the 2010-2025MHz band. Designed around Avago Technologies’ GaAs Enhancement Mode pHEMT process, the ACPM-7886 offers premium performance in a very small form factor. It is matched to 50 Ohms on the input and output. The amplifier has excellent ACLR and efficiency performance at max Pout and low quiescent current (50mA) with a single bias control voltage, Vctrl = 2.0V. Designed in a surface mount RF package, the ACPM7886 is very cost and size competitive. Functional Block Diagram Vdd1 (1) Vdd3 (10) Features • • • • • Operating frequency: 2010 - 2025 MHz 28 dBm Linear Output Power @ 3.5V High Efficiency 41% PAE Single bias, low quiescent current (50mA) Internal 50 ohm matching networks for both RF input & output • 3.2 - 4.2 V linear operation • 4.0 x 4.0mm SMT Package • Low package profile, 1.1mm Applications • TD-SCDMA Handsets • TD-SCDMA Data Cards • TD-SCDMA PDAs RF in (2) Output Match Bias Control MMIC Module Vctrl (4) Vdd2 (5) Gnd (3,6,7,9) RF out (8) Package Diagram Vdd3 (Pin 10) Vdd1 (Pin 1) RFin N/C (GND) Vctrl Vdd2 (Pin 5) AVAGO ACPM-7886 MLYWWDD XXXX 4mm sq 1.175mm max GND RFout GND GND (Pin 6) Bottom View Pin Description Table Pin Number 1 2 3 4 5 Pin Label Vdd1 RFin N/C Vctrl Vdd2 Description Supply bias RF input No internal connection Control voltage Supply bias Function 1st and 2nd stages drain bias, nominally 3.5V Signal input, internally grounded through inductor. External DC block needed if DC voltage present on input trace. Recommend ground connection on PCB Output level control, nominally 2V Bias circuit supply, > 2.5V; nominally 2.85V. Does not require a regulated input and can be connected directly to the battery, if desired. 6 7 8 9 10 Gnd Gnd RFout Gnd Vdd3 Ground Ground RF output Ground Supply bias 3rd stage drain bias, nominally 3.5V Signal output, requires external DC block 2 Package Dimensions 4.00 ± 0.075mm 0.10mm 2.00mm Marking Notes : Row 3: ML = Manufacturing Location Y = Year WW = Work Week DD = Date Code 0.60mm 0.40mm 3.80mm 4.00 ± 0.075mm 0.10mm 0.45mm 0.60mm 0.50mm 0.40mm 0.50mm Viewed down through top of package Row 4: XXXX = Trace Code (Avago Technologies internal reference) Maximum Ratings Table Parameter Supply voltage, Vdd1 and Vdd3 Supply voltage, Vdd2 Analog control voltage RF input power Operating case temperature Load VSWR Storage temperature (case temperature) Min. -1 V -1 V Max. 5.0 V 5.0 V 3.0 V +5 dBm +90 °C 12:1 -30 °C +100 °C Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage. 2. Avoid electrostatic discharge on I/O pins Recommended Operating Conditions Parameter Supply voltage, Vdd1 and Vdd3 Supply voltage, Vdd2 Control voltage Case temperature Min. 1.0 V 2.6 V 1.9 V -20 °C Typ. 3.5 V 2.85 V 2.0 V Max. 4.5 V 4.5 V 2.1 V +85 °C 3 Electrical Characteristics of TD-SCDMA PA Unless Otherwise Specified: f=2010-2025MHz, Vdd1=Vdd3=3.5V, Vdd2=2.85V, Vctrl=2.0V, Pout=28.0dBm, Ta=25°C, Zin/Zout = 50Ω Parameter Leakage Current, Idd1,2,3; Vctrl=0 V, RF Off Control Current, Ictrl; Vctrl=2.0 V Bias Current, Idd2; Vctrl=2 V, Vdd2=2.85 V Quiescent Current, Idd1,3; RF Off At Pout=28.0dBm Supply current Idd1+Idd3 PAE including Vdd1,2,3 Gain Input VSWR ACLR 1.6MHz offset 3.2MHz offset 2nd Harmonic 3rd Harmonic Noise Figure Stability, no spurious under conditions: VSWR=4:1, all phases 3