ACSL-6300-00TE

Data Sheet ACSL-6xx0 Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Description The Broadcom® ACSL-6xx0 are truly isolated, multi-channel and bi-directional, high-speed optocouplers. Integration of multiple optocouplers in monolithic form is achieved through patented process technology. These devices provide full duplex and bidirectional isolated data transfer and communication capability in compact surface mount packages. Available in the 15-Mbd speed option and wide supply voltage range. Features        These high channel density make them ideally suited to isolating data conversion devices, parallel buses and peripheral interfaces. They are available in 8-pin and 16–pin narrow-body SOIC package and are specified over the temperature range of –40°C to +100°C.   Available in dual, triple and quad channel configurations Bi-directional Wide supply voltage range: 3.0V to 5.5V High-speed: 15 MBd typical, 10 MBd minimum 10kV/µs minimum Common Mode Rejection (CMR) at Vcm = 1000V LSTTL/TTL compatible Safety and regulatory approvals – 2500 Vrms for 1 min. per UL1577 – cUL (CSA Component Acceptance Notice 5A) – IEC/EN/DIN EN 60747-5-5 16-pin narrow-body SOIC package for triple and quad channels –40°C to 100°C temperature range Applications         Serial Peripheral Interface (SPI) Inter-Integrated Interface (I2C) Full duplex communication Isolated line receiver Microprocessor system interfaces Digital isolation for A/D and D/A conversion Instrument input/output isolation Ground loop elimination CAUTION! Take normal static precautions in handling and assembly of this component to prevent damage, degradation, or both that may be induced by ESD. The components featured in this data sheet are not to be used in military or aerospace applications or environments. Broadcom AV02-0235EN August 21, 2018 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Device Selection Guide Device Number ACSL-6210 Channel Configuration Dual, Bi-Directional Package `8-pin Small Outline ACSL-6300 Triple, All-in-One 16-pin Small Outline ACSL-6310 Triple, Bi-Directional, 2/1 16-pin Small Outline ACSL-6400 Quad, All-in-One 16-pin Small Outline ACSL-6410 Quad, Bi-Directional, 3/1 16-pin Small Outline ACSL-6420 Quad, Bi-Directional, 2/2 16-pin Small Outline Ordering Information ACSL-6xx0 is UL Recognized with 2500 Vrms for 1 minute per UL1577 and is approved under CSA Component Acceptance Notice #5, File CA 88324. Part Number RoHS Complianta Package Surface Mount -00RE SO-8 X -06RE SO-8 X -50RE SO-8 X X -56RE SO-8 X X ACSL-6210 ACSL-6300 ACSL-6310 ACSL-6400 ACSL-6410 ACSL-6420 Tape and Reel IEC/EN/DIN EN 60747-5-5 Quantity 100 per tube X -00TE SO-16 X -06TE SO-16 X -50TE SO-16 X X -56TE SO-16 X X 100 per tube 1500 per reel X 1500 per reel X 50 per tube 50 per tube 1000 per reel X 1000 per reel a. The ACSL-6xx0 product family is only offered in RoHS compliant option. To order, choose a part number from the Part Number column and combine it with the desired option from the RoHS Compliant column to form an order entry. Example 1: ACSL-6210-56RE refers to ordering a surface mount SO-8 package in tape and reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: ACSL-6400-00TE refers to ordering a surface mount SO-16 package product in tube packaging and in RoHS compliant. Pin Description Symbol Description Truth Table Symbol Description LED Output VDD1 Power Supply 1 GND1 Power Supply Ground 1 ON L VDD2 Power Supply 2 GND2 Power Supply Ground 2 OFF H ANODEx LED Anode NC Not Connected VOX Output Signal CATHODEx LED Cathode Broadcom AV02-0235EN 2 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Functional Diagrams Figure 1: ACSL-6210 – Dual-Ch, Bi-Dir GND1 CATHODE2 1 Figure 2: ACSL-6300 – Triple-Ch, All-in-One 8 ANODE1 V01 2 7 VDD2 VDD1 3 6 V02 5 GND2 CATHODE1 ANODE2 4 ANODE1 1 16 CATHODE1 VDD ANODE2 V01 CATHODE2 V02 ANODE3 V03 CATHODE3 NC NC ACSL-6210 GND NC VDD 8 9 GND ACSL-6300 Figure 3: ACSL-6310 – Triple-Ch, Bi-Dir (2/1) 1 16 Figure 4: ACSL-6400 – Quad-Ch, All-in-One 1 16 NC ANODE1 NC NC CATHODE1 VDD V03 ANODE3 ANODE2 V01 CATHODE2 V02 ANODE3 V03 V01 CATHODE3 V04 V02 ANODE4 GND1 VDD1 CATHODE3 ANODE1 VDD2 CATHODE1 ANODE2 CATHODE2 8 9 GND2 CATHODE4 GND VDD 8 9 GND ACSL-6310 ACSL-6400 Figure 5: ACSL-6410 – Quad-Ch, Bi-Dir (3/1) Figure 6: ACSL-6420 – Quad-Ch, Bi-Dir (2/2) GND1 CATHODE1 1 16 V04 VDD1 CATHODE4 GND1 1 16 ANODE4 ANODE4 V04 CATHODE4 GND2 V03 ANODE3 CATHODE3 ANODE1 V01 VDD1 CATHODE2 V02 ANODE1 ANODE2 V03 CATHODE1 V01 VDD2 ANODE2 V02 GND2 CATHODE2 CATHODE3 ANODE3 8 9 ACSL-6410 VDD2 8 9 GND2 ACSL-6420 A 0.1-µF bypass capacitor must be connected as close as possible between the power supply pins, VDD and GND, VDD1 and GND1, VDD2 and GND2. Broadcom AV02-0235EN 3 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Schematic Diagrams The ACSL-6xx0 series optocouplers feature the GaAsP LEDs with proprietary back emission design. They offer the designer a broad range of input drive current, from 7 mA to 15 mA, thus providing greater flexibility in designing the drive circuit. secondary amplifier stage of the detector IC feeds into an open collector Schottky-clamped transistor. The output detector integrated circuit (IC) in the optocoupler consists of a photodiode at the input of a two-stage amplifier that provides both high gain and high bandwidth. The The entire output circuit is electrically shielded so that any common-mode transient capacitively coupled from the LED side of the optocoupler is diverted from the photodiode to ground. With this electric shield, the optocoupler can withstand transients that slopes up to 10,000V/µs, and amplitudes up to 1000V. Figure 7: ACSL-6210 – Dual-Ch, Bi-Dir Figure 8: ACSL-6300 – Triple-Ch, All-in-One GND1 CATHODE2 16 Shield 1 15 8 ANODE1 Vo1 VDD1 ANODE1 2 CATHODE1 3 7 14 GND VDD Vo1 2 Shield VDD2 6 Vo2 ANODE2 ANODE2 1 3 13 Vo2 4 5 GND2 CATHODE1 Shield CATHODE2 4 Shield ANODE3 CATHODE3 5 12 6 10 9 Vo3 VDD GND Shield Figure 9: ACSL-6310 – Triple-Ch, Bi-Dir (2/1) GND1 Shield 1 14 ANODE3 Vo3 VDD1 3 13 CATHODE3 4 12 ANODE1 CATHODE1 5 11 VDD2 Vo1 6 Shield ANODE2 CATHODE2 7 10 Vo2 8 9 GND2 Shield Broadcom AV02-0235EN 4 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Schematic Diagrams, continued Figure 10: ACSL-6400 - Quad-Ch, All-in-One 16 15 ANODE1 CATHODE1 1 14 Figure 11: ACSL-6410 - Quad-Ch, Bi-Dir (3/1) GND GND1 CATHODE1 Shield 1 16 VDD Vo4 2 VDD1 2 15 3 14 Shield ANODE2 3 13 13 ANODE4 GND2 Vo1 Vo2 ANODE1 CATHODE2 CATHODE4 Vo1 4 4 Shield Shield CATHODE2 ANODE3 5 12 12 Vo2 Vo3 ANODE2 CATHODE3 5 6 6 Shield Shield ANODE4 CATHODE3 7 11 8 10 9 11 Vo3 Vo4 ANODE3 CATHODE4 7 8 10 9 VDD GND VDD2 GND2 Shield Shield Broadcom AV02-0235EN 5 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Schematic Diagrams, continued Figure 12: ACSL-6420 - Quad-Ch, Bi-Dir (2/2) GND1 Shield 1 16 Vo4 2 15 ANODE4 CATHODE4 Shield 14 Vo3 VDD1 3 13 4 12 ANODE1 CATHODE1 5 11 ANODE3 CATHODE3 VDD2 Vo1 6 Shield ANODE2 CATHODE2 7 10 Vo2 8 9 GND2 Shield Broadcom AV02-0235EN 6 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Package Outline Drawings Figure 13: ACSL-6210 Small Outline SO-8 Package 0.189 (4.80) 0.197 (5.00) 8 AVAGO 7 6 LAND PATTERN RECOMMENDATION 5 A NNNN • YYWW EEE 0.228 (5.80) 0.244 (6.20) LEAD FREE 1 2 3 DEVICE PART NUMBER 0.150 (3.80) 0.157 (4.00) 0.286 (7.27) DATE CODE 4 0.085 (2.16) LOT ID 0.025 (0.64 ) 0.013 (0.33) 0.020 (0.51) 0.010 (0.25) 0.020 (0.50) x 45q 0.008 (0.19) 0.010 (0.25) 0.004 (0.10) 0.010 (0.25) 0.054 (1.37) 0.069 (1.75) 0.040 (1.016) 0.060 (1.524) 0q 8q 0.016 (0.40) 0.050 (1.27) DIMENSIONS: INCHES (MILLIMETERS) MIN MAX Broadcom AV02-0235EN 7 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Package Outline Drawings, continued Figure 14: ACSL-6300, ACSL-6310, ACSL-6400, ACSL-6410 and ACSL-6420 Small Outline SO-16 Package 0.386 (9.802) 0.394 (9.999) 0.228 (5.791) 0.244 (6.197) AVAGO LEAD FREE A NNNN • YYWW EEE LAND PATTERN RECOMMENDATION DEVICE PART NUMBER DATE CODE LOT ID 1 0.286 (7.27) 0.152 (3.861) 0.157 (3.988) 0.085 (2.16) 8 0.013 (0.330) 0.020 (0.508) 0.054 (1.372) 0.068 (1.727) 0.050 (1.270) 0.060 (1.524) 0.025 (0.64 ) 0.010 (0.245) x 45q 0.020 (0.508) 0.008 (0.191) 0.010 (0.249) 0 - 8q TYP. 0.040 (1.016) 0.060 (1.524) 0.016 (0.406) 0.050 (1.270) 0.004 (0.102) 0.010 (0.249) DIMENSIONS: INCHES (MILLIMETERS) MIN MAX Reflow Soldering Profile The recommended reflow soldering conditions are per JEDEC Standard J-STD-020 (latest revision). Use non-halide flux. Regulatory Information Table 1: Insulation and Safety Related Specifications Parameter Symbol Value Units Minimum External Air Gap (Clearance) L(I01) 4.9 mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 4.5 mm Measured from input terminals to output terminals, shortest distance path through body 0.08 mm Insulation thickness between emitter and detector; also known as distance through insulation 175 Volts DIN IEC 112/VDE0303 Part 1 Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group Broadcom CTI IIIa Conditions Material Group (DIN VDE 0110, 1/89, Table 1) AV02-0235EN 8 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Table 2: IEC/EN/DIN EN 60747-5-5 Insulation Characteristicsa (Option x6xx) Description Symbol Characteristic Units Installation classification per DIN VDE 0110, Table 1 for rated mains voltage ≤ 150 Vrms I – IV for rated mains voltage ≤ 300 Vrms I – III Climatic Classification 40/100/21 Pollution Degree (DIN VDE 0110/39) Maximum Working Insulation Voltage 2 VIORM 567 Vpeak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1 sec,ond Partial discharge < 5 pC VPR 1063 Vpeak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and Sample Test, tm = 10 seconds, Partial discharge < 5 pC VPR 907 Vpeak VIOTM 4000 Vpeak TS 175 °C Input Currentb IS, INPUT 150 mA Output Powerb PS, OUTPUT 600 mW RS >109 Ω Highest Allowable Overvoltage (Transient Overvoltage tini = 60 seconds) Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Insulation Resistance at TS, VIO = 500 V a. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section (IEC/ EN/DIN EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. b. See Figure 15 for dependence of PS and IS on ambient temperature. Figure 15: PS and IS on Ambient Temperature 700 Is (mA) Ps (mW) Output Power-Ps Input Power-lp 600 500 400 300 200 100 0 NOTE: Broadcom 0 25 50 75 100 125 150 175 200 Ts-Case Temperature,°C This optocoupler is suitable for safe electrical isolation only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. AV02-0235EN 9 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature Ts –55 125 °C Operating Temperature TA –40 100 °C Supply Voltage (1 Minute Maximum) VDD1, VDD2 — 7 V Reverse Input Voltage (Per Channel) VR — 5 V Output Voltage (Per Channel) VO — 7 V Average Forward Input Currenta (Per Channel) IF — 15 mA Output Current (Per Channel) IO — 50 mA Input Power Dissipationb (Per Channel) PI — 27 mW Output Power Dissipationb (Per Channel) PO — 65 mW a. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed its maximum values. b. Derate total package power dissipation, PT linearly above +95°C free-air temperature at a rate of 1.57 mW/°C for the SO8 package mounted on low conductivity board per JESD 51-3. Derate total package power dissipation, PT linearly above +80°C free-air temperature at a rate of 1.59 mW/°C for the SO16 package mounted on low conductivity board per JESD 51-3. PT = number of channels multiplied by (PI + PO). Recommended Operating Conditions Parameter Operating Temperature Symbol Min. Max. Units TA –40 100 °C a IFL 0 250 µA Input Current, High Levelb IFH 7 15 mA VDD1, VDD2 3.0 5.5 V Fan Out (at RL = 1 kΩ) N — 5 TTL Loads Output Pull-up Resistor RL 330 4k Ω Input Current, Low Level Supply Voltage a. The off condition can be guaranteed by ensuring that VFL ≤ 0.8V. b. The initial switching threshold is 7 mA or less. It is recommended that minimum 8 mA be used for best performance and to permit guardband for LED degradation. Figure 16: PI vs. Ambient Temperature PT - Total Power Dissipation per channel - mW 100 90 80 70 60 50 40 30 20 10 0 Broadcom so-16 package so-8 package 0 20 40 60 80 100 TA - Ambient Temperature - qC 120 AV02-0235EN 10 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Electrical Specifications Over recommended operating range (3.0V ≤ VDD1 ≤ 3.6V, 3.0V ≤ VDD2 ≤ 3.6V, TA =–40°C to +100°C) unless otherwise specified. All typical specifications are at TA = +25°C, VDD1 = VDD2 = +3.3V. Parameter Symbol Min. Typ. Max. Units Input Threshold Current ITH — 2.7 7.0 mA IOL(Sinking) = 13 mA, VO = 0.6V High Level Output Current IOH — 4.7 100.0 µA IF = 250 µA, VO = 3.3V Low Level Output Voltage VOL — 0.36 0.68 V IOL(Sinking) = 13 mA, IF = 7mA High Level Supply Current (per channel) IDDH — 3.2 5.0 mA IF = 0 mA Low Level Supply Current (per channel) IDDL — 4.6 7.5 mA IF = 10 mA VF 1.25 1.52 1.80 V IF = 10 mA, TA = 25°C Input Reverse Breakdown Voltage BVR 5.0 — — V IR = 10 µA Input Diode Temperature Coefficient VF/TA — –1.8 — mV/°C IF = 10 mA CIN — 80 — pF Input Forward Voltage Input Capacitance Test Conditions f = 1 MHz, VF = 0V Switching Specifications Over recommended operating range (3.0V ≤ VDD1 ≤ 3.6V, 3.0V ≤ VDD2 ≤ 3.6V, IF = 8.0mA, TA = –40°C to +100°C) unless otherwise specified. All typical specifications are at TA = +25°C, VDD1 = VDD2 = +3.3V. Parameter Symbol Maximum Data Rate Min. Typ. Max. Units Test Conditions 10 15 — MBd RL = 350Ω, CL = 15 pF ns RL = 350Ω, CL = 15 pF Pulse Width tPW 100 — Propagation Delay Time to Logic High Output Levela tPLH — 52 100 ns RL = 350Ω, CL = 15 pF Propagation Delay Time to Logic Low Output Levelb tPHL — 44 100 ns RL = 350Ω, CL = 15 pF |PWD| — 8 35 ns RL = 350Ω, CL = 15 pF tPSK — — 40 ns RL = 350Ω, CL = 15 pF Output Rise Time (10–90%) tR — 35 — ns RL = 350Ω, CL = 15 pF Output Fall Time (10–90%) tF — 12 — ns RL = 350Ω, CL = 15 pF Logic High Common Mode Transient Immunityd |CMH| 10 — — kV/µs Vcm = 1000V, IF = 0 mA, VO = 2.0V, RL = 350Ω, TA = 25°C Logic Low Common Mode Transient Immunityd |CML| 10 — — kV/µs Vcm = 1000V, IF = 8 mA, VO = 0.8V, RL = 350Ω, TA = 25°C Pulse Width Distortion |tPHL – tPLH| Propagation Delay Skew c a. tPLH is measured from the 4.0 mA level on the falling edge of the input pulse to the 1.5V level on the rising edge of the output pulse. b. tPHL is measured from the 4.0 mA level on the rising edge of the input pulse to the 1.5V level on the falling edge of the output pulse. c. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions. d. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 2.0V. CML is the maximum common mode voltage slew rate that can be sustained while maintaining VO < 0.8V. The common mode voltage slew rates apply to both rising and falling common mode voltage edges Broadcom AV02-0235EN 11 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Electrical Specifications Over recommended operating range (4.5V ≤ VDD1 ≤ 5.5V, 4.5V ≤ VDD2 ≤ 5.5V, TA = –40°C to +100°C) unless otherwise specified. All typical specifications are at TA = +25°C, VDD1 = VDD2 = +5.0V. Parameter Symbol Min. Typ. Max. Units Input Threshold Current ITH — 2.7 7.0 mA IOL(Sinking) = 13 mA, VO = 0.6V High Level Output Current IOH — 3.8 100.0 µA IF = 250 µA, VO= 5.5V Low Level Output Voltage VOL — 0.36 0.6 V IOL(Sinking) = 13 mA, IF = 7 mA High Level Supply Current (per channel) IDDH — 4.3 7.5 mA IF = 0 mA Low Level Supply Current (per channel) IDDL — 5.8 10.5 mA IF = 10 mA VF 1.25 1.52 1.8 V IF = 10 mA, TA = 25°C Input Reverse Breakdown Voltage BVR 5.0 — — V IR = 10 µA Input Diode Temperature Coefficient VF/TA — –1.8 — mV/°C IF = 10 mA CIN — 80 — pF Input Forward Voltage Input Capacitance Test Conditions f = 1 MHz, VF = 0V Switching Specifications Over recommended operating range (4.5V ≤ VDD1 ≤ 5.5V, 4.5V ≤ VDD2 ≤ 5.5V, IF = 8.0 mA, TA = –40°C to +100°C) unless otherwise specified. All typical specifications are at TA = +25°C, VDD1 = VDD2 = +5.0V. Parameter Symbol Maximum Data Rate Min. Typ. Max. Units Test Conditions 10 15 — MBd RL = 350Ω, CL =15 pF Pulse Width tPW 100 — — ns RL = 350Ω, CL =15 pF Propagation Delay Time to Logic High Output Levela tPLH — 46 100 ns RL = 350Ω, CL =15 pF Propagation Delay Time to Logic Low Output Levelb tPHL — 43 100 ns RL = 350Ω, CL =15 pF |PWD| — 5 35 ns RL = 350Ω, CL =15 pF tPSK — — 40 ns RL = 350Ω, CL =15 pF Output Rise Time (10–90%) tR — 30 — ns RL = 350Ω, CL =15 pF Output Fall Time (10–90%) tF — 12 — ns RL = 350Ω, CL =15 pF Logic High Common Mode Transient Immunityd |CMH| 10 — — kV/µs Vcm = 1000V, IF = 0 mA, VO = 2.0V, RL = 350Ω, TA = 25°C Logic Low Common Mode Transient Immunityd |CML| 10 — — kV/µs Vcm = 1000V, IF = 8 mA, VO = 0.8V, RL = 350Ω, TA = 25°C Pulse Width Distortion |tPHL – tPLH| Propagation Delay Skew c a. tPLH is measured from the 4.0 mA level on the falling edge of the input pulse to the 1.5V level on the rising edge of the output pulse. b. tPHL is measured from the 4.0 mA level on the rising edge of the input pulse to the 1.5V level on the falling edge of the output pulse. c. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions. d. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 2.0V. CML is the maximum common mode voltage slew rate that can be sustained while maintaining VO < 0.8V. The common mode voltage slew rates apply to both rising and falling common mode voltage edges. Broadcom AV02-0235EN 12 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Package Characteristics All specifications are at TA = +25°C. Parameter Symbol Min. Typ. Max. VISO 2500 — — VRMS RH 50%, t = 1 min. VISO 2500 — — RH 50%, t = 1 min. SO8 RI-O 109 1011 — SO16 RI-O 109 1011 — SO8 CI-O — 0.7 — SO16 CI-O — 0.7 — SO8 II-I — 0.005 — SO16 II-I — 0.005 — SO8 RI-I — SO16 RI-I — SO8 CI-I SO16 CI-I Input-Output Momentary Withstand SO8 Voltagea SO16 Input-Output Resistanceb Input-Output Capacitanceb Input-Input Insulation Leakage Currentc c Input-Input Resistance Input-Input Capacitance[c 11 — 11 10 — — 0.1 — — 0.12 — 10 Units Ω Test Conditions VI-O = 500V DC VI-O = 500V DC pF f = 1 MHz f = 1 MHz µA RH 45%, t = 5s, VI-I = 500V RH 45%, t = 5s, VI-I = 500V Ω RH 45%, t = 5s, VI-I = 500V RH 45%, t = 5s, VI-I = 500V pF f = 1 MHz f = 1 MHz a. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to your equipment level safety specification or Broadcom Application Note 1074, Optocoupler Input-Output Endurance Voltage. b. Measured between each input pair shorted together and all output connections for that channel shorted together. c. Measured between inputs with the LED anode and cathode shorted together. Broadcom AV02-0235EN 13 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Typical Performance Figure 17: Typical Input Threshold Current vs. Temperature for 3.3V Operation Figure 18: Typical Input threshold Current vs. Temperature for 5V Operation 70 5 4 RL = 350 : 3 RL = 1 K: 2 RL = 4 K: 1 VDD = 5.0V VO = 0.6V 5 4 RL = 350 : 3 RL = 1 K: 2 RL = 4 K: 1 0 -40 -20 0 20 40 60 80 100 120 -60 -40 -20 0 Figure 20: Typical Low Level Output Current vs. Temperature for 5V Operation 40 60 80 100 IF = 7.0 mA 40 30 20 0 20 40 60 80 100 120 10 5 0 -60 0.6 0.5 0.4 IO = 13 mA 0.2 0.1 -60 -40 -20 0 20 40 60 TA - TEMPERATURE -C Broadcom 80 100 120 40 60 80 100 120 Figure 22: Typical High Level Output Current vs. Temperature for 5V Operation VDD = 5.0V VO = 5.0V IF = 250 μA 10 -20 0 20 40 60 80 5 -60 100 120 -40 -20 0 20 40 60 80 100 120 TA - TEMPERATURE - C Figure 25: Typical Supply Current per Channel vs. Temperature for 3.3V Operation 10 0.8 VDD = 5.0V IF = 7 mA 0.7 0.6 0.5 0.4 0.3 IO = 13 mA 0.2 0.1 0.0 -60 20 0 -40 Figure 24: Typical Low Level Output Voltage vs. Temperature for 5V Operation VOL - LOW LEVEL OUTPUT VOLTAGE - V VDD = 3.3V IF = 7 mA 0 TA - TEMPERATURE - C VDD = 3.3V VO = 3.3V IF = 250 μA 0.8 0.0 -20 TA - TEMPERATURE - C Figure 23: Typical Low Level Output Voltage vs. Temperature for 3.3V Operation 0.3 -40 15 TA - TEMPERATURE - C 0.7 30 -40 -20 0 20 40 60 80 TA - TEMPERATURE -C 100 120 IDD- SUPPLY CURRENT PER CHANNEL - mA -20 IF = 7.0 mA 40 -60 IOH- HIGH LEVEL OUTPUT CURRENT - μA IF = 10 mA 50 -40 50 120 15 VDD = 5.0V VOL = 0.6V IOH- HIGH LEVEL OUTPUT CURRENT - μA IOL- LOW LEVEL OUTPUT CURRENT - mA 20 Figure 21: Typical High Level Output Current vs. Temperature for 3.3V Operation 70 -60 60 TA - TEMPERATURE - C TA - TEMPERATURE - C 60 V DD = 3.3V V OL = 0.6V 20 0 -60 VOL- LOW LEVEL OUTPUT VOLTAGE - V IOL - LOW LEVEL OUTPUT CURRENT - mA 6 VDD = 3.3V VO = 0.6V ITH - INPUT THRESHOLD CURRENT - mA ITH - INPUT THRESHOLD CURRENT - mA 6 Figure 19: Typical Low Level Output Current vs. Temperature for 3.3V Operation VDD = 3.3V 9 8 7 6 IDDL IF = 10 mA 5 4 3 IDDH IF = 0 mA 2 1 0 -60 -40 -20 0 20 40 60 80 TA - TEMPERATURE -C 100 120 AV02-0235EN 14 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Typical Performance, continued Figure 26: Typical Supply Current per Channel vs. Temperature for 5V Operation Figure 27: Typical Input Diode Forward Characteristics 10 8 IDDL IF = 10 mA 6 5 4 IDDH IF = 0 mA 3 2 10 I 1 V tP - PROPAGATION DELAY - ns 7 150 TA = 25C 100 IF - FORWARD CURRENT - mA IDD - SUPPLY CURRENT PER CHANNEL - mA 1000 VDD = 5.0V 9 F + F – 0.1 0.01 1 0 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - C 80 100 120 Figure 28: Typical Propagation Delay vs. Temperature for 3.3V Operation 0.001 1.1 1.2 1.3 1.4 1.5 VDD = 3.3V IF = 8.0 mA 120 90 tPLH, RL = 350: 60 30 tPHL, RL = 350: 0 -60 -40 -20 1.6 VF - FORWARD VOLTAGE - V Figure 29: Typical Propagation Delay vs. Temperature for 5V Operation Figure 30: Typical Pulse Width Distortion vs. Temperature for 3.3V Operation 0 20 40 60 TA - TEMPERATURE - C 80 100 120 Figure 31: Typical Pulse Width Distortion vs. Temperature for 5V Operation VDD = 5.0V IF = 8.0 mA 90 tPLH, RL = 350: 60 30 tPHL, RL = 350: 0 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - C 80 100 120 40 40 VDD = 3.3V IF = 8.0 mA 30 20 10 RL = 350: 0 -60 -40 -20 0 20 40 60 TA - TEMPERATURE - C Broadcom 80 100 120 PWD - PULSE WIDTH DISTORTION - ns 120 PWD - PULSE WIDTH DISTORTION - ns tP - PROPAGATION DELAY - ns 150 VDD = 5.0V IF = 8.0 mA 30 20 10 0 RL = 350: -60 -40 -20 0 20 40 60 80 100 120 TA - TEMPERATURE - C AV02-0235EN 15 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Test Circuits Figure 32: Test Circuit for tPHL. tPLH, tF, and tR ACSL-6210 INPUT MONITORING NODE 3.3V or 5V 1 8 2 7 3 6 4 5 0.1F BYPASS RL OUTPUT Vo MONITORING NODE CL* PULSE GEN. Zo = 50 tf = tr = 5ns IF *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE IF = 8.0 mA INPUT IF IF = 4.0 mA tPLH tPHL 90% 90% OUTPUT Vo 1.5V 10% 10% tF tR Figure 33: Test Circuit for Common Mode Transient Immunity and Typical Waveforms ACSL-6400 IF 3.3V or 5V B 1 16 A RL OUTPUT Vo MONITORING NODE 0.1F BYPASS VFF 8 9 + _ PULSE GEN. Zo = 50 Vcm (peak) Vcm 0V 5V SWITCH AT POSITION "A": F = 0I mA CMH Vo Vo (min.) F = 8I mA SWITCH AT POSITION "B": Vo (max.) Vo 0.5 V Broadcom CML AV02-0235EN 16 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Application Information ON and OFF Conditions The ACSL-6xx0 series has the ON condition defined by current, and the OFF condition defined by voltage. To guarantee that the optocoupler is OFF, the forward voltage across the LED must be less than or equal to 0.8V for the entire operating temperature range. This has direct implications for the input drive circuit. If the design uses a TTL gate to drive the input LED, then one has to ensure that the gate output voltage is sufficient to cause the forward voltage to be less than 0.8V. The typical threshold current for the ACSL6xx0 series optocouplers is 2.7 mA; however, this threshold could increase over time due to the aging effects of the LED. Drive circuit arrangements must provide for the ON state LED forward current of at least 7 mA, or more if faster operation is desired. Maximum Input Current and Reverse Voltage The average forward input current should not exceed the 15-mA Absolute Maximum Rating as stated; however, peaking circuits with transient input currents up to 50 mA are allowed provided the average current does not exceed 15 mA. If the input current maximum rating is exceeded, the local temperature of the LED can rise, which in turn may affect the long-term reliability of the device. When designing the input circuit, one must also ensure that the input reverse voltage does not exceed 5V. If the optocoupler is subjected to reverse voltage transients or accidental situations that may cause a reverse voltage to be applied, thus an anti-parallel diode across the LED is recommended. Suggested Input Circuits for Driving the LED Figure 34, Figure 35, and Figure 36 show some of the several techniques for driving the ACSL-6xx0 LED. Figure 34 shows the recommended circuit when using any type of TTL gate. The buffer PNP transistor allows the circuit to be used with TTL or CMOS gates that have low sinking current capability. One advantage of this circuit is that there is very little variation in power supply current due to the switching of the optocoupler LED. This can be important in high-resolution analog-to-digital (A/D) systems where ground loop currents due to the switching of the LEDs can cause distortion in the A/D output. Figure 34: TTL Interface Circuit for the ACSL-6xx0 Broadcom AV02-0235EN 17 ACSL-6xx0 Data Sheet With a CMOS gate to drive the optocoupler, the circuit shown in Figure 35 can be used. The diode in parallel to the current limiting resistor speeds the turn-off of the optocoupler LED. Any HC or HCT series CMOS gate can be used in this circuit. For high common-mode rejection applications, the drive circuit shown in Figure 36 is recommended. In this circuit, only an open-collector TTL, or an open drain CMOS gate can be used. This circuit drives the optocoupler LED with a 220Ω current-limiting resistor to ensure that an IF of 7 mA is applied under worst case conditions and thus guarantee the 10,000 V/µs optocoupler common mode rejection rating. The designer can obtain even higher common-mode rejection performance than 10,000 V/µs by driving the LED harder than 7mA. Phase Relationship to Input The output of the optocoupler is inverted when compared to the input. The input is defined to be logic HIGH when the LED is ON. If there is a design that requires the optocoupler to behave as a non-inverting gate, then the series input Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler drive circuit shown in Figure 35 can be used. This input drive circuit has an inverting function, and because the optocoupler also behaves as an inverter, the total circuit is non-inverting. The shunt drive circuits shown in Figure 34 and Figure 36 will cause the optocoupler to function as an inverter. Current and Voltage Limitations The absolute maximum voltage allowable at the output supply voltage pin and the output voltage pin of the optocoupler is 7V. However, the recommended maximum voltage at these two pins is 5.5V. The output sinking current should not exceed 13 mA to make the Low Level Output Voltage be less than 0.6V. If the output voltage is not a consideration, the absolute maximum current allowed through the ACSL-6xx0 is 50 mA. If the output requires switching either higher currents or voltages, output buffer stages as shown in Figure 37 and Figure 38 are suggested. Figure 37: High Voltage Switching with ACSL-6xx0 Figure 35: CMOS Drive Circuit for the ACSL-6xx0 Figure 36: High CMR Drive Circuit for the ACSL-6xx0 Broadcom AV02-0235EN 18 ACSL-6xx0 Data Sheet Multi-Channel and Bi-Directional, 15 MBd Digital Logic Gate Optocoupler Figure 38: High Voltage and High Current Switching with ACSL-6xx0 Broadcom AV02-0235EN 19 Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago, and the A logo are among the trademarks of Broadcom and/or its affiliates in the United States, certain other countries, and/or the EU. Copyright © 2015–2018 Broadcom. All Rights Reserved. The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.