ADJD-J823

ADJD-J823 Color Management Controller with Integrated RGB Photosensor Data Sheet Description The ADJD-J823 is a CMOS mixed-signal IC with integrated RGB photosensors designed to be the optical feedback device of an RGB LED-based backlighting system. A typical system consists of an array of red, green and blue (RGB) LEDs, LED drivers and the ADJD-J823. The device samples the light output from the RGB LED array, processes the color information and adjusts the light output from the RGB LEDs until the target color is achieved. To achieve this, the device integrates an RGB photosensor array, an analog-to-digital converter front-end, a color data processing logic core and a high-resolution 12-bit PWM output generator. By employing a feedback system and the ADJD-J823, the light output produced by the LED array maintains its color over time and temperature. In addition, using a serial interface, specifying the color of the LED array’s light output is as simple as picking the target color coordinates from the CIE color space and writing several bytes of data to the device. The sensitivity of the device to light can be adjusted through an automated process. The PWM output signals control the on-time duration of the red, green and blue LEDs. That duration is continually adjusted in real-time to match the light output from the RGB LED array to the target color. Features • Integrated RGB photosensor • Integrated color management feedback controller • Serial Interface • Direct interface to standard I2C EEPROM • 3-channel 12-bit PWM output – Red, Green and Blue LED channels • Built-in oscillator Applications • LCD Backlighting ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge. AVAGO TECHNOLOGIES’ PRODUCTS AND SOFTWARE ARE NOT SPECIFICALLY DESIGNED, MANUFACTURED OR AUTHORIZED FOR SALE AS PARTS, COMPONENTS OR ASSEMBLIES FOR THE PLANNING, CONSTRUCTION, MAINTENANCE OR DIRECT OPERATION OF A NUCLEAR FACILITY OR FOR USE IN MEDICAL DEVICES OR APPLICATIONS. CUSTOMER IS SOLELY RESPONSIBLE, AND WAIVES ALL RIGHTS TO MAKE CLAIMS AGAINST AVAGO TECHNOLOGIES OR ITS SUPPLIERS, FOR ALL LOSS, DAMAGE, EXPENSE OR LIABILITY IN CONNECTION WITH SUCH USE. Package Dimensions A Seating Plane 0.75 ± 0.1 0.2 ref 0.65 ref 0.3 1.05 5.0 ± 0.1 3.2 ref 3.2 ref 0.5 ref 5.0 ± 0.1 Note: Dimensions are in millimeter (mm) Bottom View Pin 15 Pin 14 Pin 13 Pin 12 Pin 11 Pin 1 marker notch Pin 1 2 Pin Information PIN 1 2 3 4 5 6 7 8 9 10 NAME NC PWMB PWMG PWMR DGND DGND DVDD AGND CLKIO XRST TYPE No connect Output Output Output Ground Ground Power Ground Output Input DESCRIPTION No connect. Leave floating. PWMB is the active-high blue pulse width modulation output pin. Tie it to the blue LED driver channel. PWMG is the active-high green pulse width modulation output pin. Tie it to the green LED driver channel. PWMR is the active-high red pulse width modulation output pin. Tie it to the red LED driver channel. Tie to digital ground. Tie to digital ground. Digital power pin. Tie to analog ground. CLKIO outputs a reference internal clock signal. Global, asynchronous, active low system reset. When asserted low, XRST resets all registers. Minimum reset pulse low is 10us and must be provided by external circuitry. SDASLV and SCLSLV are the serial interface communications pins. SDASLV is the bidirectional data pin and SCLSLV is the interface clock. A pull-up resistor should be tied to SDASLV because it goes tri-state to output logic 1. An external serial I2C EEPROM can be connected to the device to store calibration and configuration data. SDAPROM and SCLPROM should be tied to the I2C data (SDA) and clock (SCL) pins of the EEPROM. A pull-up resistor should be tied to SDAPROM because it goes tri-state to output logic 1. When SLEEP=1, the device goes into sleep mode. In sleep mode, all analog circuits are powered down and the clock signal is gated away from the core logic resulting in very low current consumption. Tie to analog ground. Tie to analog ground. Tie to analog ground. Analog power pin. No connect. Leave floating. 11 12 13 14 SCLSLV SDASLV SCLPROM SDAPROM Input Input/Output (tri-state high) Output Input/Output (tri-state high) Input 15 SLEEP 16 17 18 19 20 AGND AGND AGND AVDD NC Ground Ground Ground Power No connect 3 Powering the Device No voltage must be applied to IO's during power-up and power-down ramp time VDDD / VDDA 0V tVDD_RAMP ESD Protection Diode Turn-On During Power-Up and Power-Down A particular power-up and power-down sequence must be used to prevent any ESD diode from turning on inadvertently. The figure above describes the sequence. In general, AVDD and DVDD should power-up and powerdown together to prevent ESD diodes from turning on inadvertently. During this period, no voltage should be applied to the IO’s for the same reason. Ground Connection AGND and DGND must both be set to 0V and preferably star-connected to a central power source as shown in the application diagram. A potential difference between AGND and DGND may cause the ESD diodes to turn on inadvertently. Block Diagram SDASLV SCLSLV RGB PHOTOSENSOR ARRAY SDAPROM SCLPROM PWMR PWMG PWMB DEVICE CONTROLLER PHOTOCURRENT TO VOLTAGE CONVERSION RED PHOTOCURRENT TO VOLTAGE CONVERSION GREEN PHOTOCURRENT TO VOLTAGE CONVERSION BLUE XRST SLEEP ANALOG TO DIGITAL CONVERSION General Specifications Feature Interface Input color format Output PWM frequency Output PWM resolution Supply Value 100kHz serial interface CIE Yxy 6.35kHz (nominal) 12 bits 2.6V digital (nominal), 2.6V analog (nominal) 4 High Level Description A hardware reset (by asserting XRST) should be performed before starting any operation. It is assumed that factory calibration was performed prior deployment of ADJD-J823. Calibration is discussed at the end of this section. The user controls and configures the device by programming a set of internal registers through a serial interface. At the start of application, the following register data must be written to it: • Frequency registers • Setup data • Calibration data • Bright and color input registers. The register data is usually gathered during a calibration process which is performed once in manufacturing. Factory calibration is needed at a system level to map the integrated tri-color sensor’s reading (device dependent) with a standard device independent color space. Once the register data is entered, the feedback operation begins; the device starts to sample the RGB sensor using the internal ADC. That data is compared to a user-controlled color point target. The PWM duty factor for each channel is adjusted in response to any error signal generated by that comparison operation. Thus, the actual color produced by the LEDs is maintained close to the target. There are three methods to operate the device. They are differentiated by the technique in which the register data is stored and used. The three figures below describe the methods. NVPROM stands for Non-Volatile Programmable Read-Only Memory such as an EEPROM. Independent NVPROM The NVPROM is independent from the device. During factory calibration, the host must read the register data from the device and write it to the NVPROM. At the start of application, the host must read the register data from the NVPROM and write it back to the device, after which the device will wait for further instructions in normal mode. NVPROM HOST CONTROLLER SDASLV SCLSLV DEVICE Dedicated NVPROM in Interactive Mode A dedicated NVPROM is connected to the device. During factory calibration, the host can instruct the device to upload the register data to the NVPROM. At the start of application, the host can instruct the device to download the register data from the NVPROM, after which the de vice will wait for further instructions in normal mode. The serial interface protocol between device and NVPROM is hard coded. A standard NVPROM such as a serial I2C EEPROM with address 0x50 (7-bit) must be used. HOST CONTROLLER SDASLV SCLSLV DEVICE SDAPROM SCLPROM NVPROM Dedicated NVPROM in Standalone Mode A dedicated NVPROM is connected to the device. During factory calibration, the host can instruct the device to upload the register data to the NVPROM. The difference versus Interactive Mode is that, in application, the device itself will download the register data and immediately after, enter normal mode. Then, it will start driving the PWM channels to achieve a default target color point. The default color point is programmed after factory calibration. A host controller is not necessary during application. The serial interface protocol between device and NVPROM is hard coded. So, a standard NVPROM such as a serial I2C EEPROM with address 0x50 (7-bit) must be used. SDAPROM DEVICE SCLPROM NVPROM 5 Factory Calibration Factory calibration is needed at a system level to create a ‘snapshot’ of the initial conditions of the system. The color management algorithm references the snapshot data. In effect, the calibration data trims out variation in the entire signal chain from LEDs to sensor to ADC. The figure below shows the calibration procedure in brief. First, the device is put into “open loop” mode in which the color management algorithm is turned off. Second, the host controller needs to determine the optimum sensor sensitivity for the given brightness detection level. The sensitivity is a combination of several internal settings. Searching for the optimum settings can be performed manually or through an automatic search routine which is built into the device. The host can start the routine by issuing a command to the device. The device will then turn the LEDs (usually at maximum duty factor) and start the search routine. Next, the host needs to turn only the Red LEDs on. An external camera must be set up to capture the CIE coordinates of the RED LEDs. The scaled XYZ readings are then written to the device. At the same time, the host needs to instruct the device to sample the RGB sensor and store the results. This is repeated for the Green and Blue LEDs. Lastly, the host needs to instruct the device to start a calibration calculator. The calculator uses the camera and sensor readings for each color to develop a mapping matrix that maps the RGB sensor to the standard CIE color space. The mapping matrix and other configuration data is the device setup data referred to in the previous section. Open Loop Sensor Gain Self-Adjustment Read and Store Red LEDs Data Read and Store Green LEDs Data Read and Store Blue LEDs Data Compute Calibration Data Store Calibration Data & Other Configuration Data Factory Calibration Flow Chart For details, refer to application note 5241 ADJD-J823 programming manual 6 Electrical Specifications Absolute Maximum Ratings (Notes 1 & 2) Parameter Storage temperature Digital supply voltage, DVDD to DVSS Analog supply voltage, AVDD to AVSS Input voltage Solder Reflow Peak temperature Human Body Model ESD rating Symbol TSTG_ABS VDDD_ABS VDDA_ABS VIN_ABS TL_ABS ESDHBM_ ABS Minimum -40 -0.5 -0.5 -0.5 Maximum 85 3.7 3.7 VDDD+0.5 235 2 Units °C V V V °C kV Notes All I/O pins All pins, human body model per JESD22A114-B Recommended Operating Conditions Parameter Free air operating temperature Digital supply voltage, DVDD to DVSS Analog supply voltage, AVDD to AVSS Output current load high Output current load low Input voltage high level (Note 4) Input voltage low level (Note 4) Power supply ramp period Symbol TA VDDD VDDA IOH IOL VIH VIL tVDD_ RAMP Minimum 0 2.5 2.5 Typical 25 2.6 2.6 Maximum 70 3.6 3.6 3 3 Units °C V V mA mA V V ms 0.7VDDD 0 VDDD 0.3VDDD 100 DC Electrical Specifications Over Recommended Operating Conditions (unless otherwise specified) Parameter Output voltage high level (Note 5) Output voltage low level (Note 6) Dynamic supply current (Note 7,8) Static supply current (Note 8) Sleep-mode supply current (Note 8) Input leakage current Symbol VOH VOL IDD_ STATIC Conditions IOH = 3mA IOL = 3mA (Note 9) (Note 9) Minimum VDDD-0.8 Typical (Note 3) VDDD-0.4 0.2 9.4 2.7 0.2 Maximum 0.4 14 6 15 10 Units V V mA mA uA uA IDD_DYN (Note 9) IDD_SLP ILEAK -10 AC Electrical Specifications Over Recommended Operating Conditions (unless otherwise specified) Parameter Internal clock frequency Symbol fCLK Conditions Minimum 16 Typical (Note 3) 26 Maximum 38 Units MHz 7 Optical Specifications Parameter Sensor operating detection range Symbol EV Conditions (Note 3 &10) Minimum 800 Maximum 10000 Units Lux Serial Interface Timing Information Parameter SCL clock frequency (Repeated) START condition hold time Data hold time SCL clock low period SCL clock high period Repeated START condition setup time Data setup time STOP condition setup time Bus free time between START and STOP conditions tHD:STA tHIGH tSU:DAT Symbol fscl tHD:STA tHD:DAT tLOW tHIGH tSU:STA tSU:DAT tSU:STO tBUF tSU:STA Minimum 0 4 0 (Note 11) 4.7 4.0 4.7 250 4.0 4.7 Maximum 100 3.45 - Units kHz ms ms ms ms ms ns ms ms tBUF SDA SCL S tLOW Figure 1. Serial Interface Bus Timing Waveforms Notes: 1. The “Absolute Maximum Ratings” are those values beyond which damage to the device may occur. The device should not be operated at these limits. The parametric values defined in the “Electrical Specifications” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 2. Unless otherwise specified, all voltages are referenced to ground. 3. Specified at room temperature (25°C) and VDDD = VDDA = 2.6V. 4. Applies to all digital input pins. 5. Applies to all digital output pins and CLKIO pin. SDASLV and SDAPROM pins go tri-state when output logic high. Minimum VOH depends on the pull-up resistor value. 6. Applies to all digital output and digital input-output pins. 7. Dynamic testing is performed with the IC operating in a mode representative of typical operation. 8. Refers to total device current consumption. 9. Output and bidirectional pins are not loaded. 10. Using R:G:B LED light source brightness ratio of 7:13:1 to achieve white D90 color point Red LED (x,y) = (0.700, 0.300) Green LED (x,y) = (0.171, 0.715) Blue LED (x,y) = (0.158, 0.019) 11. A hold time of at least 300ns must be provided internally by a device for the SDA signal ( with reference to the minimum VIH of SCL) to bridge the undefined region of the falling edge of SCL. tHD:DAT Sr tHD:STA P tSU:STO S 8 Sensor Optical Performance The integrated sensor spectral respond graph from 400 to 700nm. The color indicates the color channel of the color sensor. Spectral response 1 Red Green Blue Green Relative sensitivity 0.6 Blue 0.4 Red 0.8 0.2 0 400 450 500 550 Wavelength (nm) 600 650 700 System Performance Color Accuracy chart. Data obtain from 1078 units at 25oC and VDDD & VDDA at 2.6V. Color set point at CIE x=0.287, y=0.296 (9000K) The average du’v’ is 0.002 with standard deviation 0.0012 and a maximum value of 0.0062. 40.0% 35.0% 30.0% 25.0% 34.5% Color Accuracy 24.9% 21.9% Units 20.0% 15.0% 10.0% 5.0% 0.0% 0 to