AFCT-5944GZ

AFCT-5944LZ, AFCT-5944ALZ Single Mode SFF Transceivers for SONET OC-48/SDH STM-16 Multirate Operation (Part of the Avago Technologies’ METRAK family) Data Sheet Description Features The AFCT-5944xxZ are high performance, cost effective modules for serial optical data communications applications that range from 125 Mb/s to 2.7 Gb/s. They are designed to provide SONET/SDH compliant links at 2488 Mb/s for short reach links. • Multirate operation from 125 Mb/s to 2.7 Gb/s • AFCT-5944LZ/ALZ: Links of 2 km with 9/125 µm single mode fiber (SMF) • Multisourced 2 x 10 package style with LC receptacle • Single +3.3 V power supply • Temperature range: The modules are designed for single mode fiber and operate at a nominal wavelength of 1300 nm. They incorporate high performance, reliable, long wavelength optical devices and proven circuit technology to give long life and consistent service. The transmitter section of the AFCT-5944LZ/ALZ incorporates a 1300 nm Fabry Perot (FP) laser. The transmitter has full IEC 825 and CDRH Class 1 eye safety. For each device the receiver section uses an MOVPE grown planar SEDET PIN photodetector for low dark current and excellent responsivity. A positive ECL logic interface simplifies interface to external circuitry. The transceivers are supplied in the new industry standard 2 x 10 DIP style package with the LC fiber connector interface and is footprint compatible with SFF Multi Source Agreement (MSA). AFCT-5944LZ: AFCT-5944ALZ: 0°C to +70°C -40°C to +85°C • • • • • Wave solder and aqueous wash process compatible Manufactured in an ISO9002 certified facility RoHS compliant Fully Class 1 CDRH/IEC 825 compliant Compliant with ITU-T G.957, STM-16, I-16 and S-16.1 Optical Interfaces • AFCT-5944LZ/ALZ: With EMI shield • Receiver output squelch function enabled Applications • SONET/SDH equipment interconnect • Multirate Client Interface on Metro Gateways and Edge Switches Functional Description Receiver Section Design The receiver section for the AFCT-5944xxZ contains an InGaAs/InP photo detector and a preamplifier mounted in an optical subassembly. This optical subassembly is coupled to a postamp/decision circuit on a circuit board. The design of the optical assembly is such that it provides better than 27 dB Optical Return Loss (ORL). The postamplifier is ac coupled to the preamplifier as illustrated in Figure 1. The coupling capacitors are large enough to pass the SONET/SDH test pattern at 155 Mb/s, 622 Mb/s and 2488 Mb/s without significant distortion or performance penalty. For multirate applications the sensitivity will meet the maximum SONET specification for OC48 across all datarates (-19 dBm), also for DC balanced codes, e.g. 8B/10B. For codes which have a significantly lower frequency content, jitter and pulse distortion could be degraded. The receiver outputs are squelched at Signal Detect deasserts. That is, when the light input decreases to typical -27 dBm or less, the Signal Detect deasserts i.e. the SD Output goes to a PECL low state. This forces the DATA OUT and DATA OUT Bar to go PECL levels high and low respectively. designed to bandlimit the preamp output noise and thus improve the receiver sensitivity. These components will reduce the sensitivity of the receiver as the signal bit rate is increased above 2.7 Gb/s. As an optional feature the device also incorporates a photodetector bias circuit. The circuit works by providing a mirrored output of the bias current within the photodiode. This output must be connected to VCC and can be monitored by connecting through a series resistor (see Application Section). Noise Immunity The receiver includes internal circuit components to filter power supply noise. However under some conditions of EMI and power supply noise, external power supply filtering may be necessary (see Application Section). The Signal Detect Circuit The signal detect circuit works by sensing the peak level of the received signal and comparing this level to a reference. The SD output is low voltage TTL. Figure 1 also shows a filter function which limits the bandwidth of the preamp output signal. The filter is PHOTODETECTOR BIAS PECL OUTPUT BUFFER AMPLIFIER GND Figure 1. Receiver Block Diagram 2 DATA OUT FILTER TRANSIMPEDANCE PREAMPLIFIER SIGNAL DETECT CIRCUIT TTL OUTPUT BUFFER DATA OUT SD Functional Description Transmitter Section Design A schematic diagram for the transmitter is shown in Figure 2. The AFCT-5944LZ/ALZ incorporates an FP laser and has been designed to be compliant with IEC 825 eye safety requirements under any single fault condition and CDRH under normal operating conditions. The optical output is controlled by a custom IC that detects the laser output via the monitor photodiode. This IC provides both dc and ac current drive to the laser to ensure correct modulation, eye diagram and extinction ratio over temperature, supply voltage and operating life. The transmitters also include monitor circuitry for both the laser diode bias current and laser diode optical power. FP LASER DATA LASER MODULATOR DATA PECL INPUT BMON(+) BMON(-) PMON(+) PMON(-) Figure 2. Simplified Transmitter Schematic 3 LASER BIAS DRIVER LASER BIAS CONTROL PHOTODIODE (rear facet monitor) Package The overall package concept for the device consists of the following basic elements; two optical subassemblies, a electrical subassembly and the housing as illustrated in the block diagram in Figure 3. The package outline drawing and pin out are shown in Figures 4 and 5. The details of this package outline and pin out are compliant with the multi­source definition of the 2 x 10 DIP. In combination with the metalized nose segment of the package a metallic nose clip provides connection to chassis ground for both EMI and thermal dissipation. The electrical subassembly consists of high volume multilayer printed circuit boards on which the IC and various surface-mounted passive circuit elements are attached. RX SUPPLY The receiver electrical subassembly includes an internal shield for the electrical and optical subassembly to ensure high immunity to external EMI fields. The optical subassemblies are attached to the electrical subassembly. These two units are then fitted within the outer housing of the transceiver. The housing is then encased with a metal EMI protective shield. The electrical subassembly carries the signal pins that exit from the bottom of the transceiver. The solder posts are designed to provide the mechanical strength required to withstand the loads imposed on the transceiver by mating with the LC connectored fiber cables. Although they are not connected electrically to the transceiver, it is recommended to connect them to chassis ground. * PHOTO DETECTOR BIAS DATA OUT PIN PHOTODIODE PREAMPLIFIER SUBASSEMBLY QUANTIZER IC DATA OUT RX GROUND SIGNAL DETECT LC RECEPTACLE TX GROUND DATA IN DATA IN Tx DISABLE BMON(+) BMON(-) PMON(+) PMON(-) LASER BIAS MONITORING LASER DRIVER AND CONTROL CIRCUIT LASER DIODE OUTPUT POWER MONITORING TX SUPPLY LASER OPTICAL SUBASSEMBLY CASE * NOSE CLIP PROVIDES CONNECTION TO CHASSIS GROUND FOR BOTH EMI AND THERMAL DISSIPATION. Figure 3. Block Diagram 4 Figure 4. AFCT-5944xxZ Package Outline Drawing 5 Connection Diagram RX TX Mounting Studs/ Solder Posts PHOTO DETECTOR BIAS RECEIVER SIGNAL GROUND RECEIVER SIGNAL GROUND NOT CONNECTED NOT CONNECTED RECEIVER SIGNAL GROUND RECEIVER POWER SUPPLY SIGNAL DETECT RECEIVER DATA OUTPUT BAR RECEIVER DATA OUTPUT o 1 20o o 2 Top 19o o 3 o View18 o 4 17o o 5 16o o 6 15o o 7 14o o 8 13o o 9 12o o 10 11o LASER DIODE OPTICAL POWER MONITOR - POSITIVE END LASER DIODE OPTICAL POWER MONITOR - NEGATIVE END LASER DIODE BIAS CURRENT MONITOR - POSITIVE END LASER DIODE BIAS CURRENT MONITOR - NEGATIVE END TRANSMITTER SIGNAL GROUND TRANSMITTER DATA IN BAR TRANSMITTER DATA IN TRANSMITTER DISABLE TRANSMITTER SIGNAL GROUND TRANSMITTER POWER SUPPLY Figure 5. Pin Out Diagram (Top View) Pin Descriptions: Pin 1 Photo Detector Bias, VpdR: Pins 12, 16 Transmitter Signal Ground VEE TX: This pin enables monitoring of photo detector bias current. The pin should either be connected directly to VCRX, or to VCCRX through a resistor for monitoring photo C detector bias current. Directly connect these pins to the transmitter signal ground plane. Pin 13 Transmitter Disable TDIS: Directly connect these pins to the receiver ground plane. Optional feature, connect this pin to +3.3 V TTL logic high “1” to disable module. To enable module connect to TTL logic low “0”. Pins 4, 5 DO NOT CONNECT Pin 14 Transmitter Data In TD+: Pin 7 Receiver Power Supply VCC RX: PECL logic family. Internal terminations are provided (Terminations, ac coupling). Pins 2, 3, 6 Receiver Signal Ground VEE RX: Provide +3.3 V dc via the recommended receiver power supply filter circuit. Locate the power supply filter circuit as close as possible to the VCC RX pin. Note: the filter circuit should not cause VCC to drop below minimum specification. Pin 8 Signal Detect SD: Pin 15 Transmitter Data In Bar TD-: Internal terminations are provided (Terminations, ac coupling). Pin 17 Laser Diode Bias Current Monitor - Negative End BMON­­– Normal optical input levels to the receiver result in a logic “1” output. The laser diode bias current is accessible by measuring the differential voltage developed across pins 17 and 18. Low optical input levels to the receiver result in a logic “0” output. Pin 18 Laser Diode Bias Current Monitor - Positive End BMON­­+ This Signal Detect output can be used to drive a TTL input on an upstream circuit, such as Signal Detect input or Loss of Signal-bar. Pin 19 Laser Diode Optical Power Monitor - Negative End PMON­­– See pin 17 description. Pin 9 Receiver Data Out Bar RD-: The back facet diode monitor current is accessible by measuring the differential voltage developed across pins 19 and 20. PECL logic family. Output internally biased and ac coupled. Pin 20 Laser Diode Optical Power Monitor - Positive End PMON­­+ Pin 10 Receiver Data Out RD+: PECL logic family. Output internally biased and ac coupled. Pin 11 Transmitter Power Supply VCC TX: Provide +3.3 V dc via the recommen­ded transmitter power supply filter circuit. Locate the power supply filter circuit as close as possible to the VCC TX pin. 6 See pin 19 description. Mounting Studs/Solder Posts The two mounting studs are provided for transceiver mechanical attachment to the circuit board. It is recommended that the holes in the circuit board be connected to chassis ground. Application Information Optical Power Budget and Link Penalties The Applications Engineering Group at Avago Technologies is available to assist you with technical understanding and design trade-offs associated with these transceivers. You can contact them through your Avago Technologies sales representative. The worst-case Optical Power Budget (OPB) in dB for a fiber-optic link is determined by the difference between the minimum transmitter output optical power (dBm avg) and the lowest receiver sensitivity (dBm avg). This OPB provides the necessary optical signal range to establish a working fiber-optic link. The OPB is allocated for the fiberoptic cable length and the corresponding link penalties. For proper link performance, all penalties that affect the link performance must be accounted for within the link optical power budget. The following information is provided to answer some of the most common questions about the use of the parts. Electrical and Mechanical Interface Recommended Circuit Figure 6 shows the recommended interface for deploying the Avago Technologies transceivers in a +3.3 V system. Z = 50 Ω VCC (+3.3 V) TDIS (LVTTL) 130Ω BMON- TD- Z = 50 Ω BMON+ NOTE A 130 Ω PMON- TD+ PMON+ BMON+ o BMON- o VEE TX o TD- o VEE TX o VCC TX o o VEERX o DNC o DNC o VEE RX o VCC RX o SD o RD- o RD+ TDIS o PMON- o TD+ o PMON+ o RX o VEE RX TX o VpdR 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 VCC (+3.3 V) 1 µH C2 10 µF VCC (+3.3 V) 1 µH C1 RD+ 10 µF Z = 50 Ω VCCRX (+3.3 V) 2 kΩ NOTE C C3 100 Ω NOTE B RD- 3 kΩ 10 nF Z = 50 Ω SD Note: C1 = C2 = C3 = 10 nF or 100 nF TD+, TD- INPUTS ARE INTERNALLY TERMINATED AND AC COUPLED. RD+, RD- OUTPUTS ARE INTERNALLY BIASED AND AC COUPLED. Note A: CIRCUIT ASSUMES OPEN EMITTER OUTPUT. Note B: CIRCUIT ASSUMES HIGH IMPENDANCE INTERNAL BIAS @ V CC- 1.3 V. Note C: THE BIAS RESISTOR FOR VpdR SHOULD NOT EXCEED 2 kΩ Figure 6. Recommended Interface Circuit 7 LVTTL Data Line Interconnections Avago Technologies’ AFCT-5944xxZ fiber-optic transceivers are designed to couple to +3.3 V PECL signals. The transmitter driver circuit regulates the output optical power. The regulated light output will maintain a constant output optical power provided the data pattern is balanced in duty cycle. If the data duty cycle has long, continuous state times (low or high data duty cycle), then the output optical power will gradually change its average output optical power level to its preset value. The AFCT-5944xxZ has a transmit disable function which is a single-ended +3.3 V TTL input which is dc-coupled to pin 13. In addition the devices offer the designer the option of monitoring the laser diode bias current and the laser diode optical power. The receiver section is internally ac-coupled between the pre­amplifier and the post-amplifier stages. The Data and Data-bar outputs of the post-amplifier are internally biased and ac-coupled to their respective output pins (pins 9, 10). *4 2 x Ø 2.29 MAX . 2 x Ø 1.4 ±0.1 ( 0.055 ±0.004) ( 0.09) 8.89 ( 0.35) 7.11 ( 0.28) 2 x Ø 1.4 ±0.1 ( 0.055 ±0.004) Signal Detect is a single-ended, +3.3 V TTL compatible output signal that is dc-coupled to pin 8 of the module. Signal Detect should not be ac-coupled externally to the follow-on circuits because of its infrequent state changes. The designer also has the option of monitoring the PIN photo detector bias current. Figure 6 shows a resistor network, which could be used to do this. Note that the photo detector bias current pin must be connected to VCC. Avago Technologies also recommends that a decoupling capacitor is used on this pin. Caution should be taken to account for the proper intercon-nection between the supporting Physical Layer integrated circuits and these transceivers. Figure 6 illustrates a recommended interface circuit for interconnecting to a +3.3 V dc PECL fiber-optic transceiver. DIMENSIONS IN MILLIMETERS (INCHES) 3.56 ( 0.14) *5 4 x Ø 1.4 ±0.1 ( 0.055 ±0.004) 13.34 ( 0.525) 10.16 (0 .4) 7.59 ( 0.299) 9.59 ( 0.378) 3 ( 0.118) 3 ( 0.118) 6 ( 0.236) 9 x 1.78 ( 0.07) 4.57 ( 0.18) 16 ( 0.63) Figure 7. Recommended Board Layout Hole Pattern 8 2 ( 0.079) 2 2 x Ø 2.29 ( 0.079) ( 0.09) 3.08 ( 0.121) 20 x Ø 0.81 ±0.1 ( 0.032 ±0.004) NOTES: 1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE SFF TRANSCEIVER. 2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES OR GROUND CONNECTION IN KEEP-OUT AREAS. 3. 2 x 10 TRANSCEIVER MODULE REQUIRES 26 PCB HOLES (20 I/O PINS, 2 SOLDER POSTS AND 4 OPTIONAL PACKAGE GROUNDING TABS). PACKAGE GROUNDING TABS SHOULD BE CONNECTED TO SIGNAL GROUND. *4. THE MOUNTING STUDS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL INTEGRITY AND TO ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS. *5. HOLES FOR OPTIONAL HOUSING LEADS MUST BE TIED TO SIGNAL GROUND. 10.16 ± 0.1 (0.4 ± 0.004) TOP OF PCB 15.24 (0.6) B B DETAIL A 15.24 (0.6) 1 (0.039) A SOLDER POSTS 14.22 ±0.1 (0.56 ±0.004) 15.75 MAX. 15.0 MIN. (0.62 MAX. 0.59 MIN.) SECTION B - B DIMENSIONS IN MILLIMETERS (INCHES) 1. 2. FIGURE DESCRIBES THE RECOMMENDED FRONT PANEL OPENING FOR A LC OR SG SFF TRANSCEIVER. SFF TRANSCEIVER PLACED AT 15.24 mm (0.6) MIN. SPACING. Figure 8. Recommended Panel Mounting Power Supply Filtering and Ground Planes Eye Safety Circuit It is important to exercise care in circuit board layout to achieve optimum performance from these transceivers. Figure 6 shows the power supply circuit which complies with the small form factor multisource agreement. It is further recommended that a continuous ground plane be provided in the circuit board directly under the transceiver to provide a low inductance ground for signal return current. This recommendation is in keeping with good high frequency board layout practices. For an optical transmitter device to be eye-safe in the event of a single fault failure, the transmit-ter must either maintain eye-safe operation or be disabled. Package footprint and front panel considerations The Avago Technologies transceivers comply with the circuit board “Common Transceiver Footprint” hole pattern defined in the current multisource agreement which defined the 2 x 10 package style. This drawing is reproduced in Figure 7 with the addition of ANSI Y14.5M compliant dimensioning to be used as a guide in the mechanical layout of your circuit board. Figure 8 shows the front panel dimensions associated with such a layout. 9 The AFCT-5944xxZ is intrinsically eye safe and does not require shut down circuitry. Signal Detect The Signal Detect circuit provides a deasserted output signal when the optical link is broken (or when the remote transmitter is OFF). The Signal Detect threshold is set to transition from a high to low state between the minimum receiver input optical power and -35 dBm avg. input optical power indicating a definite optical fault (e.g. unplugged connector for the receiver or transmitter, broken fiber, or failed far-end transmitter or data source). The Signal Detect does not detect receiver data error or error-rate. Data errors can be determined by signal processing offered by upstream PHY ICs. Electromagnetic Interference (EMI) Recommended Solder fluxes One of a circuit board designer’s foremost concerns is the control of electromagnetic emissions from electronic equipment. Success in controlling generated Electromagnetic Interference (EMI) enables the designer to pass a governmental agency’s EMI regulatory standard and more importantly, it reduces the possibility of interference to neighboring equipment. Avago Technologies has designed the AFCT-5944xxZ to provide good EMI performance. The EMI performance of a chassis is dependent on physical design and features which help improve EMI suppression. Avago Technologies encourages using standard RF suppression practices and avoiding poorly EMI-sealed enclosures. Solder fluxes used with the AFCT-5944xxZ should be water-soluble, organic fluxes. Recommended solder fluxes include Lonco 3355-11 from London Chemical West, Inc. of Burbank, CA, and 100 Flux from Alpha-Metals of Jersey City, NJ. Avago Technologies’ OC-48 LC transceivers (AFCT5944xxZ) have nose shields which provide a convenient chassis connection to the nose of the transceiver. This nose shield and the underlying metalization (except ‘G’ options) improve system EMI performance by effectively closing off the LC aperture. The recommended transceiver position, PCB layout and panel opening for both devices are the same, making them mechanically drop-in compatible. Figure 8 shows the recommended positioning of the transceivers with respect to the PCB and faceplate. Recommended Solder and Wash Process The AFCT-5944xxZ are compatible with industry-standard wave solder processes. Process plug This transceiver is supplied with a process plug for protection of the optical port within the LC connector receptacle. This process plug prevents contamination during wave solder and aqueous rinse as well as during handling, shipping and storage. It is made of a high-temperature, molded sealing material that can withstand +85°C and a rinse pressure of 110 lbs per square inch. 10 Recommended Cleaning/Degreasing Chemicals Alcohols: methyl, isopropyl, isobutyl. Aliphatics: hexane, heptane Other: naphtha. D o not use p a r t i a l l y h a l o g e n a t e d hyd ro c a r bons such as 1,1.1 trichloroethane, ketones such as MEK, acetone, chloroform, ethyl acetate, methylene dichloride, phenol, methylene chloride, or N-methylpyrolldone. Also, Avago Technologies does not recommend the use of cleaners that use halogenated hydrocarbons because of their potential environmental harm. LC SFF Cleaning Recommendations In the event of contamination of the optical ports, the recommended cleaning process is the use of forced nitrogen. If contamination is thought to have remained, the optical ports can be cleaned using a NTT international Cletop stick type (diam. 1.25mm) and HFE7100 cleaning fluid. Regulatory Compliance Immunity The Regulatory Compliance for transceiver performance is shown in Table 1. The overall equipment design will determine the certification level. The transceiver performance is offered as a figure of merit to assist the designer in considering their use in equipment designs. Transceivers will be subject to radio-frequency electromagnetic fields following the IEC 61000-4-3 test method. Electrostatic Discharge (ESD) The device has been tested to comply with MIL-STD883E (Method 3015). It is important to use normal ESD handling precautions for ESD sensitive devices. These pre­cautions include using grounded wrist straps, work benches, and floor mats in ESD controlled areas. Electromagnetic Interference (EMI) Most equipment designs utilizing these high-speed transceivers from Avago Technologies will be required to meet FCC regulations in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. Refer to EMI section (page 9) for more details. Eye Safety These laser-based transceivers are classified as AEL Class I (U.S. 21 CFR(J) and AEL Class 1 per EN 60825-1 (+A11). They are eye safe when used within the data sheet limits per CDRH. They are also eye safe under normal operating conditions and under all reasonably foreseeable single fault conditions per EN60825-1. Avago Technologies has tested the transceiver design for compliance with the requirements listed below under normal operating conditions and under single fault conditions where applicable. TUV Rheinland has granted certification to these transceivers for laser eye safety and use in EN 60950 and EN 60825-2 applications. Their performance enables the transceivers to be used without concern for eye safety up to 3.6 V transmitter VCC. Regulatory Compliance - Targeted Specification Feature Test Method Performance Electrostatic Discharge (ESD) to the Electrical Pin MIL-STD-883E Method 3015 Class 2 (2 kV). Electrostatic Discharge (ESD) to the LC Receptacle Variation of IEC 61000-4-2 Tested to 8 kV contact discharge. Electromagnetic Interference (EMI) FCC Class B CENELEC EN55022 Class B (CISPR 22A) VCCI Class I Margins are dependent on customer board and chassis designs. Immunity Variation of IEC 61000-4-3 Typically show no measurable effect from a 10 V/m field swept from 27 to 1000 MHz applied to the transceiver without a chassis enclosure. Laser Eye Safety and Equipment Type Testing US 21 CFR, Subchapter J per Paragraphs 1002.10 and 1002.12 AEL Class I, FDA/CDRH CDRH Accession Number: 9521220-140 EN 60825-1: 1994 +A11 EN 60825-2: 1994 EN 60950: 1992+A1+A2+A3 AEL Class 1, TUV Rheinland of North America TUV Bauart License: 933/21203530/290 Underwriters Laboratories and Canadian Standards Association Joint Component Recognition for Information Technology Equipment Including Electrical Business Equipment. UL File Number: E173874 Component Recognition RoHS Compliance 11 Reference to EU RoHS Directive 2002/95/EC CAUTION: Design Support Materials There are no user serviceable parts nor any maintenance required for the AFCT-5944xxZ. All adjustments are made at the factory before shipment to our customers. Tampering with or modifying the performance of the parts will result in voided product warranty. It may also result in improper operation of the circuitry, and possible overstress of the laser source. Device degradation or product failure may result. Avago Technologies has created a number of reference designs with major PHY IC vendors in order to demonstate full functionality and interoperability. Such design information and results can be made available to the designer as a technical aid. Please contact your Avago Technologies representative for further information if required. Connection of the devices to a non-approved optical source, operating above the recommended absolute maximum conditions or operating the AFCT-5944xxZ in a manner inconsistent with its design and function may result in hazardous radiation exposure and may be considered an act of modifying or manufacturing a laser product. The person(s) performing such an act is required by law to recertify and reidentify the laser product under the provisions of U.S. 21 CFR (Subchapter J). 12 Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended periods can adversely affect device reliability. Parameter Symbol Min. Storage Temperature TS Supply Voltage Typ. Max. Unit -40 +85 °C VCC -0.5 3.6 V Data Input Voltage VI -0.5 VCC V Data Output Current ID 50 mA Relative Humidity RH 85 % Receiver Optical Input PINABS 6 dBm 0 Reference 1 Recommended Operating Conditions Parameter Symbol Min. Case Operating Temperature AFCT-5944LZ AFCT-5944ALZ Typ. Max. Unit 0 -40 +70 +85 °C °C 3.1 3.5 V TC TC Supply Voltage VCC Power Supply Rejection PSR Transmitter Differential Input Voltage VD Data Output Load RDL TTL Signal Detect Output Current - Low IOL TTL Signal Detect Output Current - High IOH Transmit Disable Input Voltage - Low TDIS Transmit Disable Input Voltage - High TDIS Transmit Disable Assert Time TASSERT 10 µs 3 Transmit Disable Deassert Time TDEASSERT 50 µs 4 Max. Unit Reference +260/10 °C/sec. 5 100 0.3 mVP-P 2.4 Reference 2 V W 50 1.0 -400 mA µA 0.6 2.2 V V Process Compatibility Parameter Symbol Wave Soldering and Aqueous Wash TSOLD/tSOLD Min. Typ. Notes: 1. The transceiver is class 1 eye safe up to VCC = 3.6 V. 2. Tested with a sinusoidal signal in the frequency range from 10 Hz to 1 MHz on the VCC supply with the recommended power supply filter in place. Typically less than a 1 dB change in sensitivity is experienced. 3. Time delay from Transmit Disable Assertion to laser shutdown. 4. Time delay from Transmit Disable Deassertion to laser startup. 5. Aqueous wash pressure