AMMP-6232

AMMP-6232 8 to 32 GHz GaAs High Linearity LNA in SMT Package Data Sheet Description Avago’s AMMP-6232 is an easy-to-use broadband, high gain, high linearity Low Noise Amplifier in a surface mount package. The wide band and unconditionally stable performance makes this MMIC ideal as a primary or subsequential low noise block or a transmitter driver. The MMIC has 4 gain stages and requires a 4V, 138mA power supply for optimal performance. Since this MMIC covers several bands, it can reduce part inventory and increase volume purchase options The MMIC is fabricated using PHEMT technology. The surface mount package eliminates the need of “chip & wire” assembly for lower cost. This MMIC is fully SMT compatible with backside grounding and I/Os. Features • • • • • • • • • • • • Surface Mount Package, 5.0 x 5.0 x 1.25 mm Single Power Supply Pin Unconditionally Stable 50Ohm Input and Output Match Specifications (Vdd = 4.0V, Idd = 138mA) RF Frequencies: 18 - 32 GHz High Output IP3: 29dBm High Small-Signal Gain: 23dB Typical Noise Figure: 3dB Pin Connections (Top View) 1 2 3 100pF Applications Pin 1 2 3 4 5 6 7 8 Function Vdd RFout Vg RFin 8 100pF 4 7 6 5 Microwave Radio systems Satellite VSAT, DBS Up/Down Link LMDS & Pt-Pt mmW Long Haul Broadband Wireless Access (including 802.16 and 802.20 WiMax) • WLL and MMDS loops • Commercial grade military Note: 1. This MMIC uses depletion mode pHEMT devices. 2. Negative voltage is used for the gate bias Top view Package base: GND Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 1A) Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control  Absolute Maximum Ratings [1] Parameters / Conditions Drain to Ground Voltage Gate-Drain Voltage Drain Current Gate Bias Voltage Gate Bias Current RF CW Input Power Max Max channel temperature Storage temperature Maximum Assembly Temp Symbol Vdd Vgd Idd Vg Ig Pin Tch Tstg Tmax Unit V V mA V mA dBm C C C Max 5.5 -8 200 +0.8  0 +50 -65 +50 260 for 20s 1. Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vdd, Vgd, Idd, Vg, Ig and Pin were determined at an ambient temperature of 25°C unless noted otherwise. DC Specifications/ Physical Properties [2] Parameter and Test Condition Drain Supply Current (Vd=4.0 V) Drain Supply Voltage Gate Bias Current Gate Bias Voltage Thermal Resistance(3) Symbol Idd Vd Ig Vg θjc Unit mA V mA V °C/W -. 3 Min Typ 35 4 0. -0.95 35. -0.8 Max 50 5 2. Ambient operational temperature TA=25°C unless noted 3. Channel-to-backside Thermal Resistance (Tchannel = 34°C) as measured using infrared microscopy. Thermal Resistance at backside temp. (Tb) = 25°C calculated from measured data. AMMP-6232 RF Specifications [4] TA= 25°C, Vdd = 4.0 V, Idd =135 mA, Zo=50 W Parameters and Test Conditions Small-Signal Gain[5] Noise Figure into 50W[5] Output Power at dB Gain Compression Output Power at 3dB Gain Compression Output Third Order Intercept Point Isolation Input Return Loss Output Return Loss Freq. (GHz) 20, 26, 29 20, 26, 29 Symbol Gain NF P-dB Psat OIP3 Iso RLin RLout Units dB dB dBm dBm dBm dB dB dB Minimum 9 Typical 23 3 8 20 29 -45 -0 -0 4.5 Maximum Sigma 4. Refer to characteristic plots for detailed individual frequency performance. 5. All tested parameters guaranteed with measurement accuracy ± 1.5dB for gain and ±0.4dB for NF. 2 AMMP-6232 Typical Performance [1], [2] (TA = 25°C, Vdd=4V, Idd=138mA, Zin = Zout = 50 W unless noted) 40 30 S21 (dB) 20 10 0 15 20 25 Frequency (GHz) 30 35 NoiseFigure (dB) 5 4 3 2 1 0 18 20 22 24 26 28 30 32 Frequency (GHz) Figure 1. Small-signal Gain 0 Figure 2. Noise Figure 20 OP1dB (dBm) 15 10 5 0 18 20 22 24 26 28 30 32 Fre que ncy (GHz ) -5 S11 (dB) -10 -15 -20 -25 15 20 25 30 35 Fre que ncy (GHz ) Figure 3. Input Return Loss 0 Figure 4. Output P-1dB 30 OIP3 (dBm) 25 20 15 10 5 18 20 22 24 26 28 30 32 -5 S22 (dB) -10 -15 -20 -25 15 20 25 Freque ncy (GHz ) 30 35 Freque ncy (GHz ) Figure 5. Output Return Loss Figure 6. Output IP3 Note: 1. S-parameters are measured on R&D Eval Board as shown in Figure 20. Effects of connectors and board traces are included in results. 2. Noise Figure is measured on R&D Eval Board as shown in Figure 20, and with a 3dB pad at the input. Board and Connector losses are already deembeded from the data. 3 AMMP-6232 Typical Performance (cont.) (TA = 25°C, Vdd=4V, Idd=138mA, Zin = Zout = 50 W unless noted) -20 -30 S12 (dB) 200 170 Idd (mA) 15 20 25 Fre que ncy (GHz ) 30 35 -40 -50 -60 -70 140 110 80 50 3 3.5 4 Vd d (V) 4.5 5 Figure 7. Isolation 40 Figure 8. Total Current 5 No iseFigure (d B) 30 S21 (dB) 20 10 0 15 20 25 30 Fre que ncy (GHz ) 4V 5V 3V 4 3 2 1 0 3V 4V 5V 18 20 22 24 26 28 30 32 35 Fre qu ency (GHz) Figure 9. Gain over Vdd Figure 10. Noise Figure over Vdd 0 -5 -10 -15 -20 -25 15 4V 3V 5V 0 -5 S22 (dB) -10 -15 -20 -25 -30 35 S11 (dB) 4V 5V 3V 20 25 30 Fre quency (GHz) 15 20 25 30 Freque ncy (GHz ) 35 Figure 11. Input Return Loss Over Vdd Figure 12. Output Return Loss Over Vdd 4 AMMP-6232 Typical Performance (cont.) (TA = 25°C, Vdd=4V, Idd=138mA, Zin = Zout = 50 W unless noted) 25 OP 1dB (dBm ) OI P3 (dBm) 35 30 25 20 15 10 5 3V 4V 5V 20 15 3V 10 5 18 20 22 24 26 28 4V 5V 30 32 18 20 22 24 26 28 30 32 Freque ncy (GHz ) Freque ncy (GHz ) Figure 13. Output P-1dB over Vdd 40 30 S21 (dB) 20 10 0 15 20 25 30 Freque ncy (GHz ) 25C 85C -40C Figure 14. Output IP3 Over Vdd 5 No is eF igur e (d B) 4 3 2 1 0 -40C 25C 85C 35 18 20 22 24 26 28 30 32 Freque ncy (GHz ) Figure 15. Gain over Temp 0 -5 S11 (dB) Figure 16. Noise Figure over Temp 0 -5 S22 (dB) -10 -15 -20 -25 -30 25 C 85 C -40C -10 -15 -20 -25 15 25C -40C 85C 20 25 30 Fre que ncy (GHz ) 35 15 20 25 30 Fre que ncy (GHz ) 35 Figure 17. Input Return Loss Over Temp Figure 18. Output Return Loss Over Temp 5 AMMP-6232 Application and Usage 4V Vdd 1 2 0.1uF Biasing and Operation The AMMP-6232 is normally biased with a positive drain supply connected to the VDD pin and a negative gate bias through bypass capacitors as shown in Figure 19. The recommended drain supply voltage is 4 V and the gate bias is approximately -0.95V to get the corresponding drain current of 138mA. It is important to have 0.1uF bypass capacitors and the capacitor should be placed as close to the component as possible. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Topt) matching. After adjusting the gate bias to obtain 138mA at Vdd = 4V, the AMMP-6232 can be safely biased at 3V or 5V (while fixing the gate bias) as desired. At 4V, the performance is an optimal compromise between power consumption, gain and power/linearity. It is both applicable to be used as a low noise block or driver. At 3V, the amplifier is ideal as a front end low noise block where linearity is not highly required. At 5V, the amplifier can provide 1 to 2dBm more output power for LO or transmitter driver applications where high output power and linearity are often required. Refer the Absolute Maximum Ratings table for allowed DC and thermal conditions. 3 100pF IN 8 4 OUT 100pF 7 6 5 0.1uF Vg Top View Package base: GND Figure 19. Usage of the AMMP-6232 ~ -0.95V Figure 20. Evaluation/Test Board (available to qualified customer request) Vd1 Vd2 In Matching Network Matching Network Matching Network Out Vg1 Vg2 Figure 21. Simplified AMMP-6232 Schematic 6 Recommended SMT Attachment for 5x5 Package Figure 22a. Suggested PCB Land Pattern and Stencil Layout Figure 22b. Stencil Outline Drawing (mm) Figure 22c. Combined PCB and Stencil Layouts The AMMP Packaged Devices are compatible with high volume surface mount PCB assembly processes. The PCB material and mounting pattern, as defined in the data sheet, optimizes RF performance and is strongly recommended. An electronic drawing of the land pattern is available upon request from Avago Sales & Application Engineering.  Manual Assembly • Follow ESD precautions while handling packages. • Handling should be along the edges with tweezers. • Recommended attachment is conductive solder paste. Please see recommended solder reflow profile. Neither Conductive epoxy or hand soldering is recommended. • Apply solder paste using a stencil printer or dot placement. The volume of solder paste will be dependent on PCB and component layout and should be controlled to ensure consistent mechanical and electrical performance. • Follow solder paste and vendor’s recommendations when developing a solder reflow profile. A standard profile will have a steady ramp up from room temperature to the pre-heat temp. to avoid damage due to thermal shock. • Packages have been qualified to withstand a peak temperature of 260°C for 20 seconds. Verify that the profile will not expose device beyond these limits. 300 250 Temp (˚C) 200 150 100 50 0 Ramp 1 0 50 Preheat Ramp 2 100 Reflow 200 Cooling 250 300 150 Seconds Peak = 250 ± 5˚C Melting point = 218˚C A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. The recommended stencil layout is shown in Figure 22. The stencil has a solder paste deposition opening approximately 70% to 90% of the PCB pad. Reducing stencil opening can potentially generate more voids underneath. On the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the I/O pads. Considering the fact that solder paste thickness will directly affect the quality of the solder joint, a good choice is to use a laser cut stencil composed of 0.127mm (5 mils) thick stainless steel which is capable of producing the required fine stencil outline. The most commonly used solder reflow method is accomplished in a belt furnace using convection heat transfer. The suggested reflow profile for automated reflow processes is shown in Figure 23. This profile is designed to ensure reliable finished joints. However, the profile indicated in Figure 1 will vary among different solder pastes from different manufacturers and is shown here for reference only. Figure 23. Suggested Lead-Free Reflow Profile for SnAgCu Solder Paste AMMP-6232 Part Number Ordering Information Part Number AMMP-6232-BLKG AMMP-6232-TRG AMMP-6232-TR2G Devices Per Container 0 00 500 Container Antistatic bag ” Reel ” Reel 8 Package, Tape & Reel, and Ordering Information .011 Top View Side View Back View NOTES: DIMENSIONS ARE IN INCHES [MILIMETERS] ALL GROUNDS MUST BE SOLDERED TO PCB RF Material is Rogers RO4350, 0.010” thick Carrier Tape and Pocket Dimensions For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes AV0-0442EN AV02-049EN - June 2, 200