AMMP-6233-TR1G

AMMP-6233 18 to 32 GHz GaAs Low Noise Amplifier Data Sheet Description Avago Technologies’ AMMP-6233 is a high gain, lownoise amplifier that operates from 18 GHz to 32 GHz. It has a 3 dB noise figure, over 20 dB of gain and designed to be an easy-to-use drop-in with any surface mount PCB application. Popular applications include microwave radios, 802.16 and satellite VSAT or DBS receivers. The fully integrated microwave circuit eliminated the complex tuning and assembly processes typically required by hybrid (discrete-FET) amplifiers. The surface mount package allows elimination of “chip & wire” assembly for lower cost. The device has 50 Ω input and output match and is unconditionally stable. The MMIC has fully integrated input and output DC blocking capacitors and bias choke. The backside of the package is both RF and DC ground that simplifies the assembly process. It is fabricated in a PHEMT process to provide exceptional low noise and gain performance. Features • Surface Mount Package, 5.0 x 5.0 x 1.25 mm • Integrated DC block and choke • 50 Ω Input and Output Match • Single Positive Supply Pin • No Negative Gate Bias Specifications (Vd=3.0V, Idd=65mA) • Broadband RF from 18 to 32 GHz • High Gain of 23dB • Low Gain Flatness: ± 1dB • Typical Noise Figure of 2.6 dB • Typical OIP3 of 19dBm Pin Connections (Top View) 1 2 3 Pin 1 2 3 4 5 6 7 8 Function Vdd RFout Applications • Microwave Radio systems • Satellite VSAT, DBS Up/Down Link • LMDS & Pt-Pt mmW Long Haul • Broadband Wireless Access (including 802.16 and 802.20 WiMax) • WLL and MMDS loops • Commercial grade military 8 4 7 6 5 RFin Note: these devices are esd seNsitive. the followiNg precautioNs are stroNgly recommeNded. eNsure that aN esd approved carrier is used wheN uNits are traNsported from oNe destiNatioN to aNother. persoNal grouNdiNg is to be worN at all times wheN haNdliNg these devices. the maNufacturer assumes No respoNsibilities for esd damage due to improper storage aNd haNdliNg of these devices. Absolute Maximum Ratings (1) Sym Vd Id Pin Tch Tstg DC Specifications/ Physical Properties (2) Unit V mA dBm C C C Parameters/Condition Drain to Ground Voltage Drain Current RF CW Input Power Max Max channel temperature Storage temperature Max 5.5 100 10 +150 -65 +150 260 for 20s Sym Idd Parameter and Test Condition Drain Supply Current under any RF power drive and temp. (Vdd=3.0 V) Drain Supply Voltage Thermal Resistance(3) Unit mA Min 40 Typ 65 Max 90 Vd qjc V C/W 3 27 5 Tmax Maximum Assembly Temp Notes: 1. Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vd, Id and Pin were determined at an ambient temperature of 25°C unless noted otherwise. Notes: 2. Ambient operational temperature TA=25°C unless noted 3. Channel-to-backside Thermal Resistance (Tchannel = 34°C) as measured using infrared microscopy. Thermal Resistance at backside temp. (Tb) = 25°C calculated from measured data. AMMP-6233 RF Specifications (4,5,6) Symbol Freq Gain TA= 25°C, Vdd=3.0 V, Idd= 65 mA, Zin=Zo=50 Ω Parameters and Test Conditions Operational Frequency RF Small Signal Gain Freq 18GHz 26GHz 29GHz NF Noise Figure into 50Ω 18GHz 26GHz 29GHz Rlin Rlout Iso P1dB OIP3 Input Return Loss Output Return Loss Isolation Output Power at 1dB gain compression Output Third Order Intercept Point Units GHz dB dB dB dB dB dB dB dB dB dBm dBm -10 -13 -45 8 18 Min. 18 19 20.8 20 Typ. 23.2 24.4 23.6 2.6 2.2 2.6 3.6 3.2 3.5 Max. 32 Notes: 4. Small/Large -signal data measured in a fully de-embedded test fixture form TA = 25°C. 5. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Gopt) matching. 6. All tested parameters guaranteed with measurement accuracy +/-0.5dB for NF and +/-1dB for gain at 18GHz, 26GHz and +/-1.5dB for gain at 29GHz.  AMMP-6233 Typical Performance [1], [2] 25 (TA = 25°C, Vdd=3V, Idd=65mA, Zin = Zout = 50 Ω unless noted) 6.0 5.0 Noise Figure (dB) 4.0 3.0 2.0 1.0 0.0 15 20 25 Frequency (GHz) 30 35 18 20 22 24 26 28 30 32 Frequency (GHz) 20 S21 (dB) 15 10 5 0 Figure 1. Gain 0 Figure 2. Noise Figure 25 OP1dB & OIP3 (dBm) 20 15 10 5 0 OP-1dB OIP3 18 20 22 24 26 28 30 32 -5 -10 S11 (dB) -15 -20 -25 -30 15 20 25 Frequency (GHz) 30 35 Frequency (GHz) Figure 3. Input Return Loss 0 -5 -10 S22 (dB) -15 -20 -25 -30 15 20 25 Frequency (GHz) 30 35 Figure 4. Output P-1dB and Output IP3 0 -10 -20 S12 (dB) -30 -40 -50 -60 15 20 25 Frequency (GHz) 30 35 Figure 5. Output Return Loss Figure 6. Isolation  AMMP-6233 Typical Performance (cont) [1], [2] 25 20 ( TA = 25°C, Vdd=3V, Idd=65mA, Zin = Zout = 50 Ω unless noted) 6.0 5.0 Noise Figure (dB) 4.0 3.0 2.0 1.0 0.0 18 20 22 24 26 28 30 3V 4V 5V 32 S21 (dB) 15 10 5 0 16 18 20 22 24 26 28 30 32 Frequency (GHz) 3V 4V 5V Frequency (GHz) Figure 7. Gain over Vdd 25 Figure 8. Noise Figure over Vdd 6.0 Noise Figure (dB) 5.0 4.0 3.0 2.0 1.0 32 0.0 18 20 22 24 26 28 Frequency (GHz) 30 32 -40°C +25°C +85°C 20 S21 (dB) 15 10 5 0 16 18 20 22 24 26 28 30 Frequency (GHz) 25°C -40°C 85°C Figure 9. Gain over Temperature 80 75 70 65 60 3 3.5 4 Vdd (V) 4.5 5 Figure 10. Noise Figure over Temperature 25 20 OIP3 (dBm) 15 10 5 0 18 20 22 24 26 28 30 32 3V 4V 5V Idd (mA) Frequency (GHz) Figure 11. Idd over Vdd Figure 12. Output IP3 over Vdd Note: 1. S-parameters are taken with the Evaluation Board as shown in Figure 14. Effects of board and connector are included in the graphs. Loss of board and connector are de-embeded from Gain data. 2. Noise Figure is measured with a 3-dB pad at the input of the device. Losses are de-embeded from the data shown in Figure 2, 8 and 10.  AMMP-6233 Application and Usage Vdd 0.1uF 3 Biasing and Operation The AMMP-6233 is normally biased with a positive drain supply connected to the VDD pin through a 0.1uF bypass capacitor as shown in Figure 13. The recommended drain supply voltage is 3V. It is important to have 0.1uF bypass capacitor, and the capacitor should be placed as close to the component as possible. Input and output ports are DC-blocked. Impedance matching at input and output ports are achieved on-chip, therefore, no extra external component is needed. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Γopt) matching No ground wires are needed because all ground connections are made with plated through-holes to the backside of the package. Refer the Absolute Maximum Ratings table for allowed DC and thermal condition 1 2 RFin RFout 8 7 6 5 AMMP-6233 Figure 13. Application of AMMP-6233 Figure 14. Evaluation / Test Board (Available to qualified customer requests) Vcc 4 Out In Figure 15. Simplified LNA Schematic Recommended SMT Attachment for 5x5 Package Figure 16a. PCB Land Pattern Figure 16b. PCB Stencil Layouts NOTES: DIMENSIONS ARE IN INCHES [MILIMETERS] ALL GROUNDS MUST BE SOLDERED TO PCB RF Material is Rogers RO4350, 0.010” thick Figure 16c. PCB Land Pattern with Stencil Layouts The AMMP Packaged Devices are compatible with high volume surface mount PCB assembly processes. The PCB material and mounting pattern, as defined in the data sheet, optimizes RF performance and is strongly recommended. An electronic drawing of the land pattern is available upon request from Avago Sales & Application Engineering.  Manual Assembly • Follow ESD precautions while handling packages. • Handling should be along the edges with tweezers. • Recommended attachment is conductive solder paste. Please see recommended solder reflow profile. Neither Conductive epoxy or hand soldering is recommended. • Apply solder paste using a stencil printer or dot placement. The volume of solder paste will be dependent on PCB and component layout and should be controlled to ensure consistent mechanical and electrical performance. • Follow solder paste and vendor’s recommendations when developing a solder reflow profile. A standard profile will have a steady ramp up from room temperature to the pre-heat temp. to avoid damage due to thermal shock. • Packages have been qualified to withstand a peak temperature of 260°C for 20 seconds. Verify that the profile will not expose device beyond these limits. 300 250 Temp (C) 200 150 100 50 0 Ramp 1 0 50 Preheat Ramp 2 100 Reflow 200 Cooling 250 300 150 Seconds Peak = 250 ± 5˚C Melting point = 218˚C A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. The recommended stencil layout is shown in Figure 16. The stencil has a solder paste deposition opening approximately 70% to 90% of the PCB pad. Reducing stencil opening can potentially generate more voids underneath. On the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the I/O pads. Considering the fact that solder paste thickness will directly affect the quality of the solder joint, a good choice is to use a laser cut stencil composed of 0.127mm (5 mils) thick stainless steel which is capable of producing the required fine stencil outline. The most commonly used solder reflow method is accomplished in a belt furnace using convection heat transfer. The suggested reflow profile for automated reflow processes is shown in Figure 17. This profile is designed to ensure reliable finished joints. However, the profile indicated in Figure 1 will vary among different solder pastes from different manufacturers and is shown here for reference only. Figure 17. Suggested Lead-Free Reflow Profile for SnAgCu Solder Paste Package, Tape & Reel, and Ordering Information .011 Back View Carrier Tape and Pocket Dimensions AMMP-6233 Part Number Ordering Information Part Number AMMP-6233-BLKG AMMP-6233-TR1G AMMP-6233-TR2G Devices Per Container 10 100 500 Container Antistatic bag 7” Reel 7” Reel Note: No rf performance degradation is seen due to esd upto 50v hbm and 200v mm. the dc characteristics in general show increased leakage at lower esd discharge voltages. the user is reminded that this device is esd sensitive and needs to be handled with all necessary esd protocols. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0666EN AV02-0489EN - June 12, 2007