HCPL-0466

Data Sheet HCPL-4506/J456/0466, HCNW4506 Intelligent Power Module and Gate Drive Interface Optocouplers Description Features The Broadcom® HCPL-4506 and HCPL-0466 contain a GaAsP LED, while the Broadcom HCPL-J456 and the HCNW4506 contain an AlGaAs LED. The LED is optically coupled to an integrated high gain photo detector. Minimized propagation delay difference between devices makes these optocouplers excellent solutions for improving inverter efficiency through reduced switching dead time. An on-chip 20-kΩ output pull-up resistor can be enabled by shorting output pins 6 and 7, thus eliminating the need for an external pull-up resistor in common IPM applications. Specifications and performance plots are given for typical IPM applications.       Figure 1: Functional Diagram NC 1 8 VCC 20 kΩ Performance specified for common IPM applications over industrial temperature range: –40°C to 100°C Fast maximum propagation delays: – tPHL = 480 ns – tPLH = 550 ns Minimized pulse width distortion, PWD = 450 ns 15 kV/µs minimum common-mode transient immunity at VCM = 1500V CTR > 44% at IF = 10 mA Safety approvals: – UL recognized:  3750 Vrms for 1 minute for HCPL-4506/0466/J456  5000 Vrms for 1 minute for HCPL-4506 Option 020 and HCNW4506 – CSA approved. – IEC/EN/DIN EN 60747-5-5 approved  VIORM = 560 Vpeak for HCPL-0466 Option 060  VIORM = 630 Vpeak for HCPL-4506 Option 060  VIORM = 891 Vpeak for HCPL-J456  VIORM = 1414 Vpeak for HCNW4506 ANODE 2 7 VL CATHODE 3 6 VO Applications NC 4 5 GND  SHIELD   Table 1: Truth Table LED VO OFF LOW ON HIGH NOTE: Broadcom  IPM isolation Isolated IGBT/MOSFET gate drive AC and brushless DC motor drives Industrial inverters CAUTION! Take normal static precautions in handling and assembly this component to prevent damage and/or degradation that may be induced by ESD. A 0.1-µF bypass capacitor must be connected between pins VCC and VEE. AV02-1360EN August 24, 2022 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Selection Guide Package Type Standard 8-Pin DIP (300 Mil) White Mold 8-Pin DIP (300 Mil) Small Outline SO8 Wide Body (400 Mil) Part Number HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 IEC/EN/DIN EN 60747-5-5 Approval VIORM = 630 Vpeak (Option 060) VIORM = 891 Vpeak VIORM = 560 Vpeak (Option 060) VIORM = 1414 Vpeak Hermetica HCPL-5300, HCPL-5301 — a. Technical data for these products are on separate Broadcom publications. Ordering Information HCPL-0466, HCPL-4506, and HCPL-J456 are UL recognized with 3750 Vrms for 1 minute per UL1577. HCNW4506 is UL recognized with 5000 Vrms for 1 minute per UL1577. HCPL-0466, HCPL-4506, HCPL-J456, and HCNW4506 are approved under CSA Component Acceptance Notice #5, File CA 88324. Option RoHS Non RoHS Part Number Compliant Compliant HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 Package Surface Mount Gull Wing -000E No Option -300E #300 X X -500E #500 X X -020E #020 -320E #320 X X -520E #520 X X -060E #060 -360E #360 300 mil DIP-8 X X X X -560E #560 No Option -300E #300 X X -500E #500 X X -000E No Option -500E #500 X -060E #060 X #560 -000E -300E -500E No Option #300 #500 50 per tube X X 1000 per reel X 50 per tube X 50 per tube X X 300 mil DIP-8 SO-8 X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel X 100 per tube X X X 1500 per reel X X 400 mil Wide Body DIP-8 Quantity 50 per tube -000E -560E UL 5000 Vrms/ IEC/EN/DIN Tape 1 Minute EN 60747and Reel Rating 5-5 X X X X X X X 100 per tube X 1500 per reel X X X 42 per tube 42 per tube 750 per reel To order, choose a part number from the Part Number column and combine with the desired option from the Option column to form an order entry. Example 1: HCPL-3140-560E to order product of 300-mil DIP Gull Wing Surface-Mount package in Tape-and-Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: HCPL-4506 to order product of 300-mil DIP package in Tube packaging and non RoHS compliant. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. NOTE: Broadcom The notation #XXX is used for existing products, while (new) products launched since 15th July 2001 and RoHS compliant option will use -XXXE. AV02-1360EN 2 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Package Outline Drawings Figure 2: HCPL-4506 Outline Drawing 9.65 ± 0.25 (0.380 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) Device Part Number 8 Avago 7 • Lead Free Pin 1 Dot 6 5 A NNNN Z YYWW EEE P 1 2 Date Code 3 6.35 ± 0.25 (0.250 ± 0.010) Test Rating Code UL Logo Special Program Code 4 Lot ID 1.19 (0.047) MAX. 1.78 (0.070) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 5° TYP. 3.56 ± 0.13 (0.140 ± 0.005) 4.70 (0.185) MAX. 0.51 (0.020) MIN. 2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). * MARKING CODE LETTER FOR OPTION NUMBERS. "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 0.65 (0.025) MAX. 1.080 ± 0.320 (0.043 ± 0.013) 2.54 ± 0.25 (0.100 ± 0.010) Figure 3: HCPL-4506 Gull Wing Surface-Mount Option 300 Outline Drawing LAND PATTERN RECOMMENDATION 9.65 ± 0.25 (0.380 ± 0.010) 8 7 6 1.016 (0.040) 5 6.350 ± 0.25 (0.250 ± 0.010) 1 2 3 10.9 (0.430) 4 1.27 (0.050) 1.19 (0.047) MAX. 1.780 (0.070) MAX. 9.65 ± 0.25 (0.380 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) 2.0 (0.080) 0.635 ± 0.25 (0.025 ± 0.010) 0.635 ± 0.130 2.54 (0.025 ± 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 12° NOM. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. Broadcom AV02-1360EN 3 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 4: HCPL-J456 Outline Drawing 9.80 ± 0.25 (0.386 ± 0.010) Device Part Number 8 Avago • Lead Free Pin 1 Dot 7 6 A NNNN Z YYWW EEE P 1 2 Date Code 7.62 ± 0.25 (0.300 ± 0.010) 5 3 Test Rating Code 6.35 ± 0.25 (0.250 ± 0.010) UL Logo Special Program Code 4 Lot ID 1.78 (0.070) MAX. 1.19 (0.047) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 5° TYP. 3.56 ± 0.13 (0.140 ± 0.005) 4.70 (0.185) MAX. 0.51 (0.020) MIN. 2.92 (0.115) MIN. 1.080 ± 0.320 (0.043 ± 0.013) DIMENSIONS IN MILLIMETERS AND (INCHES). OPTION NUMBERS 300 AND 500 NOT MARKED. 0.65 (0.025) MAX. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 2.54 ± 0.25 (0.100 ± 0.010) Figure 5: HCPL-J456 Gull Wing Surface-Mount Option 300 Outline Drawing LAND PATTERN RECOMMENDATION 9.80 ± 0.25 (0.386 ± 0.010) 8 7 6 1.016 (0.040) 5 6.350 ± 0.25 (0.250 ± 0.010) 1 2 3 10.9 (0.430) 4 1.27 (0.050) 1.19 (0.047) MAX. 1.780 (0.070) MAX. 9.65 ± 0.25 (0.380 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) 2.0 (0.080) 0.635 ± 0.25 (0.025 ± 0.010) 0.635 ± 0.130 2.54 (0.025 ± 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 12° NOM. NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX. Broadcom AV02-1360EN 4 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 6: HCPL-0466 Outline Drawing (8-Pin Small Outline Package) 3.937 ± 0.127 (0.155 ± 0.005) 8 7 6 5 NNNN Z YYWW EEE DEVICE PART NUMBER • LEAD-FREE PIN 1 1 2 3 TEST RATING CODE DATE CODE LOT ID 4 0.406 ± 0.076 (0.016 ± 0.003) 5.994 ± 0.203 (0.236 ± 0.008) 1.270 BSC (0.050) * 5.080 ± 0.127 (0.200 ± 0.005) 0.432 45° X (0.017) 7° 3.175 ± 0.127 (0.125 ± 0.005) 1.524 (0.060) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5.207 ± 0.254 (0.205 ± 0.010) 0 ~ 7° 0.228 ± 0.025 (0.009 ± 0.001) 0.203 ± 0.102 (0.008 ± 0.004) 0.305 MIN. (0.012) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX. NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. Figure 7: HCNW4506 Outline Drawing (8-Pin Wide Body Package) 11.00 MAX. (0.433) 11.15 ± 0.15 (0.442 ± 0.006) 7 8 9.00 ± 0.15 (0.354 ± 0.006) 5 A NNNNNNNN Z YYWW EEE Device Part Number • Lead Free Pin 1 Dot 6 1 2 3 Avago Test Rating Code Date Code Lot ID 4 10.16 (0.400) TYP. 1.55 (0.061) MAX. 7° TYP. + 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) 5.10 MAX. (0.201) 3.10 (0.122) 3.90 (0.154) 0.51 (0.021) MIN. 2.54 (0.100) TYP. 1.78 ± 0.15 (0.070 ± 0.006) Broadcom 0.40 (0.016) 0.56 (0.022) DIMENSIONS IN MILLIMETERS (INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. AV02-1360EN 5 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 8: HCNW4506 Gull Wing Surface-Mount Option 300 Outline Drawing 11.15 ± 0.15 (0.442 ± 0.006) 8 7 6 LAND PATTERN RECOMMENDATION 5 9.00 ± 0.15 (0.354 ± 0.006) 1 2 3 13.56 (0.534) 4 1.3 (0.051) 2.29 (0.09) 12.30 ± 0.30 (0.484 ± 0.012) 1.55 (0.061) MAX. 11.00 MAX. (0.433) 4.00 MAX. (0.158) 1.78 ± 0.15 (0.070 ± 0.006) 2.54 (0.100) BSC 0.75 ± 0.25 (0.030 ± 0.010) 1.00 ± 0.15 (0.039 ± 0.006) + 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). 7° NOM. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. Broadcom AV02-1360EN 6 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 9: Solder Reflow Temperature Profile 300 PREHEATING RATE 3 °C + 1 °C/–0.5 °C/SEC. REFLOW HEATING RATE 2.5 °C ± 0.5 °C/SEC. 200 PEAK TEMP. 245 °C PEAK TEMP. 240 °C TEMPERATURE (°C) 2.5 C ± 0.5 °C/SEC. 30 SEC. 160 °C 150 °C 140 °C PEAK TEMP. 230 °C SOLDERING TIME 200 °C 30 SEC. 3 °C + 1 °C/–0.5 °C 100 PREHEATING TIME 150 °C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 0 50 100 150 200 250 TIME (SECONDS) NOTE: NON-HALIDE FLUX SHOULD BE USED. Figure 10: Recommended Pb-Free IR Profile tp Tp TEMPERATURE TL Tsmax TIME WITHIN 5 °C of ACTUAL PEAK TEMPERATURE 15 SEC. * 260 +0/-5 °C 217 °C 150 - 200 °C RAMP-UP 3 °C/SEC. MAX. RAMP-DOWN 6 °C/SEC. MAX. Tsmin ts PREHEAT 60 to 180 SEC. tL 60 to 150 SEC. 25 t 25 °C to PEAK TIME NOTES: THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 °C, Tsmin = 150 °C NOTE: NON-HALIDE FLUX SHOULD BE USED. * RECOMMENDED PEAK TEMPERATURE FOR WIDEBODY 400mils PACKAGE IS 245 °C Broadcom AV02-1360EN 7 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Regulatory Information The devices contained in this data sheet have been approved by the following organizations. Agency/Standard HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 • • • • • • Underwriters Laboratories (UL) Recognized under UL 1577, Component Recognized Program, Category FPQU2, File E55361 UL 1577 Canadian Standards Association (CSA) File CA88324 Component Acceptance Notice #5 • • Verband Deutscher Electrotechniker (VDE) DIN VDE 0884 (June 1992) • • • • IEC/EN/DIN EN 60747-5-5 Approved under: IEC 60747-5-5:1997 + A1:2002 EN 60747-5-5:2001 + A1:2002 DIN EN 60747-5-5 (VDE 0884 Teil 2):2003-01 • • • Insulation and Safety Related Specifications Value Parameter Symbol HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 Unit Conditions Minimum External Air Gap (External Clearance) L(101) 7.1 7.4 4.9 9.6 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 7.4 8.0 4.8 10.0 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 0.5 0.08 1.0 mm Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Minimum Internal Tracking (Internal Creepage) NA NA NA 4.0 mm Measured from input terminals to output terminals, along internal cavity. ≥175 ≥175 ≥175 ≥200 IIIa IIIa IIIa IIIa Tracking Resistance (Comparative Tracing Index) Isolation Group CTI V DIN IEC 112/VDE 0303 Part 1. Material Group (DIN VDE 0110, 1/89, Table 1). Broadcom data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must be met as specified for individual equipment standards. For creepage, the shortest distance path along the surface of a printed circuit board between the solder fillets of the input and output leads must be considered. There are recommended techniques such as grooves and ribs that can be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors such as pollution degree and insulation level. Broadcom AV02-1360EN 8 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristics HCPL-0466 Option 060 HCPL-4506 Option 060 HCPL-J456 HCNW4506 For Rated Mains Voltage ≤150 Vrms I-IV I-IV I-IV I-IV For Rated Mains Voltage ≤300 Vrms I-III I-IV I-IV I-IV I-III I-III I-IV I-III I-IV Description Symbol Unit Installation Classification per DIN VDE 0110/ 1.89, Table 1 For Rated Mains Voltage ≤450 Vrms For Rated Mains Voltage ≤600 Vrms For Rated Mains Voltage ≤1000 Vrms I-III Climatic Classification 55/100/21 Pollution Degree (DIN VDE 0110/1.89) 55/100/21 55/100/21 55/100/21 2 2 2 2 VIORM 560 630 891 1414 Vpeak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1 second, Partial Discharge < 5 pC VPR 1050 1181 1670 2652 Vpeak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and Sample Test, tm = 60 seconds, Partial Discharge < 5 pC VPR 840 945 1336 2262 Vpeak Highest Allowable Overvoltagea (Transient Overvoltage, tini = 60 seconds) VIOTM 4000 6000 6000 8000 Vpeak TS IS,INPUT PS,OUTPUT 150 150 600 175 230 600 175 400 600 150 400 700 °C mA mW RS ≥109 ≥109 ≥109 ≥109 Ω Maximum Working Insulation Voltage Safety Limiting Values – maximum values allowed in the event of a failure, also see Thermal Derating curve. Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500V a. Refer to the optocoupler section of the Designer's Catalog, under regulatory information (IEC/EN/DIN EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. Notes: These optocouplers are suitable for safe electrical isolation only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Insulation Characteristics are per IEC/EN/DIN EN 60747-5-5. Surface-mount classification is Class A in accordance with CECC 00802. Broadcom AV02-1360EN 9 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Absolute Maximum Ratings Parameter Symbol Min. Max. Unit Storage Temperature TS –55 125 °C Operating Temperature TA –40 100 °C Average Input Current a IF(AVG) — 25 mA Peak Input Currentb (50% duty cycle, ≤1 ms pulse width) IF(PEAK) — 50 mA Peak Transient Input Current ( 3.0V Output Low Level Common Mode Transient Immunity |CML| 15 30 — kV/µs IF = 10 mA VO < 1.0V e f VCC = 15.0V, CL = 100 pF, VCM = 1500 Vp-p TA = 25°C 17 g h a. All typical values at 25°C, VCC = 15V. b. Pulse: f = 20 kHz, Duty Cycle = 10%. c. The RL = 20 kΩ, CL = 100 pF load represents a typical IPM (Intelligent Power Module) load. d. Use of a 0.1-µF bypass capacitor connected between pins 5 and 8 can improve performance by filtering power supply line noise. e. Pulse Width Distortion (PWD) is defined as |tPHL – tPLH| for any given device. f. The difference between tPLH and tPHL between any two devices under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) g. Common mode transient immunity in a logic high level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to ensure that the output will remain in a logic high state (that is, VO > 3.0V). h. Common mode transient immunity in a logic low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to ensure that the output will remain in a logic low state (that is, VO < 1.0V). Broadcom AV02-1360EN 12 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Switching Specifications (RL = Internal Pull-up) Over recommended operating conditions unless otherwise specified. TA = –40°C to +100°C, VCC = +4.5V to 30V, IF(on) = 10 mA to 20 mA, VF(off) = –5V to 0.8V (VF(off) = –3V to 0.8V. (For HCPLJ456 and HCNW4506, VF(off) = –3V to 0.8V). Parameter Propagation Delay Symbol Min. Typa Max. Unit TPHL 20 200 400 ns Time to Logic, HCPL-J456 485 Low at Output Propagation Delay tPLH 220 450 650 ns PWD — 250 500 ns 250 500 ns Test Conditions IF(on) = 10 mA, VF(off) = 0.8V, VCC = 15.0V, CL = 100 pF, VTHLH = 2.0V, VTHHL = 1.5V Fig. Note 16, 19 b, c, d, e, f g Time to High Output Level Pulse Width Distortion Propagation Delay Difference Between Any 2 Parts tPLH – tPHL –150 h Output High Level Common Mode Transient Immunity |CMH| — 30 — kV/µs IF = 0 mA, VO > 3.0V Output Low Level Common Mode Transient Immunity |CML| — 30 — kV/µs IF = 16 mA, VO < 1.0V Power Supply Rejection PSR — 1.0 — Vp-p VCC = 15.0V, CL = 100 pF, VCM = 1500 Vp-p, TA = 25°C 17 i j Square Wave, tRISE, tFALL > 5 ns, no bypass capacitors f a. All typical values at 25°C, VCC = 15V b. Pulse: f = 20 kHz, Duty Cycle = 10%. c. The internal 20-kΩ resistor can be used by shorting pins 6 and 7 together. d. Due to tolerance of the internal resistor, and since propagation delay is dependent on the load resistor value, performance can be improved by using an external 20-kΩ 1% load resistor. For more information on how propagation delay varies with load resistance, see Figure 18. e. The RL = 20 kΩ, CL = 100 pF load represents a typical IPM (Intelligent Power Module) load. f. Use of a 0.1-µF bypass capacitor connected between pins 5 and 8 can improve performance by filtering power supply line noise. g. Pulse Width Distortion (PWD) is defined as |tPHL – tPLH| for any given device. h. The difference between tPLH and tPHL between any two devices under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) i. Common mode transient immunity in a logic high level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to ensure that the output will remain in a logic high state (that is, VO > 3.0V). j. Common mode transient immunity in a logic low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to ensure that the output will remain in a logic low state (that is, VO < 1.0V). Broadcom AV02-1360EN 13 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Package Characteristics Over recommended temperature (TA = –40°C to 100°C) unless otherwise specified. Parameter Input-Output Momentary Withstand Voltageb Resistance (Input-Output) Capacitance (Input-Output) Sym. Device Min. Typ.a Max. Unit VISO HCPL-4506 HCPL-0466 3750 — — Vrms HCPL-J456 3750 — — HCPL-4506, Option 020 5000 — — c, g, h HCNW4506 5000 — — c, g, e HCPL-4506 HCPL-J456 HCPL-0466 — 1012 — HCNW4506 1012 1013 — HCPL-4506 HCPL-0466 — 0.6 — HCPL-J456 — 0.8 — HCNW4506 — 0.5 — RI-O CI-O Test Conditions Fig. Note RH < 50% t = 1 min. TA = 25°C c, d, e c, f, e Ω VI-O = 500 Vdc c pF f = 1 MHz c a. All typical values at 25°C, VCC = 15V. b. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to the IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristics Table (if applicable), your equipment level safety specification, or Broadcom Application Note 1074, Optocoupler Input-Output Endurance Voltage, (publication number 5963-2203E). c. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. d. In accordance with UL 1577, each optocoupler is proof-tested by applying an insulation test voltage ≥4500 Vrms for 1 second (leakage detection current limit, II-O ≤5 μA). e. This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristics Table, if applicable. f. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 Vrms for 1 second (leakage detection current limit, II-O ≤ 5 μA). g. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥6000 Vrms for 1 second (leakage detection current limit, II-O ≤ 5 μA). h. See Option 020 data sheet for more information. Broadcom AV02-1360EN 14 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 11: Typical Transfer Characteristics Figure 12: Normalized Output Current vs. Temperature 1.05 NORMALIZED OUTPUT CURRENT IO – OUTPUT CURRENT – mA 10 8 6 4 VO = 0.6 V 2 0 100 °C 25 °C -40 °C 0 10 5 15 20 1.00 0.95 0.90 IF = 10 mA VO = 0.6 V 0.85 0.80 -40 -20 0 20 40 80 60 100 TA – TEMPERATURE – °C IF – FORWARD LED CURRENT – mA IOH – HIGH LEVEL OUTPUT CURRENT – μA Figure 13: High Level Output Current vs. Temperature 20.0 VF = 0.8 V VCC = VO = 4.5 V OR 30 V 15.0 4.5 V 30 V 10.0 5.0 0 -40 20 0 -20 40 60 80 100 TA – TEMPERATURE – °C Figure 14: HCPL-4506 and HCPL-0466 Input Current vs. Forward Voltage IF – FORWARD CURRENT – mA TA = 25°C 100 IF + 10 VF – 1.0 0.1 0.01 0.001 1.10 1.20 1.30 1.40 1.50 1.60 VF – FORWARD VOLTAGE – VOLTS IF – INPUT FORWARD CURRENT – mA HCPL-4506/0466 1000 Broadcom Figure 15: HCPL-J456 and HCNW4506 Input Current vs. Forward Voltage HCPL-J456/HCNW4506 100 TA = 25 °C 10 IF + VF – 1 0.1 0.01 0.001 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VF – INPUT FORWARD VOLTAGE – V AV02-1360EN 15 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 16: Propagation Delay Test Circuit 1 8 2 + 20 kΩ 0.1 μF 20 kΩ IF(ON) =10 mA + – 7 If VCC = 15 V 5V – 3 6 tf VO tr VOUT 90% 90% 10% 10% C L* 4 VTHHL 5 SHIELD VTHLH *TOTAL LOAD CAPACITANCE tPHL tPLH Figure 17: CMR Test Circuit, Typical CMR Waveform 1 8 0.1 μF 20 kΩ IF 2 B VCM δV = VCM δt Δt 20 kΩ 7 + – A 3 6 VCC = 15 V OV Δt VOUT 100 pF* 4 + VO 5 SHIELD VFF *100 pF TOTAL CAPACITANCE – VCC SWITCH AT A: IF = 0 mA VO VOL + – SWITCH AT B: IF = 10 mA VCM = 1500 V Figure 18: Propagation Delay with External 20 kΩ RL vs. Temperature Figure 19: Propagation Delay with Internal 20 kΩ RL vs. Temperature 600 tPLH tPHL tP – PROPAGATION DELAY – ns tP – PROPAGATION DELAY – ns 500 400 300 IF = 10 mA VCC = 15 V CL = 100 pF RL = 20 kΩ (EXTERNAL) 200 100 -40 -20 0 20 40 60 80 TA – TEMPERATURE – °C Broadcom 100 500 IF = 10 mA VCC = 15 V CL = 100 pF RL = 20 kΩ (INTERNAL) tPLH tPHL 400 300 200 100 -40 -20 0 20 40 60 80 100 TA – TEMPERATURE – °C AV02-1360EN 16 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 20: Propagation Delay vs. Load Resistance 1400 tP – PROPAGATION DELAY – ns 800 tP – PROPAGATION DELAY – ns Figure 21: Propagation Delay vs. Load Capacitance IF = 10 mA VCC = 15 V CL = 100 pF TA = 25 °C 600 1000 400 tPLH tPHL 200 0 20 10 IF = 10 mA VCC = 15 V RL = 20 kΩ TA = 25°C 1200 30 40 800 600 400 200 0 50 tPLH tPHL 100 0 200 300 400 500 RL – LOAD RESISTANCE – kΩ CL – LOAD CAPACITANCE – pF Figure 22: Propagation Delay vs. Supply Voltage Figure 23: Propagation Delay vs. Input Current 500 IF = 10 mA CL = 100 pF RL = 20 kΩ TA = 25°C 1200 1000 tP – PROPAGATION DELAY – ns tP – PROPAGATION DELAY – ns 1400 tPLH tPHL 800 600 400 200 0 5 10 15 20 25 tPLH tPHL 400 200 100 30 VCC = 15 V CL = 100 pF RL = 20 kΩ TA = 25°C 300 0 VCC – SUPPLY VOLTAGE – V HCPL-4506 OPTION 060/HCPL-J456 800 PS (mW) IS (mA) FOR HCPL-4506 OPTION 060 IS (mA) FOR HCPL-J456 700 600 500 400 300 (230) 200 100 0 0 25 50 75 100 125 150 175 200 TS – CASE TEMPERATURE – °C Note: Dependence of safety limiting value with case temperature per IEC/EN/DIN EN 60747-5-5). Broadcom 15 20 IF – FORWARD LED CURRENT – mA Figure 25: Thermal Derating Curve, HCPL-4506 Option 060/ HCPL-J456 OUTPUT POWER – PS, INPUT CURRENT – IS OUTPUT POWER – PS, INPUT CURRENT – IS Figure 24: Thermal Derating Curve, HCPL-4506 Option 060/ HCPL-J456 10 5 1000 HCPL-0466 OPTION 060/HCNW4506 PS (mW) FOR HCNW4506 IS (mA) FOR HCNW4506 PS (mW) FOR HCPL-0466 OPTION 060 IS (mA) FOR HCPL-0466 OPTION 060 900 800 700 600 500 400 300 200 (150) 100 0 0 25 50 75 100 125 150 175 TS – CASE TEMPERATURE – °C Note: Dependence of safety limiting value with case temperature per IEC/EN/DIN EN 60747-5-5). AV02-1360EN 17 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 26: Recommended LED Drive Circuit 1 8 +5 V 310 Ω 20 kΩ 0.1 μF 20 kΩ 2 7 3 6 + – VCC = 15 V VOUT CMOS 100 pF 4 5 SHIELD *100 pF TOTAL CAPACITANCE Figure 27: Optocoupler Input-to-Output Capacitance Model for Unshielded Optocouplers 1 8 Figure 28: Optocoupler Input-to-Output Capacitance Model for Shielded Optocouplers 1 8 20 kΩ CLEDP 2 7 CLEDP 2 20 kΩ CLED02 7 CLED01 3 6 3 CLEDN 6 CLEDN 4 5 4 SHIELD 5 SHIELD Figure 29: LED Drive Circuit with Resistor Connected to LED Anode (Not Recommended) 1 8 +5 V 0.1 μF 20 kΩ 310 Ω 2 7 3 6 CMOS 20 kΩ + – VCC = 15 V VOUT 100 pF 4 5 SHIELD *100 pF TOTAL CAPACITANCE Broadcom AV02-1360EN 18 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 30: AC Equivalent Circuit for Figure 29 during Common Mode Transients 1 ITOTAL* 310 Ω 1 8 20 kΩ ICLEDP 2 Figure 31: AC Equivalent Circuit for Figure 26 during Common Mode Transients IF CLED02 CLEDP 8 20 kΩ 20 kΩ 2 7 CLEDP CLED02 ICLED01 3 310 Ω VOUT 6 CLEDN 6 100 pF 4 5 * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. ** OPTIONAL CLAMPING DIODE FOR IMPROVED CMH PERFORMANCE. VR < VF (OFF) DURING +dVCM/dt. VCM + – SHIELD – SHIELD + VOUT ICLEDN* + VR** – 5 CLEDN 3 100 pF 4 20 kΩ 7 CLED01 CLED01 VCM Figure 32: AC Equivalent Circuit for Figure 33 during Common Mode Transients 1 2 8 CLEDP 20 kΩ CLED02 20 kΩ 7 CLED01 Q1 3 CLEDN 6 VOUT ICLEDN* 100 pF 4 5 SHIELD + – * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. VCM Figure 33: Not Recommended Open Collector LED Drive Circuit 1 Figure 34: Recommended LED Drive Circuit for Ultra High CMR 8 +5 V 1 8 +5 V 20 kΩ 20 kΩ 2 7 2 7 3 6 3 6 5 4 Q1 4 SHIELD Broadcom 5 SHIELD AV02-1360EN 19 HCPL-4506/J456/0466, HCNW4506 Data Sheet Intelligent Power Module and Gate Drive Interface Optocouplers Figure 35: Typical Application Circuit HCPL-4506 8 1 20 kΩ I LED1 2 +5 V VCC1 0.1 μF IPM 20 kΩ 7 +HV 310 Ω 3 6 4 5 VOUT1 CMOS Q1 M SHIELD Q2 HCPL-4506 8 1 20 kΩ I LED2 2 +5 V VCC2 0.1 μF 7 HCPL-4506 -HV HCPL-4506 20 kΩ HCPL-4506 310 Ω 3 6 4 5 VOUT2 CMOS HCPL-4506 HCPL-4506 SHIELD Figure 36: Minimum LED Skew for Zero Dead Time ILED1 Figure 37: Waveforms for Dead Time Calculation ILED1 Q1 OFF Q1 OFF VOUT1 VOUT2 Q1 ON VOUT1 VOUT2 Q2 OFF Q1 ON Q2 OFF Q2 ON Q2 ON ILED2 ILED2 tPLH tPLH MAX. MIN. tPHL MIN. PDD* MAX. = (tPLH-tPHL) MAX. = tPLH MAX. - tPHL MIN. *PDD = PROPAGATION DELAY DIFFERENCE NOTE: THE PROPAGATION DELAYS USED TO CALCULATE PDD ARE TAKEN AT EQUAL TEMPERATURES. tPLH MAX. PDD* MAX. tPHL MIN. tPHL MAX. MAX. DEAD TIME MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = (tPLH MAX. - tPLH MIN.) + (tPHL MAX. - tPHL MIN.) = (tPLH MAX. - tPHL MIN.) - (tPLH MIN. - tPHL MAX.) = PDD* MAX. - PDD* MIN. *PDD = PROPAGATION DELAY DIFFERENCE NOTE: THE PROPAGATION DELAYS USED TO CALCULATE THE MAXIMUM DEAD TIME ARE TAKEN AT EQUAL TEMPERATURES. Broadcom AV02-1360EN 20 HCPL-4506/J456/0466, HCNW4506 Data Sheet Applications Information LED Drive Circuit Considerations for Ultra High CMR Performance Without a detector shield, the dominant cause of optocoupler CMR failure is capacitive coupling from the input side of the optocoupler, through the package, to the detector IC as shown in Figure 27. The HCPL-4506 series improves CMR performance by using a detector IC with an optically transparent Faraday shield, which diverts the capacitively coupled current away from the sensitive IC circuitry. However, this shield does not eliminate the capacitive coupling between the LED and the optocoupler output pins and output ground as shown in Figure 28. This capacitive coupling causes perturbations in the LED current during common mode transients and becomes the major source of CMR failures for a shielded optocoupler. The main design objective of a high CMR LED drive circuit becomes keeping the LED in the proper state (on or off) during common mode transients. For example, the recommended application circuit (Figure 26), can achieve 15-kV/µs CMR while minimizing component complexity. Use a CMOS gate as shown in Figure 26 to keep the LED off when the gate is in the high state. Another cause of CMR failure for a shielded optocoupler is direct coupling to the optocoupler output pins through CLEDO1 and CLEDO2 in Figure 28. Many factors influence the effect and magnitude of the direct coupling including the use of an internal or external output pull-up resistor, the position of the LED current setting resistor, the connection of the unused input package pins, and the value of the capacitor at the optocoupler output (CL). Techniques to keep the LED in the proper state and minimize the effect of the direct coupling are discussed in the next two sections. CMR with the LED On (CMRL) A high CMR LED drive circuit must keep the LED on during common mode transients. This is achieved by overdriving the LED current beyond the input threshold so that it is not pulled below the threshold during a transient. The recommended minimum LED current of 10 mA provides adequate margin over the maximum ITH of 5.0 mA (see Figure 11) to achieve 15-kV/µs CMR. Capacitive coupling is higher when the internal load resistor is used (due to CLEDO2) and an IF = 16 mA is required to obtain 10-kV/µs CMR. Broadcom Intelligent Power Module and Gate Drive Interface Optocouplers The placement of the LED current setting resistor affects the ability of the drive circuit to keep the LED on during transients and interacts with the direct coupling to the optocoupler output. For example, the LED resistor in Figure 29 is connected to the anode. Figure 30 shows the AC equivalent circuit for Figure 29 during common mode transients. During a +dVCM/dt in Figure 30, the current available at the LED anode (Itotal) is limited by the series resistor. The LED current (IF) is reduced from its DC value by an amount equal to the current that flows through CLEDP and CLEDO1. The situation is made worse because the current through CLEDO1 has the effect of trying to pull the output high (toward a CMR failure) at the same time the LED current is being reduced. For this reason, the recommended LED drive circuit (Figure 26) places the current setting resistor in series with the LED cathode. Figure 31 is the AC equivalent circuit for Figure 26 during common mode transients. In this case, the LED current is not reduced during a +dVcm/dt transient because the current flowing through the package capacitance is supplied by the power supply. During a –dVCM/dt transient, however, the LED current is reduced by the amount of current flowing through CLEDN. But, better CMR performance is achieved since the current flowing in CLEDO1 during a negative transient acts to keep the output low. Coupling to the LED and output pins is also affected by the connection of pins 1 and 4. If CMR is limited by perturbations in the LED on current, as it is for the recommended drive circuit (Figure 26), pins 1 and 4 should be connected to the input circuit common. However, if CMR performance is limited by direct coupling to the output when the LED is off, pins 1 and 4 should be left unconnected. CMR with the LED Off (CMRH) A high CMR LED drive circuit must keep the LED off (VF ≤ VF(OFF)) during common mode transients. For example, during a +dVCM/dt transient in Figure 31, the current flowing through CLEDN is supplied by the parallel combination of the LED and series resistor. As long as the voltage developed across the resistor is less than VF(OFF), the LED will remain off and no common mode failure will occur. Even if the LED momentarily turns on, the 100-pF capacitor from pins 6 to 5 will keep the output from dipping below the threshold. The recommended LED drive circuit (Figure 26) provides about 10V of margin between the lowest optocoupler output voltage and a 3V IPM threshold during a 15-kV/µs transient with VCM = 1500V. AV02-1360EN 21 HCPL-4506/J456/0466, HCNW4506 Data Sheet Additional margin can be obtained by adding a diode in parallel with the resistor, as shown by the dashed line connection in Figure 31, to clamp the voltage across the LED below VF(OFF). Since the open collector drive circuit, shown in Figure 33, cannot keep the LED off during a +dVCM/dt transient, it is not desirable for applications requiring ultra high CMRH performance. Figure 32 is the AC equivalent circuit for Figure 33 during common mode transients. Essentially all the current flowing through CLEDN during a +dVCM/dt transient must be supplied by the LED. CMRH failures can occur at dV/dt rates where the current through the LED and CLEDN exceeds the input threshold. Figure 34 is an alternative drive circuit that does achieve ultra high CMR performance by shunting the LED in the off state. IPM Dead Time and Propagation Delay Specifications The HCPL-4506 series includes a Propagation Delay Difference specification intended to help designers minimize dead time in their power inverter designs. Dead time is the time period during which both the high and low side power transistors (Q1 and Q2 in Figure 35) are off. Any overlap in Q1 and Q2 conduction will result in large currents flowing through the power devices between the high and low voltage motor rails. To minimize dead time, the designer must consider the propagation delay characteristics of the optocoupler as well as the characteristics of the IPM IGBT gate drive circuit. Considering only the delay characteristics of the optocoupler (the characteristics of the IPM IGBT gate drive circuit can be analyzed in the same way), it is important to know the minimum and maximum turn-on (tPHL) and turn-off (tPLH) propagation delay specifications, preferably over the desired operating temperature range. Broadcom Intelligent Power Module and Gate Drive Interface Optocouplers The limiting case of zero dead time occurs when the input to Q1 turns off at the same time that the input to Q2 turns on. This case determines the minimum delay between LED1 turn-off and LED2 turn-on, which is related to the worst-case optocoupler propagation delay waveforms, as shown in Figure 36. A minimum dead time of zero is achieved in Figure 36 when the signal to turn on LED2 is delayed by (tPLH max – tPHL min) from the LED1 turn off. Note that the propagation delays used to calculate PDD are taken at equal temperatures since the optocouplers under consideration are typically mounted in close proximity to each other. (Specifically, tPLH max and tPHL min in the previous equation are not the same as the tPLH max and tPHL min over the full operating temperature range, specified in the data sheet.) This delay is the maximum value for the propagation delay difference specification, which is specified at 450 ns for the HCPL-4506 series over an operating temperature range of –40°C to 100°C. Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time occurs in the highly unlikely case where one optocoupler with the fastest tPLH and another with the slowest tPHL are in the same inverter leg. The maximum dead time in this case becomes the sum of the spread in the tPLH and tPHL propagation delays as shown in Figure 37. The maximum dead time is also equivalent to the difference between the maximum and minimum propagation delay difference specifications. The maximum dead time (due to the optocouplers) for the HCPL-4506 series is 600 ns (= 450 ns – (–150 ns)) over an operating temperature range of –40°C to 100°C. AV02-1360EN 22 Copyright © 2005–2022 Broadcom. All Rights Reserved. The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. For more information, go to www.broadcom.com. All trademarks, trade names, service marks, and logos referenced herein belong to their respective companies. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.