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HCPL-2611-500E

HCPL-2611-500E

  • 厂商:

    AVAGO(博通)

  • 封装:

  • 描述:

    单向光耦 Viso=3750Vrms VF(typ)=1.5V IF=20mA

  • 数据手册
  • 价格&库存
HCPL-2611-500E 数据手册
6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 High CMR, High Speed TTL Compatible Optocouplers Data Sheet Description Features The 6N137, HCPL-26xx/06xx/4661, HCNW137/26x1 are optically coupled gates that combine a GaAsP light emitting diode and an integrated high gain photo detector. An enable input allows the detector to be strobed. The output of the detector IC is an open collector Schottky-clamped transistor. The internal shield provides a guaranteed common mode transient immunity specification up to 15,000 V/μs at Vcm = 1000 V.  This unique design provides maximum AC and DC circuit isolation while achieving TTL compatibility. The optocoupler AC and DC operational parameters are guaranteed from –40 °C to +85 °C allowing troublefree system performance.        Functional Diagram 6N137, HCPL-2601/2611 HCPL-0600/0601/0611 8 V CC NC 1 HCPL-2630/2631/4661 HCPL-0630/0631/0661 ANODE 1 1 8 V CC ANODE 2 7 VE CATHODE 1 2 7 V O1 CATHODE 3 6 VO CATHODE 2 3 6 V O2 NC 4 LED ON OFF ON OFF ON OFF SHIELD 5 GND TRUTH TABLE (POSITIVE LOGIC) ENABLE OUTPUT H L H H L H L H NC L NC H ANODE 2 4 SHIELD 5 GND  TRUTH TABLE (POSITIVE LOGIC) LED OUTPUT ON L OFF H Applications     A 0.1 μF bypass capacitor must be connected between pins 5 and 8.    CAUTION 15 kV/μs minimum Common Mode Rejection (CMR) at VCM= 1 kV for HCNW2611, HCPL-2611, HCPL-4661, HCPL-0611, HCPL-0661 High speed: 10 MBd typical LSTTL/TTL compatible Low input current capability: 5 mA Guaranteed AC and DC performance over temperature: –40 °C to +85 °C Available in 8-Pin DIP, SOIC-8, widebody packages Strobable output (single channel products only) Safety approval — UL recognized - 3750 Vrms for 1 minute and 5000 Vrms for 1 minute per UL1577 CSA approved (5000 Vrms/1 Minute rating is for HCNW137/26X1 and Option 020 [6N137, HCPL-2601/11/30/31, HCPL-4661] products only) — IEC/EN/DIN EN 60747-5-5 approved with  VIORM= 567 Vpeak for 06xx Option 060  VIORM= 630 Vpeak for 6N137/26xx Option 060  VIORM=1414 Vpeak for HCNW137/26x1 MIL-PRF-38534 hermetic version available (HCPL-56xx/66xx) It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.    Avago Technologies -1- Isolated line receiver Computer-peripheral interfaces Microprocessor system interfaces Digital isolation for A/D, D/A conversion Switching power supply Instrument input/output isolation Ground loop elimination Pulse transformer replacement Power transistor isolation in motor drives Isolation of high speed logic systems 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Selection Guide The 6N137, HCPL-26xx, HCPL-06xx, HCPL-4661, HCNW137, and HCNW26x1 are suitable for high speed logic interfacing, input/output buffering, as line receivers in environments that conventional line receivers cannot tolerate and are recommended for use in extremely high ground or induced noise environments. Selection Guide Minimum CMR Input OnCurrent dV/dt (mA) VCM (V) (V/μs) Output Enable 1000 10 5 YES 5,000 1,000 5 YES Single Channel Package 1,000 YES 1,000 YES HCPL-2630 HCPL-2601 YES HCPL-2602 3, 500 300 YES HCPL-2612a 1,000 50 YES HCPL-261Aa 1,000 50 12.5 HCPL-0611 HCNW2611 HCPL-0661 HCPL-061Aa HCPL-263Aa HCPL-261Na NO HCNW2601 a NO YES Single and Dual Channel Packages HCPL-0631 HCPL-4661 50 1,000 Single Channel Package HCNW137 HCPL-0601 HCPL-2611 1,000 1,000b Hermetic HCPL-0630 HCPL-2631 NO 3 Dual Channel Package HCPL-0600 NO 15,000 Single Channel Package Dual Channel Package Widebody (400 Mil) 6N137 NO 10,000 Small-Outline SO-8 8-Pin DIP (300 Mil) HCPL-063Aa HCPL-061Na HCPL-263Na c HCPL-063Na HCPL-193xa HCPL-56xxa HCPL-66xxa a. Technical data are on separate Avago publications. b. 15 kV/μs with VCM = 1 kV can be achieved using Avago application circuit.3 c. Enable is available for single channel products only, except for HCPL-193x devices. Ordering Information HCPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577. HCNWxxxx is UL Recognized with 5000 Vrms for 1 minute per UL1577. Avago Technologies -2- 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Ordering Information Table 1 Ordering Information Option Part Number 6N137 HCPL-2601 HCPL-2611 HCPL-2630 HCPL-2631 HCPL-4661 RoHS Compliant Non RoHS Compliant Surface Mount Package Gull Wing -000E No option -300E #300 X X -500E #500 X X -020E #020 -320E #320 X X -520E #520 X X -060E #060 UL 5000 Vrms/ 1 Minute Rating Tape & Reel IEC/EN/DIN EN 60747-5-5 300mil DIP-8 Quantity 50 per tube -560E -560 -000E No option X X -300E #300 X X -500E #500 X X -020E #020 -320E #320 X X -520E #520 X X -060E #060 50 per tube X X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel X X 50 per tube X 1000 per reel 300mil DIP-8 50 per tube -360E - -000E No option X -300E #300 X X -500E #500 X X -020E #020 -320E #320 X X -520E #520 X X -060E #060 -360E #360 X X -560E #560 X X -000E No option -300E #300 X X -500E #500 X X -020E #020 -320E #320 X X -520E -520 X X -000E No option -300E #300 X X -500E #500 X X -020E #020 -320E #320 X X -520E #520 X X 50 per tube X X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel X X 50 per tube X 50 per tube 300mil DIP-8 50 per tube 50 per tube X X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel X 300mil DIP-8 X 50 per tube X 50 per tube X 1000 per reel 50 per tube 50 per tube X X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel 300mil DIP-8 50 per tube Avago Technologies -3- 50 per tube X X 1000 per reel X 50 per tube X 50 per tube X 1000 per reel 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Schematic Table 1 Ordering Information (Continued) Option Part Number HCPL-0600 HCPL-0601 HCPL-0611 RoHS Compliant -000E Non RoHS Compliant No option Surface Mount Package SO-8 Gull Wing UL 5000 Vrms/ 1 Minute Rating Tape & Reel IEC/EN/DIN EN 60747-5-5 X 100 per tube -500E #500 X -060E #060 X -560E #560 X HCPL-0630 HCPL-0631 HCPL-0661 -000E No option -500E #500 HCNW137 HCNW2601 HCNW2611 -000E No option -300E #300 X X -500E #500 X X SO-8 Quantity X 1500 per reel X X 100 per tube X 1500 per reel X 100 per tube X X 400 mil DIP-8 X 1500 per reel X X 42 per tube X X 42 per tube X X 750 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Combinations of Option 020 and Option 060 are not available. Example 1: HCPL-2611-560E to order product of 300-mil DIP Gull Wing Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: HCPL-2630 to order product of 300-mil DIP package in tube packaging and non RoHS compliant. Option data sheets are available. Contact your Avago sales representative or authorized distributor for information. NOTE The notation ‘#xxx’ is used for existing products, while (new) products launched since July 15, 2001 and RoHS compliant option will use ‘-xxxE‘. Schematic IF 6N137, HCPL-2601/2611 HCPL-0600/0601/0611 HCNW137, HCNW2601/2611 ICC 8 2+ IO 6 VCC VO VF – 3 SHIELD 5 IE 7 VE USE OF A 0.1 μF BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5). Avago Technologies -4- GND 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Schematic HCPL-2630/2631/4661 HCPL-0630/0631/0661 ICC 1 8 IF1 IO1 + 7 VCC VO1 VF1 – 2 SHIELD 3 IF2 IO2 – 6 VO2 VF2 + 4 SHIELD 5 GND Avago Technologies -5- 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Outline Drawings Package Outline Drawings 8-pin DIP Package1 (6N137, HCPL-2601/11/30/31, HCPL-4661) 9.65 ± 0.25 (0.380 ± 0.010) 8 AVAGO LEAD-FREE DATE CODE PIN 1 1.19 (0.047) MAX. • 1 7 7.62 ± 0.25 (0.300 ± 0.010) 6 5 DEVICE PART NUMBER TEST RATING CODE A NNNN Z YYWW EEE P 2 3 6.35 ± 0.25 (0.250 ± 0.010) UL LOGO 4 SPECIAL PROGRAM CODE LOT ID 1.78 (0.070) MAX. 5° TYP. 3.56 ± 0.13 (0.140 ± 0.005) 4.70 (0.185) MAX. 0.51 (0.020) MIN. 2.92 (0.115) MIN. 1.080 ± 0.320 (0.043 ± 0.013) 1. 0.65 (0.025) MAX. 2.54 ± 0.25 (0.100 ± 0.010) + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) DIMENSIONS IN MILLIMETERS (INCHES). *MARKING CODE LETTER FOR OPTION NUMBERS "L" = OPTION 020 "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. JEDEC Registered Data (for 6N137 only). Avago Technologies -6- 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Outline Drawings 8-pin DIP Package with Gull Wing Surface Mount Option 300 (6N137, HCPL-2601/11/30/31, HCPL-4661) LAND PATTERN RECOMMENDATION 9.65 ± 0.25 (0.380 ± 0.010) 8 7 6 1.016 (0.040) 5 6.350 ± 0.25 (0.250 ± 0.010) 1 2 3 10.9 (0.430) 4 1.27 (0.050) 1.19 (0.047) MAX. 1.780 (0.070) MAX. 9.65 ± 0.25 (0.380 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) 0.635 ± 0.25 (0.025 ± 0.010) 0.635 ± 0.130 2.54 (0.025 ± 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. Avago Technologies -7- 2.0 (0.080) + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 12° NOM. 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Outline Drawings Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61) 3.937 ± 0.127 (0.155 ± 0.005) 8 7 6 5 NNNN Z YYWW EEE DEVICE PART NUMBER • LEAD-FREE PIN 1 1 2 3 TEST RATING CODE DATE CODE LOT ID 5.994 ± 0.203 (0.236 ± 0.008) 4 0.406 ± 0.076 (0.016 ± 0.003) 1.270 BSC (0.050) * 5.080 ± 0.127 (0.200 ± 0.005) 7° 3.175 ± 0.127 (0.125 ± 0.005) 1.524 (0.060) 0.432 45° X (0.017) 0 ~ 7° 0.228 ± 0.025 (0.009 ± 0.001) 0.203 ± 0.102 (0.008 ± 0.004) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5.207 ± 0.254 (0.205 ± 0.010) 0.305 MIN. (0.012) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX. NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. 8-Pin Widebody DIP Package (HCNW137, HCNW2601/11) 11.00 MAX. (0.433) 11.23 ± 0.15 (0.442 ± 0.006) 7 8 5 A NNNNNNNN Z YYWW EEE DEVICE PART NUMBER • LEAD-FREE PIN 1 6 1 2 3 AVAGO 9.00 ± 0.15 (0.354 ± 0.006) TEST RATING CODE DATE CODE LOT ID 4 10.16 (0.400) TYP. 1.55 (0.061) MAX. 7° TYP. + 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) 5.10 MAX. (0.201) 3.10 (0.122) 3.90 (0.154) 2.54 (0.100) TYP. 1.80 ± 0.15 (0.071 ± 0.006) 0.40 (0.016) 0.56 (0.022) 0.51 (0.021) MIN. DIMENSIONS IN MILLIMETERS (INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. Avago Technologies -8- 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Reflow Soldering Profile 8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW137, HCNW2601/11) 11.23 ± 0.15 (0.442 ± 0.006) 8 7 6 LAND PATTERN RECOMMENDATION 5 9.00 ± 0.15 (0.354 ± 0.006) 1 2 3 13.56 (0.534) 4 2.29 (0.09) 1.3 (0.051) 12.30 ± 0.30 (0.484 ± 0.012) 1.55 (0.061) MAX. 11.00 MAX. (0.433) 4.00 MAX. (0.158) 1.80 ± 0.15 (0.071 ± 0.006) 0.75 ± 0.25 (0.030 ± 0.010) 2.54 (0.100) BSC 1.00 ± 0.15 (0.039 ± 0.006) + 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) DIMENSIONS IN MILLIMETERS (INCHES). 7° NOM. LEAD COPLANARITY = 0.10 mm (0.004 INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. Test Rating Code, Z L – Option x2x Optional Identification Code A – Avago V – Option x5x or x6x – UL Logo P – Special Program Code Reflow Soldering Profile The recommended reflow soldering conditions are per JEDEC Standard J-STD-020 (latest revision). Non-halide flux should be used. Regulatory Information The 6N137, HCPL-26xx/06xx/46xx, and HCNW137/26xx have been approved by the following organizations: UL Recognized under UL 1577, Component Recognition Program, File E55361. IEC/EN/DIN EN 60747-5-5 CSA Approved under CSA Component Acceptance Notice #5, File CA 88324. Avago Technologies -9- 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Insulation and Safety Related Specifications Insulation and Safety Related Specifications Parameter Symbol 8-pin DIP (300 Mil) Value SO-8 Value Widebod (400 Mil) Value Unit Conditions Minimum External Air Gap (External Clearance) L(101) 7.1 4.9 9.6 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 7.4 4.8 10.0 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 0.08 1.0 mm Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Minimum Internal Tracking (Internal Creepage) NA NA 4.0 mm Measured from input terminals to output terminals, along internal cavity. 200 200 200 V DIN IEC 112/VDE 0303 Part 1 IIIa IIIa IIIa Tracking Resistance (Comparative Tracking Index) Isolation Group CTI Option 300 – Surface mount classification is Class A in accordance with CECC 00802. Avago Technologies - 10 - Material Group (DIN VDE 0110, 1/89, Table 1) 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (HCPL-06xx Option 060 Only) IEC/EN/DIN EN 60747-5-5 Insulation Characteristics1 (HCPL-06xx Option 060 Only) Description Symbol Installation classification per DIN VDE 0110, Table 1 for rated mains voltage ≤ 150 Vrms Characteristic Unit I-IV I-IV I-III for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms Climatic Classification 40/85/21 Pollution Degree (DIN VDE 0110/39) 2 Maximum Working Insulation Voltage VIORM 567 V peak Input-to-Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC VPR 1063 V peak Input-to-Output Test Voltage, Method aa VIORM ×1.6 = VPR, Type and Sample Test, tm = 10 sec, Partial Discharge < 5 pC VPR 907 V peak Highest Allowable Overvoltage (Transient Overvoltage, tini = 60 sec) VIOTM 6000 V peak Safety Limiting Values (Maximum values allowed in the event of a failure) Case Temperature TS 150 150 600 °C mA mW ≥ 109  Input Currentb IS,INPUT Output Powerb PS,OUTPUT Insulation Resistance at TS, VIO = 500 V RS a. Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a detailed description. b. Ratings apply to all devices except otherwise noted in the Package column. 1. Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application. Avago Technologies - 11 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (HCPL-26xx; 46xx; 6N13x Option 060 Only) IEC/EN/DIN EN 60747-5-5 Insulation Characteristics1 (HCPL-26xx; 46xx; 6N13x Option 060 Only) Description Symbol Installation classification per DIN VDE 0110, Table 1 for rated mains voltage ≤ 300 Vrms Characteristic Unit I-IV I-IV for rated mains voltage ≤ 450 Vrms Climatic Classification 40/85/21 Pollution Degree (DIN VDE 0110/39) 2 Maximum Working Insulation Voltage VIORM 630 V peak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC VPR 1181 V peak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and sample test, tm = 10 sec, Partial Discharge < 5 pC VPR 1008 V peak Highest Allowable Overvoltage (Transient Overvoltage, tini = 60 sec) VIOTM 6000 V peak TS 175 230 600 °C mA mW ≥ 109  Safety Limiting Values (Maximum values allowed in the event of a failure) Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V IS,INPUT PS,OUTPUT RS a. Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a detailed description. 1. Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application Avago Technologies - 12 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (HCNW137/2601/2611 Only) IEC/EN/DIN EN 60747-5-5 Insulation Characteristics1 (HCNW137/2601/2611 Only) Description Symbol Installation classification per DIN VDE 0110, Table 1 for rated mains voltage ≤ 600 Vrms Characteristic Unit I-IV I-III for rated mains voltage ≤ 1000 Vrms Climatic Classification 40/85/21 Pollution Degree (DIN VDE 0110/39) 2 Maximum Working Insulation Voltage VIORM 1414 V peak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC VPR 2651 V peak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and sample test, tm = 10 sec, Partial Discharge < 5 pC VPR 2262 V peak Highest Allowable Overvoltage (Transient Overvoltage, tini = 60 sec) VIOTM 8000 V peak TS 150 400 700 °C mA mW ≥109  Safety Limiting Values (Maximum values allowed in the event of a failure) Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V IS,INPUT PS,OUTPUT RS a. Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a detailed description. 1. Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application. Avago Technologies - 13 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Absolute Maximum Ratings (No Derating Required up to 85 °C) Absolute Maximum Ratings1 (No Derating Required up to 85 °C) Parameter Symbol Packagea Min. Max. Units Storage Temperature TS –55 125 °C Operating Temperatureb TA –40 85 °C Average Forward Input Current IF Single 8-Pin DIP Single SO-8 Widebody 20 mA Dual 8-Pin DIP Dual SO-8 15 8-Pin DIP, SO-8 5 Widebody 3 Widebody 40 Reverse Input Voltage VR Input Power Dissipation PI Supply Voltage (1 Minute Maximum) VCC Enable Input Voltage (Not to Exceed VCC by more than 500 mV) VE Enable Input Current Single 8-Pin DIP Note c d, e V d mW 36 7 V VCC + 0.5 V IE 5 mA Output Collector Current IO 50 mA d Output Collector Voltage VO 7 V d Output Collector Power Dissipation PO Single 8-Pin DIP Single SO-8 Widebody 85 mW Dual 8-Pin DIP Dual SO-8 60 8-Pin DIP 260 °C for 10 sec., 1.6 mm below seating plane Widebody 260 °C for 10 sec., up to seating plane SO-8 and Option 300 See Package Outline Drawings section Lead Solder Temperature (Through Hole Parts Only) TLS Solder Reflow Temperature Profile (Surface Mount Parts Only) Single 8-Pin DIP Single SO-8 Widebody a. Ratings apply to all devices except otherwise noted in the Package column. b. 0 °C to 70 °C on JEDEC Registration. d, f c. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA. d. Each channel. e. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA. f. Derate linearly above 80 °C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package. 1. JEDEC Registered Data (for 6N137 only). Avago Technologies - 14 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Recommended Operating Conditions Recommended Operating Conditions Parameter Symbol Min. Max. Units Input Current, Low Level IFLa 0 250 μA Input Current, High Levelb IFHc 5 15 mA Power Supply Voltage VCC 4.5 5.5 V Low Level Enable Voltaged VEL 0 0.8 V High Level Enable Voltaged VEH 2.0 VCC V Operating Temperature TA –40 85 °C Fan Out (at RL = 1 k)b N 5 TTL Loads Output Pull-up Resistor RL 4k  330 a. The off condition can also be guaranteed by ensuring that VFL ≤ 0.8 V. b. Each channel. c. The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to permit at least a 20% LED degradation guardband. d. For single channel products only. Avago Technologies - 15 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Electrical Specifications Electrical Specifications Over recommended temperature (TA =–40 °C to +85 °C) unless otherwise specified. All Typicals at VCC = 5 V, TA = 25 °C. All enable test conditions apply to single channel products only. See note. NOTE Bypassing of the power supply line is required, with a 0.1 μF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm. Table 2 Electrical Specifications Parameter Sym. High Level Output Current IOHa Input Threshold Current ITH Package Min. All Typ. 5.5 Max. 100 Units μA VOL High Level Supply Current ICCH a Single Channel Widebody 2.0 Note 1 b c d 2, 3 d , , Dual Channel 2.5 8-Pin DIP, SO-8 0.35 Widebody 0.4 Single Channel 7.0 5.0 mA VCC = 5.5 V, VE = 2.0 V, VO = 0.6 V, IOL (Sinking) = 13 mA 0.6 V VCC = 5.5 V, VE = 2.0 V, 2, 3, 4, 5 b, d IF = 5 mA, IOL (Sinking) = 13 mA 10.0* mA VE = 0.5 V VCC = 5.5 V, IF = 0 mA 6.5 ICCL High Level Enable Current IEH Low Level Enable Current IELa High Level Enable Voltage VEH Low Level Enable Voltage VEL Input Forward Voltage VF Dual Channel 10 15 Single Channel 9.0 13.0* Both Channels mA 21 Single Channel –0.7 –1.6 mA VCC = 5.5 V, VE = 2.0 V –0.9 –1.6 mA VCC = 5.5 V, VE = 0.5 V 2.0 1.4 SO-8 1.3 Widebody 1.25 8-Pin DIP, SO-8 5 Widebody 3 f VE = VCC, VCC = 5.5 V IF = 10 mA 13 1.2 BVRa VE = 0.5 V VCC = 5.5 V, IF = 10 mA Dual Channel 8-Pin DIP e VE = VCC, VCC = 5.5 V, IF = 0 mA 8.5 Input Reverse Breakdown Voltage VCC = 5.5 V, VE = 2.0 V, Fig. VO = 5.5 V, IF = 250 mA Low Level Output Voltage Low Level Supply Current Test Conditions Both Channels g V 1.5 1.64 0.8 V 1.75a V d TA = 25 °C, IF = 10 mA 1.80 IF = 10 mA 1.85 TA = 25 °C, IF = 10 mA 2.05 IF = 10 mA V IR = 10 A IR = 100 A, TA = 25°C Avago Technologies - 16 - 6, 7 b b 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Electrical Specifications Table 2 Electrical Specifications (Continued) Parameter Sym. Package Input Diode Temperature Coefficient VF/TA 8-Pin DIP, SO-8 Input Capacitance CIN Min. Typ. –1.6 Widebody –1.9 8-Pin DIP, SO-8 60 Widebody 70 Max. Units Test Conditions mV/°C IF = 10 mA pF f = 1 MHz, VF = 0 V Fig. 7 Note b b a. JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to +70 °C. Avago specifies –40 °C to +85 °C. b. Each channel. c. The JEDEC registration for the 6N137 specifies a maximum IOH of 250 μA. Avago guarantees a maximum IOH of 100 μA. d. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR performance. For single channel products only. e. The JEDEC registration for the 6N137 specifies a maximum ICCH of 15 mA. Avago guarantees a maximum ICCH of 10 mA. f. The JEDEC registration for the 6N137 specifies a maximum ICCL of 18 mA. Avago guarantees a maximum ICCL of 13 mA. g. The JEDEC registration for the 6N137 specifies a maximum IEL of –2.0 mA. Avago guarantees a maximum IEL of –1.6 mA. Avago Technologies - 17 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Switching Specifications (AC) Switching Specifications (AC) Over Recommended Temperature (TA = –40 °C to + 85 °C), VCC = 5 V, IF = 7.5 mA unless otherwise specified. All Typicals at TA = 25 °C, VCC = 5 V. Parameter Sym. Packagea Propagation Delay Time to tPLH High Output Level Min. 20 Typ. 48 Max. 75b Units ns 25 50 75* ns |tPHL – tPLH| 8-Pin DIP SO-8 3.5 Widebody Propagation Delay Skew 35 8, 9, 10 Note c d f , , TA = 25°C RL = 350  CL = 15 pF c e f , , RL = 350  CL = 15 pF 100 Pulse Width Distortion TA = 25°C RL = 350  Fig. RL = 350  CL = 15 pF 100 Propagation Delay Time to tPHL Low Output Level Test Conditions ns RL = 350  CL = 15 pF ns RL = 350  CL = 15 pF 8, 9, 10, g, f 11 40 40 tPSK h, g, f Output Rise Time (10-90%) tr 24 ns RL = 350  CL = 15 pF 12 c, f Output Fall Time (90-10%) 10 ns RL = 350  CL = 15 pF 12 c, f RL = 350 , CL = 15 pF, VEL = 0 V, VEH = 3 V 13, 14 i tf Propagation Delay Time of tELH Enable from VEH to VEL Single Channel 30 ns Propagation Delay Time of tEHL Enable from VEL to VEH Single Channel 20 ns a. Ratings apply to all devices except otherwise noted in the Package column. b. JEDEC registered data for the 6N137. c. Each channel. j d. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the output pulse. e. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the output pulse. f. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR performance. For single channel products only. g. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information. h. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions. i. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge of the output pulse. j. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge of the output pulse. Avago Technologies - 18 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Parameter Sym. Logic High |CMH| Common Mode Transient Immunity Logic Low |CML| Common Mode Transient Immunity Device Min. Switching Specifications (AC) Units Typ. 6N137 1,000 10,000 V/μs HCPL-2630 HCPL-0600/0630 HCNW137 5,000 10,000 |VCM| = 1 kV HCPL-2601/2631 HCPL-0601/0631 HCNW2601 10,000 15,000 |VCM| = 1 kV HCPL-2611/4661 HCPL-0611/0661 HCNW2611 15,000 25,000 |VCM| = 1 kV 6N137 1,000 10,000 HCPL-2630 HCPL-0600/0630 HCNW137 5,000 10,000 |VCM| = 1 kV HCPL-2601/2631 HCPL-0601/0631 HCNW2601 10,000 15,000 |VCM| = 1 kV HCPL-2611/4661 HCPL-0611/0661 HCNW2611 15,000 25,000 |VCM| = 1 kV V/μs |VCM| = 10 V |VCM| = 10 V Test Conditions Fig. Note VCC = 5 V, IF = 0 mA, VO(MIN) = 2 V, RL = 350 , TA = 25 °C 15 a b c d VCC = 5 V, IF = 7.5 mA, VO(MAX) = 0.8 V, RL = 350 ,, TA = 25°C 15 a, e, c, d , , , a. Each channel. b. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V). c. For sinusoidal voltages, (|dVCM | / dt)max = fCMVCM(p-p). d. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR performance. For single channel products only. e. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V). Avago Technologies - 19 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Characteristics Package Characteristics All Typicals at TA = 25 °C. Parameter Input-Output Insulation Sym. II-Oa Input-Output Momentary With-stand VISO Voltaged Package 3750 Widebody 5000 Units CI-O Fig. Note μA 45% RH, t = 5 s, VI-O = 3 kV dc, TA = 25 ° b c V rms RH 50%, t = 1 min, TA = 25 °C b c VI-O = 500 Vdc, g, b, h  1012 1012 , , b e , VI-O = 500 Vdc, TA = 25 °C 1013 VI-O = 500 Vdc, TA = 100 °C 1011 Input-Output Capacitance Test Conditions 5000 8-Pin DIP, SO-8 Widebody Max. 1 8-Pin DIP, SO-8 OPT 020 RI-O Typ. Single 8-Pin DIP Single SO-8 f Input-Output Resistance Min. 8-Pin DIP, SO-8 0.6 Widebody 0.5 pF f = 1 MHz, TA = 25 °C g, b, h 0.6 Input-Input Insulation Leakage Current II-I Dual Channel 0.005 μA RH 45%, t = 5 s, VI-I = 500 V i Resistance (Input-Input) RI-I Dual Channel 1011  RH 45%, t = 5 s, VI-I = 500 V i Capacitance (Input-Input) CI-I Dual 8-Pin DIP 0.03 pF f = 1 MHz i Dual SO-8 0.25 a. JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to 70 °C. Avago specifies –40 °C to 85 °C. b. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. c. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 Vrms for one second (leakage detection current limit, II-O ≤ 5 μA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table, if applicable. d. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable), your equipment level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.” e. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 Vrms for one second (leakage detection current limit, II-O ≤ 5 μA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table, if applicable. f. For 6N137, HCPL-2601/2611/2630/2631/4661 only. g. Each channel. h. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only. i. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only. Avago Technologies - 20 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Figure 2 Typical Output Voltage vs. Forward Input Current 8-PIN DIP, SO-8 6 VCC = 5.5 V VO = 5.5 V VE = 2.0 V* IF = 250 μA 10 * FOR SINGLE CHANNEL PRODUCTS ONLY 5 0 -60 -40 -20 20 0 40 60 RL = 350 W 3 RL = 1 KW 2 RL = 4 KW 1 0 TA – TEMPERATURE – °C 1 2 3 4 6 5 IF – FORWARD INPUT CURRENT – mA 8-PIN DIP, SO-8 ITH – INPUT THRESHOLD CURRENT – mA ITH – INPUT THRESHOLD CURRENT – mA 5 WIDEBODY 6 VCC = 5.0 V VO = 0.6 V 4 RL = 350 W 3 RL = 1 KW 2 1 RL = 4 KW 0 -60 -40 -20 0 20 40 60 TA – TEMPERATURE – °C 80 100 5 VCC = 5.0 V VO = 0.6 V 4 3 RL = 1 KW RL = 350 W 2 1 RL = 4 KW 0 -60 -40 -20 0 20 40 60 TA – TEMPERATURE – °C Avago Technologies - 21 - 80 4 RL = 350 W 3 RL = 1 KW 2 RL = 4 KW 1 0 0 1 2 3 4 5 IF – FORWARD INPUT CURRENT – mA Figure 3 Typical Input Threshold Current vs. Temperature 6 VCC = 5 V TA = 25 °C 5 4 0 80 100 WIDEBODY 6 VCC = 5 V TA = 25 °C 5 VO – OUTPUT VOLTAGE – V IOH – HIGH LEVEL OUTPUT CURRENT – μA 15 VO – OUTPUT VOLTAGE – V Figure 1 Typical High Level Output Current vs. Temperature Package Characteristics 100 6 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Characteristics Figure 4 Typical Low Level Output Voltage vs. Temperature Figure 5 Typical Low Level Output Current vs. Temperature 8-PIN DIP, SO-8 WIDEBODY * FOR SINGLE CHANNEL PRODUCTS ONLY 0.6 0.5 IO = 16 mA IO = 12.8 mA 0.4 0.3 0.2 IO = 9.6 mA IO = 6.4 mA 0.1 0 -60 -40 -20 0 20 40 60 70 0.8 80 IOL – LOW LEVEL OUTPUT CURRENT – mA 0.7 VCC = 5.5 V VE = 2.0 V* IF = 5.0 mA VOL – LOW LEVEL OUTPUT VOLTAGE – V VOL – LOW LEVEL OUTPUT VOLTAGE – V 0.8 VCC = 5.5 V VE = 2.0 V IF = 5.0 mA 0.7 0.6 0.5 IO = 16 mA IO = 12.8 mA 0.4 0.3 IO = 9.6 mA IO = 6.4 mA 0.2 0.1 0 -60 -40 -20 100 TA – TEMPERATURE – °C 0 20 40 60 80 100 8-PIN DIP, SO-8 10 IF - FORWARD CURRENT - mA IF – FORWARD CURRENT – mA 100 IF + VF – 1.0 0.1 0.01 0.001 1.1 1.2 1.3 1.4 1.5 WIDEBODY 1000 TA = 25 °C 1.6 TA = 25 oC 100 10 IF + VF - 1.0 0.1 0.01 0.001 1.2 VF – FORWARD VOLTAGE – V 1.3 1.4 1.5 1.6 1.7 VF - FORWARD VOLTAGE - V Figure 7 Typical Temperature Coefficient of Forward Voltage vs. Input Current 8-PIN DIP, SO-8 -2.2 -2.0 -1.8 -1.6 -1.4 -1.2 0.1 WIDEBODY -2.3 dVF/dT – FORWARD VOLTAGE TEMPERATURE COEFFICIENT – mV/°C dVF/dT – FORWARD VOLTAGE TEMPERATURE COEFFICIENT – mV/°C -2.4 1 10 IF – PULSE INPUT CURRENT – mA 100 -2.2 -2.1 -2.0 -1.9 -1.8 0.1 1 10 IF – PULSE INPUT CURRENT – mA Avago Technologies - 22 - * FOR SINGLE CHANNEL PRODUCTS ONLY 60 IF = 10-15 mA 50 IF = 5.0 mA 40 20 -60 -40 -20 0 20 40 60 TA – TEMPERATURE – °C TA – TEMPERATURE – °C Figure 6 Typical Input Diode Forward Characteristic 1000 VCC = 5.0 V VE = 2.0 V* VOL = 0.6 V 100 80 100 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Characteristics Figure 8 Test Circuit for TPHL and TPLH PULSE GEN. ZO = 50 W ft = tr = 5 ns SINGLE CHANNEL PULSE GEN. ZO = 50 W tf = tr = 5 ns IF INPUT MONITORING NODE 1 2 7 3 6 4 5 0.1μF BYPASS *C L RM GND DUAL CHANNEL +5 V VCC 8 +5 V IF OUTPUT V O MONITORING NODE 2 7 3 6 4 5 RL INPUT MONITORING NODE RL 1 VCC 8 RM C L* GND *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. I F = 7.50 mA INPUT IF I F = 3.75 mA t PHL t PLH OUTPUT VO 1.5 V Avago Technologies - 23 - 0.1μF BYPASS OUTPUT V O MONITORING NODE 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Figure 9 Typical Propagation Delay vs. Temperature 105 VCC = 5.0 V IF = 7.5 mA 80 60 tPLH , RL = 4 KW tPHL , RL = 350 W 1 KW 4 KW tPLH , RL = 1 KW 40 20 Figure 10 Typical Propagation Delay vs. Pulse Input Current tPLH , RL = 350 W 0 -60 -40 -20 20 0 40 60 tP – PROPAGATION DELAY – ns tP – PROPAGATION DELAY – ns 100 tPLH , RL = 4 KW 90 75 tPLH , RL = 350 W 60 tPLH , RL = 1 KW 45 30 80 100 VCC = 5.0 V TA = 25°C tPHL , RL = 350 W 1 KW 4 KW 5 40 11 13 VCC = 5.0 V IF = 7.5 mA RL = 4 kW 30 VCC = 5.0 V IF = 7.5 mA 20 RL = 350W 0 RL = 1 kW 0 9 20 40 60 15 Figure 12 Typical Rise and Fall Time vs. Temperature 80 100 TA - TEMPERATURE - oC tr, tf – RISE, FALL TIME – ns PWD - PULSE WIDTH DISTORTION - ns Figure 11 Typical Pulse Width Distortion vs. Temperature -10 -60 -40 -20 7 IF – PULSE INPUT CURRENT – mA TA – TEMPERATURE – °C 10 Package Characteristics 300 tRISE tFALL RL = 4 kW 290 60 RL = 1 kW 40 20 RL = 350 W RL = 350 W, 1 kW, 4 kW 0 20 40 60 80 100 -60 -40 -20 0 TA – TEMPERATURE – °C Avago Technologies - 24 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Characteristics Figure 13 Test Circuit for tEHL and tELH PULSE GEN. ZO = 50 W tf = tr = 5 ns INPUT VE MONITORING NODE +5 V 7.5 mA IF 3.0 V VCC 8 1 2 0.1 μF BYPASS 7 3 6 4 5 RL 1.5 V t EHL OUTPUT V O MONITORING NODE *C L GND INPUT VE t ELH OUTPUT VO 1.5 V *C L IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. Figure 14 Typical Enable Propagation Delay vs. Temperature tE – ENABLE PROPAGATION DELAY – ns 120 VCC = 5.0 V VEH = 3.0 V VEL = 0 V 90 IF = 7.5 mA tELH, RL = 4 kW 60 tELH, RL = 1 kW 30 tELH, RL = 350 W tEHL, RL = 350 W, 1 kW, 4 kW 0 -60 -40 -20 0 20 40 60 80 100 TA – TEMPERATURE – °C Figure 15 Test Circuit for Common Mode Transient Immunity and Typical Waveforms IF SINGLE CHANNEL DUAL CHANNEL B IF 1 VCC 8 B A VFF 2 7 3 6 4 GND +5 V 0.1 μF BYPASS 1 A VCC 8 RL 2 7 3 6 VFF OUTPUT V O MONITORING NODE 5 4 GND VCM VCM + – PULSE GENERATOR ZO = 50 W + – PULSE GENERATOR ZO = 50 W V CM(PEAK) V CM VO 0V 5V SWITCH AT A: I = F0 mA CM H VO (MIN.) SWITCH AT B: I = 7.5 F mA VO +5 V RL VO (MAX.) 0.5 V CM L Avago Technologies - 25 - 5 0.1 μF BYPASS OUTPUT V O MONITORING NODE 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Characteristics HCPL-2611 OPTION 060 800 HCNWXXXX OUTPUT POWER – PS, INPUT CURRENT – IS OUTPUT POWER – PS, INPUT CURRENT – IS Figure 16 Thermal Derating Curve, Dependence of Safety Limiting Value with Case Temperature per IEC/EN/DIN EN 60747 5-5 PS (mW) 700 IS (mA) 600 500 400 300 200 100 0 0 25 50 75 100 125 150 175 200 PS (mW) IS (mA) 800 700 600 500 400 300 200 100 0 0 25 TS – CASE TEMPERATURE – °C 50 75 100 125 150 TS – CASE TEMPERATURE – °C Figure 17 Recommended Printed Circuit Board Layout GND BUS (BACK) VCC BUS (FRONT) NC ENABLE 0.1μF NC OUTPUT 10 mm MAX. (SEE NOTE 5) SINGLE CHANNEL DEVICE ILLUSTRATED. Avago Technologies - 26 - 175 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Package Characteristics Figure 18 Recommended TTL/LSTTL to TTL/LSTTL Interface Circuit SINGLE CHANNEL DEVICE VCC1 5 V 5V 8 VCC2 390 W 470 W IF 2 6 + D1* VF – GND 1 0.1 μF BYPASS 3 5 SHIELD GND 2 VE 7 1 2 *DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT. DUAL CHANNEL DEVICE CHANNEL 1 SHOWN VCC1 5 V 5V 8 VCC2 390 W 470 W IF 1 7 + D1* 0.1 μF BYPASS VF – GND 1 2 5 GND 2 SHIELD 1 2 Avago Technologies - 27 - 6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 Data Sheet Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew before all of the data outputs have settled, or some of the data outputs may start to change before the clock signal has arrived. From these considerations, the absolute minimum pulse width that can be sent through optocouplers in a parallel application is twice tPSK. A cautious design should use a slightly longer pulse width to ensure that any additional uncertainty in the rest of the circuit does not cause a problem. Propagation delay is a figure of merit which describes how quickly a logic signal propagates through a system. The propagation delay from low to high (tPLH) is the amount of time required for an input signal to propagate to the output, causing the output to change from low to high. Similarly, the propagation delay from high to low (tPHL) is the amount of time required for the input signal to propagate to the output causing the output to change from high to low (see Figure 8). Pulse-width distortion (PWD) results when tPLH and tPHL differ in value. PWD is defined as the difference between tPLH and tPHL and often determines the maximum data rate capability of a transmission system. PWD can be expressed in percent by dividing the PWD (in ns) by the minimum pulse width (in ns) being transmitted. Typically, PWD on the order of 20-30% of the minimum pulse width is tolerable; the exact figure depends on the particular application (RS232, RS422, T-l, etc.). Propagation delay skew, tPSK, is an important parameter to consider in parallel data applications where synchronization of signals on parallel data lines is a concern. If the parallel data is being sent through a group of optocouplers, differences in propagation delays will cause the data to arrive at the outputs of the optocouplers at different times. If this difference in propagation delays is large enough, it will determine the maximum rate at which parallel data can be sent through the optocouplers. Propagation delay skew is defined as the difference between the minimum and maximum propagation delays, either tPLH or tPHL, for any given group of optocouplers which are operating under the same conditions (i.e., the same drive current, supply voltage, output load, and operating temperature). As illustrated in Figure 19, if the inputs of a group of optocouplers are switched either ON or OFF at the same time, tPSK is the difference between the shortest propagation delay, either tPLH or tPHL, and the longest propagation delay, either tPLH or tPHL. The tPSK specified optocouplers offer the advantages of guaranteed specifications for propagation delays, pulsewidth distortion and propagation delay skew over the recommended temperature, input current, and power supply ranges. Figure 19 Illustration of Propagation Delay Skew – tPSK IF 50% 1.5 V VO IF 50% VO 1.5 V t PSK Figure 20 Parallel Data Transmission Example DATA INPUTS CLOCK DATA OUTPUTS As mentioned earlier, tPSK can determine the maximum parallel data transmission rate. Figure 20 is the timing diagram of a typical parallel data application with both the clock and the data lines being sent through optocouplers. The figure shows data and clock signals at the inputs and outputs of the optocouplers. To obtain the maximum data transmission rate, both edges of the clock signal are being used to clock the data; if only one edge were used, the clock signal would need to be twice as fast. Propagation delay skew represents the uncertainty of where an edge might be after being sent through an optocoupler. Figure 20 shows that there will be uncertainty in both the data and the clock lines. It is important that these two areas of uncertainty not overlap, otherwise the clock signal might arrive Avago Technologies - 28 - t PSK CLOCK t PSK For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago Technologies and the A logo are trademarks of Avago Technologies in the United States and other countries. All other brand and product names may be trademarks of their respective companies. Data subject to change. Copyright © 2014–2016 Avago Technologies. All Rights Reserved. AV02-0940EN – March 23, 2016
HCPL-2611-500E 价格&库存

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HCPL-2611-500E
  •  国内价格
  • 1+8.29254
  • 30+8.00659
  • 100+7.43469
  • 500+6.86280
  • 1000+6.57685

库存:15

HCPL-2611-500E
    •  国内价格
    • 4+5.45986
    • 200+4.93584
    • 1000+4.66452

    库存:4