HCPL-7601#500

HCPL-7601/7611 CMOS/TTL Compatible, Low Input Current, High Speed, High CMR Optocoupler Data Sheet Description The HCPL-7601/11 is a low input current version of the HCPL-2601/11 and 6N137 (without enable). The optically coupled gates combine an AlGaAs highefficiency light emitting diode and an integrated high gain photon detector to create a low input current device for low power applications. The output of the detector IC is an open collector Schottky-clamped transistor. The internal shield provides a guaranteed common mode transient immunity specification of 10,000 V/µs (HCPL-7611). This unique design provides maximum ac and dc circuit isolation while achieving CMOS and TTL compatibility. The optocoupler ac and dc operational parameters are guaranteed from -40°C to 85°C with no derating required allowing trouble free system performance. This product is suitable for high speed logic interfacing, input/output buffering, and applications that require low input-current switching levels. Schematic IF ICC 8 2+ IO 6 VCC VO VF 3- 5 GND HCPL-7601/11 SHIELD USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND 8 IS REQUIRED (SEE NOTE 1). Features • Low input current version of HCPL-2601/11 and 6N137 • Wide input current range: IF = 2 mA to 10 mA • CMOS/TTL compatible • Guaranteed switching threshold: IF = 2 mA (max.) • Internal shield for high Common Mode Rejection (CMR) HCPL-7601: 5,000 V/µs (typical) at VCM = 50 V, IF = 4 mA HCPL-7611: 15,000 V/µs (typical) at VCM = 1000 V, IF = 4 mA • High speed: 10 Mbd typical • Guaranteed ac and dc performance over temperature: -40°C to 85°C • IEC/EN/DIN EN 60747-5-2 approval: VIORM = 600 VRMS • UL recognized: 3750 VRMS, 1 minute • CSA accepted • Low supply current requirement • Low TPSK: 40 ns guaranteed • Lead-free option “-000E” Applications • Isolated line receiver • Simplex/multiplex data transmission • Programmable logic controllers • Computer-peripheral interface • Microprocessor system interface • Digital isolation for A/D, D/A conversion • Switching power supply • Instrument input/output isolation • Ground loop elimination • Pulse transformer replacement TRUTH TABLE (POSITIVE LOGIC) OUTPUT LED L ON H OFF CAUTION: The small device geometries inherent to the design of this bipolar component increase the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The HCPL-7601/11 family offers many features that are especially beneficial to system designers. The low input current requirements and guaranteed switching threshold (2 mA max.) allows the LED to be driven directly by any standard high-speed CMOS gate (e.g. 74HC/HCT). This will simplify designs by eliminating the need for special driver circuits and result in lower part counts and greater system reliability while freeing up valuable printed circuit board space. The wide current input range of 2 mA to 10 mA and guaranteed ac and dc performance over a wide temperature range will also simplify designs. Low supply current requirements mean lower power dissipation allowing for the use of a smaller, less expensive power supply. The high speed (10 Mbd typ.) and low propagation delay skew (Tpsk ≤ 40 ns guaranteed) allow for easier design of high speed parallel applications. The world-wide regulatory approval (UL/CSA/IEC/ EN/DIN EN 60747-5-2) will facilitate the acceptance of the end product in international markets. Regulatory Information The HCPL-7601 and HCPL-7611 have been approved by the following organizations: UL Approved under UL 1577, component recognition FILE E55361). IEC/EN/DIN EN 60747-5-2 Approved under: IEC 60747-5-2:1997 + A1:2002 EN 60747-5-2:2001 + A1:2002 DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01 This optocoupler is suitable for “safe electrical isolation” only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Can be used for safe electrical separation between ac mains and SELV (safety extra-low voltage) in equipment according to the following specifications: DIN VDE 0804/05.89 DIN VDE 0160/05.88 Reference voltage (VDE 011b Tab 4): 630 Vac. CSA Approved under CSA22.2 No. 0 General Requirements, Canadian Electrical Code, Part II; and CSA Component Acceptance Notice #5, File CA 88324. 2 Ordering Information HCPL-7xxx is UL Recognized with 3750 Vrms for 1 minute per UL1577 and is approved under CSA Component Acceptance Notice #5, File CA 88324. Option Part RoHS non RoHS Number Compliant Compliant Package HCPL-7601 -000E no option 300 mil DIP-8 HCPL-7611 -300E #300 -500E #500 Surface Mount Gull Wing Tape & Reel X X X X X UL 5000 Vrms/ 1 Minute rating IEC/EN/DIN EN 60747-5-2 Quantity 50 per tube 50 per tube 1000 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Combination of Option 020 and Option 060 is not available. Example 1: HCPL-7611-560E to order product of 300 mil DIP Gull Wing Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-2 Safety Approval and RoHS compliant. Example 2: HCPL-7601 to order product of 300 mil DIP package in Tube packaging and non RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15, 2001 and RoHS compliant will use ‘–XXXE.’ 3 Absolute Maximum Ratings (No Derating Required up to 85° C) Storage Temperature ....................................................... -55° C to +125° C Operating Temperature ..................................................... -40° C to +85° C Lead Solder Temperature ................................................... 260° C for 10 s (1.6 mm below seating plane) Average Input Current - IF (See Note 2.) ........................................ 20 mA Reverse Input Voltage - VR ...................................................................... 3 V Supply Voltage - VCC ........................................... 7 V (1 Minute Maximum) Output Collector Current - IO ........................................................... 50 mA Output Collector Power Dissipation .............................................. 85 mW Output Collector Voltage - VO* ............................................................... 7 V Total Package Power Dissipation .................................................. 250 mW *Selection for higher output voltage up to 20 V is available. Recommended Operating Conditions Parameter 4 Symbol Min. Max. Units Input Voltage, Low Level VFL 0 0.8 V Input Current, High Level IFH 2 10 mA Supply Voltage, Output VCC 4.5 5.5 V Fan Out @ RL= 1 kΩ N 5 TTL Loads Operating Temperature TA -40 85 °C Output Pull-up Resistor RL 330 4k Ω Package Outline Drawing Standard DIP Package 9.40 (0.370) 9.90 (0.390) 8 7 6 A 7601 5 TYPE NUMBER* DATE CODE YYWW PIN ONE 1 2 3 0.18 (0.007) 0.33 (0.013) 6.10 (0.240) 6.60 (0.260) 7.36 (0.290) 7.88 (0.310) 5° TYP. 4 1.78 (0.070) MAX. 1.19 (0.047) MAX. 3.56 ± 0.13 (0.140 ± 0.005) DIMENSIONS IN MILLIMETERS AND (INCHES). 4.70 (0.185) MAX. PIN ONE 0.51 (0.020) MIN. 2.92 (0.115) MIN. 0.76 (0.030) 1.24 (0.049) PINOUT DIAGRAM N/C 1 8 VCC ANODE 2 7 N/C CATHODE 3 6 VOUT N/C 4 5 GND 0.65 (0.025) MAX. 2.28 (0.090) 2.80 (0.110) *TYPE NUMBER FOR: HCPL-7601 = 7601 HCPL-7611 = 7611 NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX. Gull Wing Surface Mount Option 300* 8 7 6 5 DIMENSIONS IDENTICAL TO STANDARD DIP EXCEPT AS NOTED. 1 2 3 4 9.65 ± 0.25 (0.380 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) 0.255 ± 0.075 (0.010 ± 0.003) 0.51 ± 0.130 (0.020 ± 0.005) 0.635 ± 0.25 (0.025 ± 0.010) * REFER TO OPTION 300 DATA SHEET FOR MORE INFORMATION. NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX. 5 12° NOM. Solder Reflow Temperature Profile 300 TEMPERATURE (°C) PREHEATING RATE 3°C + 1°C/–0.5°C/SEC. REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC. PEAK TEMP. 245°C PEAK TEMP. 240°C PEAK TEMP. 230°C 200 2.5°C ± 0.5°C/SEC. 30 SEC. 160°C 150°C 140°C SOLDERING TIME 200°C 30 SEC. 3°C + 1°C/–0.5°C 100 PREHEATING TIME 150°C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 50 0 100 150 TIME (SECONDS) Note: Non-halide flux should be used. Recommended Pb-free IR Profile tp Tp TEMPERATURE TL Tsmax TIME WITHIN 5 °C of ACTUAL PEAK TEMPERATURE 20-40 SEC. 260 +0/-5 °C 217 °C RAMP-UP 3 °C/SEC. MAX. 150 - 200 °C RAMP-DOWN 6 °C/SEC. MAX. Tsmin ts PREHEAT 60 to 180 SEC. tL 60 to 150 SEC. 25 t 25 °C to PEAK TIME NOTES: THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 °C, Tsmin = 150 °C Note: Non-halide flux should be used. 6 200 250 IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Description Symbol Characteristics Installation classification per DIN VDE 0109*/12.83, Table 1 for rated mains voltage ≤300 VRMS for rated mains voltage ≤600 VRMS I-IV I-III Climatic Classification 40/85/21 Pollution Degree (DIN VDE 0109/12.83)* Maximum Working Insulation Voltage 2 VIORM 600 Input to Output Test Voltage, Method b** Production test with tP = 1 sec, Partial discharge < 5 pC VPR = 1.6 X VIORM Input to Output Test Voltage, Method a** Production test with tP = 60 sec, Partial discharge < 5 pC VPR = 1.2 X VIORM Vpeak 960 VRMS 1357 Vpeak 720 VRMS 1018 Vpeak VTR 6000 Vpeak TSI PSI,Input PSI,Output 175 80 250 °C mW mW ≥1011 Ω VPR Safety-limiting values (Maximum values allowed in the event of a failure, also see Figure 16) Case Temperature Input Power Output Power RIS VRMS 848 VPR Highest Allowable Overvoltage** (Transient Overvoltage, tTR = 10 sec) Insulation Resistance at TSI, VIO = 500 V Unit * This part may also be used in Pollution Degree 3 environments where the rated mains voltage is ≤ 300 VRMS (per DIN VDE 0190/12.83). ** Refer to the front of the optocoupler section of the current Optoelectronics Designers Catalog for a more detailed description of IEC/EN/DIN EN 60747-5-2 and other product safety regulations. Insulation Related Specifications Parameter Symbol Value Units Minimum External Clearance (External Air Gap) L (IO1) 7.0 mm Measured from input terminals to output terminals Minimum External Creepage (External Tracking) L (IO2) 8.0 mm Measured from input terminals to output terminals 0.5 mm Through insulation distance from conductor to conductor 175 V Minimum Internal Clearance (Internal Plastic Gap) Comparative Tracking Index Isolation Group (per DIN VDE 0109) 7 CTI IIIa Conditions DIN IEC 112/VDE 303 P1 Material Group Electrical Specifications Over recommended temperature (TA = -40°C to 85°C) unless otherwise specified. (See note 1.) Parameter Symbol Min. Typ.* Max. Units Test Conditions Input Threshold Current ITH 1 2 mA VCC = 5.5 V, IO ≥ 13 mA, VO = 0.6 V 5 High Level Output Current IOH 3 100 µA VCC = 5.5 V, VO = 5.5 V VFL = 0.8 V 1 Low Level Output Voltage VOL 0.35 0.6 V VCC = 5.5 V, IF = 2 mA, IOL (Sinking) = 13 mA 2, 4, 6 High Level Supply Current ICCH 4.75 7 mA VCC = 5.5 V, IF = 0 mA Low Level Supply Current ICCL 6 10 mA VCC = 5.5 V, IF = 4 mA Input Forward Voltage VF 1.2 1.5 1.85 V IF = 4 mA Input Reverse Breakdown Voltage BVR 3 V IR = 100 µA Input Capacitance CIN 72 pF VF = 0, f = 1 MHz Input Diode Temperature Coefficient ∆VF/∆TA -1.6 mV/°C Input-Output Insulation VISO 3750 Resistance (Input-Output) RI-O 1012 VRMS 1013 Ω 1011 Capacitance (Input-Output) *All typicals at TA = 25°C, VCC = 5 V. 8 Fig. CI-O 3 IF = 4 mA 3 RH ≤ 50%, t = 1 min. TA = 25°C TA = 25°C Note VI-O = 500 V 3, 9 3 TA = 100°C 0.6 pF f = 1 MHz, VI-O = 0 Vdc 3 Switching Specifications Over recommended temperature (TA = -40°C to 85°C), VCC = 5 V, CL = 15 pF Parameter Symbol Propagation Delay Time to High Output Level tPLH Propagation Delay Time to Low Output Level Device Typ.* 25 58 25 55 35 73 25 57 tPHL Pulse Width Distortion |tPHL-tPLH| Propagation Delay Skew tPSK Output Rise Time (10% - 90%) trise Output Fall Time (10% - 90%) tfall Common Mode Transient Immunity at High Output Level CMH Common Mode Transient Immunity at Low Output Level CML 16 4 Max. Unit 75 100 75 100 100 120 75 100 Test Conditions TA = 25°C TA = 25°C ns TA = 25°C TA = 25°C Fig. Note IF = 2 mA, RL = 1 kΩ IF = 4 mA RL = 350 Ω 7, 8, 4, 10 10 IF = 2 mA RL = 1 kΩ IF = 4 mA RL = 350 Ω 7, 9, 5, 10 10 11, 12 55 40 IF = 2 mA IF = 4 mA RL = 1 kΩ RL = 350 Ω 75 40 IF = 2 mA IF = 4 mA RL = 1 kΩ RL = 350 Ω 58 24 IF = 2 mA IF = 4 mA RL = 1 kΩ RL = 350 Ω 13 10 IF = 2 - 4 mA RL = 350 - 1 kΩ 13 VCM = 50 V IF = 0 mA Vo(min) = 2 V RL = 350 - 1 kΩ TA = 25°C 14 7 Vo(max) = 0.8 V TA = 25°C 14 8 HCPL7601 1,000 5,000 HCPL7611 10,000 15,000 HCPL7601 1,000 5,000 HCPL7611 2,000 5,000 10,000 15,000 *All typicals at TA = 25°C, VCC = 5 V. 9 Min. VCM = 1000 V V/µs IF = 2 - 4 mA RL = 350 - 1 kΩ VCM = 50 V IF = 2 mA RL = 1 kΩ VCM = 1000 V IF = 4 mA RL = 350 Ω VCM = 1000 V 4, 5 6, 10 VCC = 5.5 V VO = 5.5 V VIN = 0.8 V 10 5 0 -60 -40 -20 0 20 40 60 80 100 0.6 VCC = 5.5 V IF = 2 - 4 mA 0.5 0.4 0.3 RL = 1 kΩ RL = 4 kΩ 2.0 1.0 0.5 1.0 1.5 2.0 IF – FORWARD INPUT CURRENT – mA Figure 4. Output voltage vs. forward input current. 10 40 60 80 100 TA = -40° C TA = 85° C -3 10 -4 10 -5 10 -6 10 0.8 1.0 1.2 1.4 1.6 1.8 Figure 2. Low level output voltage vs. temperature. Figure 3. Typical input forward current vs. input forward voltage. 2.5 VCC = 5.0 V VO = 0.6 V IO = 13.0 mA 2.0 1.5 1.0 0.5 0 -60 -40 -20 0 20 40 60 TA – TEMPERATURE – °C Figure 5. Input threshold current vs. temperature. 2.0 VF – INPUT FORWARD VOLTAGE – V IOL – LOW LEVEL OUTPUT CURRENT – mA RL = 350 Ω 0 20 TA = 25° C 10-2 ITH – INPUT THRESHOLD CURRENT – mA VO – OUTPUT VOLTAGE – V 5.0 0 0 10-1 TA – TEMPERATURE – °C Figure 1. High level output current vs. temperature. 3.0 IO = 13.0 mA 0.2 -60 -40 -20 TA – TEMPERATURE – °C 4.0 IO = 16.0 mA assumes that good board layout procedures were followed to reduce the effective input/output capacitance as shown in Figure 15. 9. In accordance with UL and CSA requirements, each optocoupler is proof tested by applying an insulation test voltage ≥ 5000 Vrms for one second (leakage detection current limit, II-O ≤ 5 µA). 10. AC performance at IF = 4 mA is approximately equivalent to the HCPL2601/11 at IF = 7.5 mA for comparison purposes. IF – INPUT FORWARD CURRENT – A 15 5. The tPHL propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5 V point on the leading edge of the output pulse. 6. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature within the operating condition range. 7. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VOUT > 2.0 V). 8. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VOUT < 0.8 V). This specification VOL – LOW LEVEL OUTPUT VOLTAGE – V IOH – HIGH LEVEL OUTPUT CURRENT – µA Notes: 1. Bypassing of the power supply line is required with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler, as illustrated in Figure 15. Total lead length between both ends of the capacitor and the isolator pins should not exceed 10 mm. 2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA. 3. Device considered a two terminal device: pins 1 , 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. 4. The tPLH propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.5 V point on the trailing edge of the output pulse. 80 100 55 50 IF = 4 mA 45 IF = 2 mA 40 35 VCC = 5 V VOL = 0.6 V 30 -50 -30 -10 0 10 30 50 70 TA – TEMPERATURE – °C Figure 6. Low level output current vs. temperature. 90 +5 V IF INPUT MONITORING NODE 1 VCC 8 2 7 3 6 4 5 0.1µF BYPASS RL OUTPUT VO MONITORING NODE RM GND 120 tPLH – PROPAGATION DELAY – ns *CL *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. IF INPUT IF 50% IF tPHL tPLH tP – PROPAGATION DELAY – ns tPHL – PROPAGATION DELAY – ns IF = 2 mA 70 60 IF = 4 mA 40 30 -50 -30 -10 0 10 30 50 70 100 80 70 30 50 40 TPLH @ RL = 350 Ω 2 3 4 5 6 330 tRISE, tFALL – RISE, FALL TIME – ns PULSE WIDTH DISTORTION (tPHL - tPLH) – ns TPLH @ RL = 1 kΩ 60 VCC = 5 V TA = 25° C 10 0 RL = 350 Ω -10 -20 RL = 1 kΩ -30 -40 RL = 4 kΩ -50 -60 0 2 4 6 8 8 7 9 10 11 Figure 10. Propagation delay vs. input current. 10 IF – INPUT CURRENT – mA Figure 12. Pulse width distortion vs. input current. 11 TPHL @ RL = 350 – 4 kΩ IF – INPUT CURRENT – mA Figure 9. tPHL – Propagation delay vs. temperature. -70 TPLH @ RL = 4 kΩ 90 30 1 90 VCC = 5 V TA = 25° C 110 TA – TEMPERATURE – °C 20 IF = 2-4 mA, RL = 4 kΩ 90 80 70 60 IF = 2-4 mA, RL = 1 kΩ 50 40 IF = 2-4 mA, RL = 350 Ω -30 -10 0 10 30 50 70 90 TA – TEMPERATURE – °C 120 80 50 VCC = 5 V TA = 25° C Figure 8. tPLH – Propagation delay vs. temperature. VCC = 5 V RL = 350 – 4 kΩ TA = 25° C 90 100 1.5 V Figure 7. Test circuit for tPHL and tPLH. 100 110 30 -50 OUTPUT VO 12 320 tRISE 310 300 RL = 4 kΩ 290 60 RL = 1 kΩ 40 RL = 350 Ω 20 RL = 350 Ω, 1 kΩ, 4 kΩ 0 -60 -40 -20 0 20 40 60 30 15 IF = 2 mA, RL = 350 Ω IF = 2 mA, RL = 1 kΩ IF = 4 mA, RL = 350 Ω 0 IF = 4 mA, RL = 1 kΩ -15 -30 IF = 2 mA, RL = 4 kΩ -45 -60 -50 IF = 4 mA, RL = 4 kΩ -30 -10 0 10 30 50 80 100 TA – TEMPERATURE – °C Figure 13. Rise and fall time vs. temperature. 70 TA – TEMPERATURE – °C Figure 11. Pulse width distortion vs. temperature. tFALL VCC = 5.0 V IF = 2 – 4 mA PULSE WIDTH DISTORTION (tPHL- tPLH) – ns PULSE GEN. ZO = 50 Ω tf = tr = 5 ns 90 IF B 1 VCC 8 2 7 3 6 +5 V 0.1 µF BYPASS A VFF 4 GND RL OUTPUT VO MONITORING NODE 5 VCM _ + PULSE GENERATOR ZO = 50 Ω VCM (PEAK) VCM 0V VO 5V SWITCH AT A: IF = 0 mA CMH VO (MIN.) SWITCH AT B: IF = 2 or 4 mA VO (MAX.) VO CML 0.35 V Figure 14. Test circuit for common mode transient immunity and typical waveforms. 250 150 0.1µF OUTPUT GND BUS 10 mm MAX. (SEE NOTE 1) Figure 15. Recommended printed circuit board layout. 12 PSI, INPUT – mW VCC BUS 100 50 40 30 20 10 0 50 0 25 50 75 0 100 125 140 150 175 TA – TEMPERATURE – °C Figure 16. Dependence of safety-limiting data on ambient temperature. PSI, OUTPUT – mW 220 200 DEVICE (INPUT DRIVE CIRCUIT) 8 VCC = 5 V I kΩ (MAX.) 390 6 2 2N3906** 0.1 µF BYPASS 3 *74LS04 VCC2 5 GND 2 SHIELD *ANY TTL GATE **ANY PNP TRANSITOR CMOS OR TTL INTERFACE CIRCUIT 1N4148 VCC = 5 V VCC = 5 V *74HC04 I kΩ (MAX.) 620 Ω (MAX.) 2 *74LS05 3 *ANY CMOS HC OR HCT GATE CMOS DRIVE CIRCUIT FOR LOW POWER APPLICATIONS *ANY OPEN COLLECTOR TTL OR OPEN DRAIN CMOS GATE INPUT DRIVE CIRCUIT FOR HIGH CMR APPLICATIONS Figure 17. Recommended interface circuits. For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2128EN AV01-0560EN July 6, 2007